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[None][fix] Cherry-Pick MNNVLAllreduce Fixes into release/1.1.0rc2 branch #7487
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/bot run --add-multi-gpu-test |
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PR_Github #17388 [ run ] triggered by Bot |
📝 WalkthroughWalkthroughUpdates multicast GPU buffer APIs and MPI communicator handling: constructor signatures change across C++ and Python bindings to accept split_color and device_idx; runtime now creates and uses a per-group MPI communicator; Python ops switch to topology-aware communication and conditional MNNVL initialization; one model adjusts TP sizing logic. Changes
Sequence Diagram(s)sequenceDiagram
autonumber
participant Py as Python caller
participant Ops as distributed.ops
participant Bind as Py Bindings
participant Buf as McastGPUBuffer
participant Mem as McastDeviceMemory
participant MPI as MpiComm (group)
Py->>Ops: build comm_id = pp_rank*cp_size+cp_rank
Ops->>Bind: McastGPUBuffer(buf_size, tp_size, tp_rank, split_color, device_idx, mn_nvlink)
Bind->>Buf: construct
Buf->>Mem: new(bufSize, groupSize, groupRank, splitColor, deviceIdx, mnNvlink)
Mem->>MPI: Split(world, splitColor) => mGroupComm
Note right of MPI: Group communicator created
Mem->>MPI: allgather/bcast using mGroupComm
Buf-->>Py: ready (UC/MC buffers accessible)
sequenceDiagram
autonumber
participant Py as Python caller
participant Ops as distributed.ops
participant AR as MNNVLAllReduce
participant Log as Logger
Py->>Ops: get_allreduce_mnnvl_workspace(mapping, dtype)
Ops->>AR: is_mnnvl(mapping, dtype)?
alt true
Ops->>Log: debug: attempting MNNVL
Ops->>AR: try construct(...)
alt success
Ops->>Log: info: MNNVL enabled
Ops-->>Py: return workspace
else failure
Ops->>Log: error: disable MNNVL
Ops-->>Py: return None
end
else false
Ops-->>Py: return None
end
Estimated code review effort🎯 4 (Complex) | ⏱️ ~60 minutes Possibly related PRs
Suggested reviewers
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Actionable comments posted: 3
Caution
Some comments are outside the diff and can’t be posted inline due to platform limitations.
⚠️ Outside diff range comments (5)
cpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp (3)
173-180: Missing error checks for CUDA host allocations and CU memsetcudaMallocHost/cudaFreeHost and cuMemsetD8 return status; unchecked failures can corrupt flow.
Apply:
- cudaMallocHost(&fabric_handle, sizeof(CUmemFabricHandle)); + TLLM_CUDA_CHECK(cudaMallocHost(reinterpret_cast<void**>(&fabric_handle), sizeof(CUmemFabricHandle))); @@ - cudaFreeHost(fabric_handle); + TLLM_CUDA_CHECK(cudaFreeHost(fabric_handle));And above:
- cudaMallocHost(&exphndl, mGroupSize * sizeof(CUmemFabricHandle)); + TLLM_CUDA_CHECK(cudaMallocHost(reinterpret_cast<void**>(&exphndl), mGroupSize * sizeof(CUmemFabricHandle))); @@ - cudaFreeHost(exphndl); + TLLM_CUDA_CHECK(cudaFreeHost(exphndl));Additionally:
- cuMemsetD8(mSignalPads[i], 0, kSIGNAL_PAD_SIZE); + TLLM_CU_CHECK(cuMemsetD8(mSignalPads[i], 0, kSIGNAL_PAD_SIZE));
142-149: roundUp assumes power-of-two granularity; use general formulaalloc_granularity and mc_granularity are not guaranteed to be powers of two. Bit-masking can under/over-round.
Apply:
-inline size_t roundUp(size_t val, size_t gran) -{ - return (val + gran - 1) & ~(gran - 1); -} +inline size_t roundUp(size_t val, size_t gran) +{ + return ((val + gran - 1) / gran) * gran; +}
113-124: Leak: address space reserved for UC region is never freedallocMnMcastMem reserves a contiguous VA range (ptr) for all UC maps but only unmaps each slice; it never calls cuMemAddressFree on the UC base. This leaks VA space until process exit.
Apply:
if (mIsMNNvlink) { for (uint32_t rank = 0; rank < mGroupSize; rank++) { TLLM_CU_CHECK(cuMemUnmap(mUcPtrs[rank], mAllocationSize)); // We need to release the handle on each rank TLLM_CU_CHECK(cuMemRelease(mUcHandles[rank])); } + if (!mUcPtrs.empty()) + { + TLLM_CU_CHECK(cuMemAddressFree(mUcPtrs[0], mAllocationSize * mGroupSize)); + } TLLM_CU_CHECK(cuMemUnmap(mMcPtr, mAllocationSize)); TLLM_CU_CHECK(cuMemAddressFree(mMcPtr, mAllocationSize)); TLLM_CU_CHECK(cuMemRelease(mMcHandle)); }cpp/tensorrt_llm/runtime/mcastGPUBuffer.h (2)
54-68: OOB risk: negative storageOffset and size overflow not handled; shape type should be int64_t.
- storageOffset < 0 will underflow when converted to size_t and can bypass the bound check.
- (numel + storageOffset) * elementSize may overflow size_t before the check.
- Prefer std::vector<int64_t> (PyTorch convention) and pass by const& to avoid copies.
- Error identifier casing should match the class/method for easier grep.
Apply:
- at::Tensor getUCBuffer(uint32_t rank, std::vector<long int> sizes, torch::ScalarType dtype, int64_t storageOffset) + at::Tensor getUCBuffer( + uint32_t rank, + std::vector<int64_t> const& sizes, + at::ScalarType dtype, + int64_t storageOffset) { - size_t const numel = std::accumulate(sizes.begin(), sizes.end(), 1UL, std::multiplies<size_t>()); - size_t const elementSize = c10::elementSize(dtype); - size_t const reqSize = (numel + storageOffset) * elementSize; - TORCH_CHECK(reqSize <= mBufSize, "McastGpuBuffer::getUcBuffer: the requested size (", reqSize, - " bytes) exceeds the allocated size (", mBufSize, " bytes)"); - auto* dataPtr = static_cast<uint8_t*>(mMcastDeviceMemory.getUnicastPtr(rank)) + storageOffset * elementSize; + TORCH_CHECK(storageOffset >= 0, "McastGPUBuffer::getUCBuffer: storageOffset must be non-negative"); + size_t const numel = std::accumulate( + sizes.begin(), sizes.end(), size_t{1}, + [](size_t a, int64_t b) { return a * static_cast<size_t>(b); }); + size_t const elementSize = c10::elementSize(dtype); + size_t const offsetElems = static_cast<size_t>(storageOffset); + size_t const reqElems = numel + offsetElems; + TORCH_CHECK( + elementSize != 0 && reqElems <= mBufSize / elementSize, + "McastGPUBuffer::getUCBuffer: requested size (", reqElems * elementSize, + " bytes) exceeds allocated size (", mBufSize, " bytes)"); + auto* basePtr = static_cast<uint8_t*>(mMcastDeviceMemory.getUnicastPtr(rank)); + auto* dataPtr = basePtr + offsetElems * elementSize; - auto options = at::TensorOptions().dtype(dtype).device(mLocalDevice); - return at::for_blob(dataPtr, c10::IntArrayRef(sizes)) + auto options = at::TensorOptions().dtype(dtype).device(mLocalDevice); + return at::for_blob(dataPtr, c10::IntArrayRef(sizes)) .options(options) .target_device(mLocalDevice) .make_tensor(); }Also make the header self-contained for these utilities (see include suggestion below).
75-89: Mirror the same safety and type fixes in getMCBuffer.- at::Tensor getMCBuffer(std::vector<long int> sizes, torch::ScalarType dtype, int64_t storageOffset) + at::Tensor getMCBuffer( + std::vector<int64_t> const& sizes, + at::ScalarType dtype, + int64_t storageOffset) { - size_t const numel = std::accumulate(sizes.begin(), sizes.end(), 1UL, std::multiplies<size_t>()); - size_t const elementSize = c10::elementSize(dtype); - size_t const reqSize = (numel + storageOffset) * elementSize; - TORCH_CHECK(reqSize <= mBufSize, "McastGpuBuffer::getMcBuffer: the requested size (", reqSize, - " bytes) exceeds the allocated size (", mBufSize, " bytes)"); - auto* dataPtr = static_cast<uint8_t*>(mMcastDeviceMemory.getMulticastPtr()) + storageOffset * elementSize; + TORCH_CHECK(storageOffset >= 0, "McastGPUBuffer::getMCBuffer: storageOffset must be non-negative"); + size_t const numel = std::accumulate( + sizes.begin(), sizes.end(), size_t{1}, + [](size_t a, int64_t b) { return a * static_cast<size_t>(b); }); + size_t const elementSize = c10::elementSize(dtype); + size_t const offsetElems = static_cast<size_t>(storageOffset); + size_t const reqElems = numel + offsetElems; + TORCH_CHECK( + elementSize != 0 && reqElems <= mBufSize / elementSize, + "McastGPUBuffer::getMCBuffer: requested size (", reqElems * elementSize, + " bytes) exceeds allocated size (", mBufSize, " bytes)"); + auto* basePtr = static_cast<uint8_t*>(mMcastDeviceMemory.getMulticastPtr()); + auto* dataPtr = basePtr + offsetElems * elementSize; - auto options = at::TensorOptions().dtype(dtype).device(mLocalDevice); - return at::for_blob(dataPtr, c10::IntArrayRef(sizes)) + auto options = at::TensorOptions().dtype(dtype).device(mLocalDevice); + return at::for_blob(dataPtr, c10::IntArrayRef(sizes)) .options(options) .target_device(mLocalDevice) .make_tensor(); }
🧹 Nitpick comments (8)
tensorrt_llm/_torch/models/modeling_deepseekv3.py (1)
764-769: Cap TP to gpus_per_node: logic looks correct; add guard for edge cases and consider single-node fast path.
- If Mapping.gpus_per_node were ever 0 or unset, gcd(tp, 0) == tp would skip the cap. Add an assertion or clamp to ensure gpus_per_node >= 1.
- Optional: gate the cap behind mapping.is_multi_node() to avoid extra gcd when single-node.
Example:
- if tp > self.mapping.gpus_per_node: + assert self.mapping.gpus_per_node >= 1, "gpus_per_node must be >= 1" + if self.mapping.is_multi_node() and tp > self.mapping.gpus_per_node: mlp_tp_size = math.gcd( tp, self.mapping.gpus_per_node, ) # Avoid costly inter-node TPcpp/tensorrt_llm/runtime/mcastDeviceMemory.h (1)
103-104: Per-group MPI communicator: good for isolation; document tag-domain expectations.
- Using a split communicator should prevent tag collisions across groups. Add a short comment near mGroupComm describing tag namespace isolation and expected source/dest patterns to aid future maintenance.
cpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp (1)
145-145: Typo in comment“grnularity” → “granularity”.
- // Round up the buffer size for grnularity + // Round up the buffer size for granularitytensorrt_llm/_torch/distributed/ops.py (1)
65-65: Remove unused variableforce_mn is computed but unused.
- force_mn = os.environ.get("TRTLLM_FORCE_MNNVL_AR", "0") == "1"cpp/tensorrt_llm/runtime/mcastGPUBuffer.h (4)
33-39: Docs out of sync with API (device → deviceIdx; GPU capitalization).Fix Doxygen names to match the constructor and use the class’ exact casing.
-//! \brief Constructor for McastGpuBuffer. +//! \brief Constructor for McastGPUBuffer. @@ -//! \param splitColor The color of the split for topology split. -//! \param device The CUDA device for buffer allocation. +//! \param splitColor Color used for topology group split (e.g., MPI_Comm_split 'color'). +//! \param deviceIdx CUDA device index for buffer allocation. //! \param mnNvlink Flag indicating if multi-node NVLink is used.
40-45: Avoid potential narrowing when constructing at::Device.Cast deviceIdx to at::DeviceIndex (mirrors torchUtils.h) to silence -Wconversion and keep consistency.
- , mLocalDevice(at::Device(at::DeviceType::CUDA, deviceIdx)) + , mLocalDevice(at::Device{at::DeviceType::CUDA, static_cast<at::DeviceIndex>(deviceIdx)})
16-20: Header should be self-contained; add standard includes (and consider guards per guidelines).
- Add the missing standard headers used by this file: , , and (if keeping std::multiplies) ; also for fixed-width types.
- Per repo guidelines, prefer include guards (TRTLLM_MCASTGPUBUFFER_H). Keeping #pragma once is fine, but adding guards would align with the standard here.
#pragma once +#include <cstdint> +#include <functional> +#include <numeric> +#include <vector> #include "tensorrt_llm/runtime/mcastDeviceMemory.h" #include "tensorrt_llm/runtime/torchUtils.h"
48-56: Precondition checks: rank bounds and lifetime note.
- Ensure rank is validated (rank < groupSize). If mMcastDeviceMemory::getUnicastPtr already checks this, all good—otherwise add a TORCH_CHECK here.
- Consider documenting that returned tensors alias external memory and require McastGPUBuffer (and its memory) to outlive them.
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cpp/tensorrt_llm/nanobind/runtime/bindings.cpp(1 hunks)cpp/tensorrt_llm/pybind/runtime/bindings.cpp(1 hunks)cpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp(7 hunks)cpp/tensorrt_llm/runtime/mcastDeviceMemory.h(3 hunks)cpp/tensorrt_llm/runtime/mcastGPUBuffer.h(4 hunks)tensorrt_llm/_torch/distributed/ops.py(5 hunks)tensorrt_llm/_torch/models/modeling_deepseekv3.py(1 hunks)
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🧠 Learnings (4)
📓 Common learnings
Learnt from: pcastonguay
PR: NVIDIA/TensorRT-LLM#7455
File: tensorrt_llm/_torch/pyexecutor/py_executor.py:1852-1860
Timestamp: 2025-09-02T13:42:44.844Z
Learning: In MPI communication within TensorRT-LLM pipeline parallelism, different communication types (tokens, logits, termination sync) must use disjoint tag namespaces to avoid message routing collisions when using the same source/destination patterns.
📚 Learning: 2025-08-14T06:36:40.701Z
Learnt from: timlee0212
PR: NVIDIA/TensorRT-LLM#6886
File: tensorrt_llm/_torch/models/modeling_deepseekv3.py:0-0
Timestamp: 2025-08-14T06:36:40.701Z
Learning: In DeepSeek V3 model (tensorrt_llm/_torch/models/modeling_deepseekv3.py), the disagreement between AllReduce.__init__ guard and _compute_mlp_tp_size logic for MNNVL usage is expected by design. The AllReduce component and MLP TP-size computation intentionally use different criteria for MNNVL availability decisions.
Applied to files:
tensorrt_llm/_torch/models/modeling_deepseekv3.pytensorrt_llm/_torch/distributed/ops.py
📚 Learning: 2025-08-19T12:45:11.997Z
Learnt from: amitz-nv
PR: NVIDIA/TensorRT-LLM#7033
File: tensorrt_llm/_torch/pyexecutor/model_engine.py:0-0
Timestamp: 2025-08-19T12:45:11.997Z
Learning: In tensorrt_llm/_torch/pyexecutor/model_engine.py, DoRA (Delta Orthogonal Rank Adaptation) functionality was removed from the PyTorch flow to eliminate issues with inverted DoRA detection logic. The original is_dora condition was checking if scaling_vec_pointer == 0, which was potentially incorrect.
Applied to files:
tensorrt_llm/_torch/models/modeling_deepseekv3.py
📚 Learning: 2025-09-02T13:42:44.844Z
Learnt from: pcastonguay
PR: NVIDIA/TensorRT-LLM#7455
File: tensorrt_llm/_torch/pyexecutor/py_executor.py:1852-1860
Timestamp: 2025-09-02T13:42:44.844Z
Learning: In MPI communication within TensorRT-LLM pipeline parallelism, different communication types (tokens, logits, termination sync) must use disjoint tag namespaces to avoid message routing collisions when using the same source/destination patterns.
Applied to files:
cpp/tensorrt_llm/runtime/mcastDeviceMemory.hcpp/tensorrt_llm/runtime/mcastDeviceMemory.cpptensorrt_llm/_torch/distributed/ops.py
🧬 Code graph analysis (3)
cpp/tensorrt_llm/runtime/mcastDeviceMemory.h (1)
cpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp (2)
McastDeviceMemory(40-105)McastDeviceMemory(107-130)
cpp/tensorrt_llm/runtime/mcastGPUBuffer.h (1)
cpp/tensorrt_llm/runtime/torchUtils.h (3)
Device(72-138)DeviceType(117-127)ScalarType(82-97)
tensorrt_llm/_torch/distributed/ops.py (4)
cpp/tensorrt_llm/runtime/mcastDeviceMemory.h (1)
tensorrt_llm(27-122)cpp/tensorrt_llm/runtime/mcastGPUBuffer.h (1)
tensorrt_llm(21-98)tensorrt_llm/_utils.py (1)
mpi_comm(475-476)tensorrt_llm/mapping.py (1)
local_rank(399-400)
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🔇 Additional comments (9)
cpp/tensorrt_llm/pybind/runtime/bindings.cpp (1)
437-439: Constructor signature in sync; please verify Python instantiations
- Header (cpp/tensorrt_llm/runtime/mcastGPUBuffer.h) and nanobind (cpp/tensorrt_llm/nanobind/runtime/bindings.cpp) both define McastGPUBuffer(size_t, uint32_t, uint32_t, uint32_t, uint32_t, bool) with matching arg names.
- No Python instantiation of McastGPUBuffer found under tensorrt_llm/**.py; manually confirm any call sites pass split_color as the 4th and device_idx as the 5th argument.
cpp/tensorrt_llm/runtime/mcastDeviceMemory.h (1)
20-20: Include added for MpiComm type is appropriate.cpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp (1)
40-52: Per-group communicator wiring looks correctConstructor extension and mGroupComm initialization via session().split(splitColor, mGroupRank) are consistent with topology-aware grouping.
cpp/tensorrt_llm/nanobind/runtime/bindings.cpp (2)
343-345: Binding signature update aligns with C++ ctorSix-arg nb::init matches McastGPUBuffer(bufSize, groupSize, groupRank, splitColor, deviceIdx, mnNvlink). Arg names are clear.
343-345: AllMcastGPUBuffercalls use the new 6-arg signature; no outdated 5-arg orat::Deviceforms remain.tensorrt_llm/_torch/distributed/ops.py (4)
78-86: McastGPUBuffer call matches new binding (split_color, device_idx)Argument order and values look correct: buf_size, tp_size, tp_rank, split_color, local_rank, mn_nvlink=True.
94-95: Barrier on the split communicator is appropriateThis avoids cross-topology synchronization and isolates tag space, preventing collisions (per prior MPI learnings).
463-481: Robust MNNVL initialization with fallbackis_mnnvl gate + try/except + logging is a sensible way to soft-enable and auto-fallback.
57-65: Confirm topology-aware Split color/key semantics
Ensure that usingcolor = pp_rank * cp_size + cp_rankandkey = tp_rankin mpi_comm().Split (ops.py:66) matches thesplitColorsemantics in the C++ constructor so that ranks form identical communicators on both sides.
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Signed-off-by: Shiyu Li <shili@nvidia.com>
Signed-off-by: Shiyu Li <shili@nvidia.com>
Signed-off-by: Shiyu Li <shili@nvidia.com>
Signed-off-by: Shiyu Li <shili@nvidia.com>
Signed-off-by: Shiyu Li <shili@nvidia.com>
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/bot run --add-multi-gpu-test --disable-fail-fast |
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PR_Github #17579 [ run ] triggered by Bot |
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PR_Github #17579 [ run ] completed with state |
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/bot run --add-multi-gpu-test --disable-fail-fast |
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PR_Github #17627 [ run ] triggered by Bot |
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PR_Github #17627 [ run ] completed with state |
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LGTM.
Summary by CodeRabbit
Description
This PR cherry-picks 7387 into the release/1.1.0rc2 branch.
Test Coverage
PR Checklist
Please review the following before submitting your PR:
PR description clearly explains what and why. If using CodeRabbit's summary, please make sure it makes sense.
PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.
Test cases are provided for new code paths (see test instructions)
Any new dependencies have been scanned for license and vulnerabilities
CODEOWNERS updated if ownership changes
Documentation updated as needed
The reviewers assigned automatically/manually are appropriate for the PR.
Please check this after reviewing the above items as appropriate for this PR.
GitHub Bot Help
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run [--reuse-test (optional)pipeline-id --disable-fail-fast --skip-test --stage-list "A10-PyTorch-1, xxx" --gpu-type "A30, H100_PCIe" --test-backend "pytorch, cpp" --add-multi-gpu-test --only-multi-gpu-test --disable-multi-gpu-test --post-merge --extra-stage "H100_PCIe-TensorRT-Post-Merge-1, xxx" --detailed-log --debug(experimental)]Launch build/test pipelines. All previously running jobs will be killed.
--reuse-test (optional)pipeline-id(OPTIONAL) : Allow the new pipeline to reuse build artifacts and skip successful test stages from a specified pipeline or the last pipeline if no pipeline-id is indicated. If the Git commit ID has changed, this option will be always ignored. The DEFAULT behavior of the bot is to reuse build artifacts and successful test results from the last pipeline.--disable-reuse-test(OPTIONAL) : Explicitly prevent the pipeline from reusing build artifacts and skipping successful test stages from a previous pipeline. Ensure that all builds and tests are run regardless of previous successes.--disable-fail-fast(OPTIONAL) : Disable fail fast on build/tests/infra failures.--skip-test(OPTIONAL) : Skip all test stages, but still run build stages, package stages and sanity check stages. Note: Does NOT update GitHub check status.--stage-list "A10-PyTorch-1, xxx"(OPTIONAL) : Only run the specified test stages. Examples: "A10-PyTorch-1, xxx". Note: Does NOT update GitHub check status.--gpu-type "A30, H100_PCIe"(OPTIONAL) : Only run the test stages on the specified GPU types. Examples: "A30, H100_PCIe". Note: Does NOT update GitHub check status.--test-backend "pytorch, cpp"(OPTIONAL) : Skip test stages which don't match the specified backends. Only support [pytorch, cpp, tensorrt, triton]. Examples: "pytorch, cpp" (does not run test stages with tensorrt or triton backend). Note: Does NOT update GitHub pipeline status.--only-multi-gpu-test(OPTIONAL) : Only run the multi-GPU tests. Note: Does NOT update GitHub check status.--disable-multi-gpu-test(OPTIONAL) : Disable the multi-GPU tests. Note: Does NOT update GitHub check status.--add-multi-gpu-test(OPTIONAL) : Force run the multi-GPU tests in addition to running L0 pre-merge pipeline.--post-merge(OPTIONAL) : Run the L0 post-merge pipeline instead of the ordinary L0 pre-merge pipeline.--extra-stage "H100_PCIe-TensorRT-Post-Merge-1, xxx"(OPTIONAL) : Run the ordinary L0 pre-merge pipeline and specified test stages. Examples: --extra-stage "H100_PCIe-TensorRT-Post-Merge-1, xxx".--detailed-log(OPTIONAL) : Enable flushing out all logs to the Jenkins console. This will significantly increase the log volume and may slow down the job.--debug(OPTIONAL) : Experimental feature. Enable access to the CI container for debugging purpose. Note: Specify exactly one stage in thestage-listparameter to access the appropriate container environment. Note: Does NOT update GitHub check status.For guidance on mapping tests to stage names, see
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scripts/test_to_stage_mapping.pyhelper.kill
killKill all running builds associated with pull request.
skip
skip --comment COMMENTSkip testing for latest commit on pull request.
--comment "Reason for skipping build/test"is required. IMPORTANT NOTE: This is dangerous since lack of user care and validation can cause top of tree to break.reuse-pipeline
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