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[None][feat] Add a standalone buffer cache class and reuse buffers between cduagraph and no-graph flow by HuiGao-NV · Pull Request #7669 · NVIDIA/TensorRT-LLM · GitHub
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@HuiGao-NV HuiGao-NV commented Sep 10, 2025

and no-graph flow

Summary by CodeRabbit

  • Performance
    • Centralized GPU memory buffer reuse for fused MoE improves throughput and reduces allocation overhead, especially with CUDA graphs.
  • Reliability
    • More robust workspace handling during CUDA graph capture minimizes sporadic failures and allocation errors.
  • Resource Usage
    • Reduced GPU memory fragmentation via buffer reuse across runs, enabling smoother long-running sessions.

Description

Test Coverage

PR Checklist

Please review the following before submitting your PR:

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  • PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.

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  • Documentation updated as needed

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  • Please check this after reviewing the above items as appropriate for this PR.

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@HuiGao-NV HuiGao-NV requested review from a team as code owners September 10, 2025 08:13
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📝 Walkthrough

Walkthrough

Adds a new CUDA memory buffer manager (Buffers) and a global accessor. Integrates it into DeepGemm Fused MoE to reuse workspaces, detect CUDA graph capture, and allocate from managed pools instead of direct allocations.

Changes

Cohort / File(s) Summary of Changes
Memory buffer manager
tensorrt_llm/_torch/memory_buffer_utils.py
Introduces Buffers class with graph/runtime buffer pools, buffer selection and allocation (get_buffer), graph-capture awareness, and a singleton accessor GetMemoryBuffer().
Fused MoE DeepGemm integration
tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py
Imports GetMemoryBuffer, adds class attribute buffer, updates get_workspace to detect stream capture and allocate workspace_0, workspace_1, workspace_sf via buffer manager instead of torch.empty.

Sequence Diagram(s)

sequenceDiagram
  autonumber
  participant M as DeepGemmFusedMoE.get_workspace
  participant B as Buffers (singleton)
  participant GP as Graph Pool
  participant RP as Runtime Pool
  participant Cuda as CUDA

  Note over M: Detect capture_graph = torch.cuda.is_current_stream_capturing()

  M->>B: get_buffer(shape,dtype, buffer_name, create_if_miss=True, pin_memory=capture_graph)
  alt pin_memory (graph capture)
    B->>GP: Find suitable buffer by name
    alt Found
      GP-->>B: Return candidate
    else Not found
      B->>Cuda: Allocate torch.zeros(..., device="cuda")
      B->>GP: Store buffer
    end
  else not capturing
    B->>RP: Check runtime buffer by name
    B->>GP: Check graph buffers by name
    Note over B: Select buffer with more elements if both exist
    alt Suitable found
      B-->>M: Return reshaped view
    else None suitable
      B->>RP: Delete existing runtime buffer (if any)
      B->>Cuda: Allocate torch.zeros(..., device="cuda")
      B->>RP: Store runtime buffer
    end
  end
  B-->>M: Return reshaped view (workspace_*)
  Note over M: Repeat for workspace_0, workspace_1, workspace_sf
Loading

Estimated code review effort

🎯 3 (Moderate) | ⏱️ ~25 minutes

Pre-merge checks (3 warnings)

❌ Failed checks (3 warnings)
Check name Status Explanation Resolution
Title Check ⚠️ Warning The title uses the correct prefix and touches on the buffer cache and reuse between graph and non-graph flows, but contains a typo (“cduagraph”), is overly long, and could be more concise and focused on the core change. Please correct the typo (“cduagraph” → “CUDA Graph”), shorten the title, and highlight the main feature, for example:
[None][feat] Add memory buffer manager and reuse buffers across CUDA Graph and non-graph flows.
Description Check ⚠️ Warning The description currently only includes template placeholders and the fragment “and no-graph flow,” but lacks any actual summary of the change, explanation of the solution, or details on test coverage, so reviewers cannot understand what was implemented or how it is verified. Please fill in the template sections with a concise summary of the added Buffers class and its reuse behavior, explain how it integrates into both graph and non-graph flows under “## Description,” and list relevant tests under “## Test Coverage” so the change is fully documented.
Docstring Coverage ⚠️ Warning Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%. You can run @coderabbitai generate docstrings to improve docstring coverage.

Pre-merge checks and finishing touches

❌ Failed checks (3 warnings)
Check name Status Explanation Resolution
Title Check ⚠️ Warning The title uses the correct prefix and touches on the buffer cache and reuse between graph and non-graph flows, but contains a typo (“cduagraph”), is overly long, and could be more concise and focused on the core change. Please correct the typo (“cduagraph” → “CUDA Graph”), shorten the title, and highlight the main feature, for example:
[None][feat] Add memory buffer manager and reuse buffers across CUDA Graph and non-graph flows.
Docstring Coverage ⚠️ Warning Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%. You can run @coderabbitai generate docstrings to improve docstring coverage.
Description Check ⚠️ Warning The provided PR description contains only the fragment "and no-graph flow" and otherwise leaves the repository PR template sections unfilled; the required title format, a substantive "Description", and the "Test Coverage" details are missing. Because the description does not explain what was changed, why, or which tests validate the change, reviewers cannot assess intent, scope, or risk of the new memory buffer module and the DeepGemm modifications. This lack of information makes the PR largely incomplete and unsuitable for merge review. Please update the PR to include a proper title following the repository template (for example: "[None][feat] Add buffer cache and reuse for graph/no-graph flows"), a detailed Description that summarizes the code changes and rationale, and a Test Coverage section listing the unit/integration tests or CI stages that validate buffer reuse and graph-capture behavior. Also address the PR checklist items (coding guidelines, documentation, CODEOWNERS if applicable), link any related tickets, and add minimal reproduction or smoke-test instructions so reviewers can validate the change.
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Actionable comments posted: 10

🧹 Nitpick comments (3)
tensorrt_llm/_torch/memory_buffer_utils.py (1)

77-77: Improve comment grammar.

The comment has grammatical issues that should be fixed for clarity.

-            # Reach here, no buffer is found. Then, we will use a new buffer to replace the small one. Release the memory first.
+            # If we reach here, no suitable buffer was found. Release any existing small buffer before allocating a new one.
tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py (2)

417-417: Consider adding documentation for CUDA graph capture detection.

The use of torch.cuda.is_current_stream_capturing() to detect graph capture context is a key design decision that should be documented.

Add a comment explaining the detection logic:

+        # Detect if we're in CUDA graph capture mode by checking the current stream state.
+        # During graph capture, we want to pin memory to avoid it being released back to the allocator.
         capture_graph = torch.cuda.is_current_stream_capturing()

369-371: Promote GetMemoryBuffer to instance attribute
Move the buffer = GetMemoryBuffer() out of the class scope into __init__ as self.buffer = GetMemoryBuffer() and document that this manager is intentionally shared across all MoE layer instances.

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Reviewing files that changed from the base of the PR and between 76c5e1a and 0d756d7.

📒 Files selected for processing (2)
  • tensorrt_llm/_torch/memory_buffer_utils.py (1 hunks)
  • tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py (3 hunks)
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🧠 Learnings (1)
📚 Learning: 2025-08-19T03:35:20.866Z
Learnt from: djns99
PR: NVIDIA/TensorRT-LLM#6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4616-4626
Timestamp: 2025-08-19T03:35:20.866Z
Learning: In the MOE profiler TMA workspace preparation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu), the overlapping of TMA WS regions for NONE and FINALIZE variants is deliberate design to save memory space, as confirmed by djns99. The comment "reuse the same pointers to save space" reflects this intentional behavior.

Applied to files:

  • tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py
🧬 Code graph analysis (2)
tensorrt_llm/_torch/memory_buffer_utils.py (1)
tensorrt_llm/_utils.py (1)
  • numel (968-969)
tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py (1)
tensorrt_llm/_torch/memory_buffer_utils.py (2)
  • GetMemoryBuffer (95-97)
  • get_buffer (30-89)
🪛 Ruff (0.12.2)
tensorrt_llm/_torch/memory_buffer_utils.py

31-31: Unused method argument: create_if_miss

(ARG002)

⏰ Context from checks skipped due to timeout of 90000ms. You can increase the timeout in your CodeRabbit configuration to a maximum of 15 minutes (900000ms). (1)
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🔇 Additional comments (1)
tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py (1)

718-724: Ignore workspace reuse issue: safe per-stream buffer reuse. The code binds workspace_0 to aux_stream and workspace_1 to the main stream, and CUDA streams guarantee that operations within a stream execute in submission order; the initial event‐record/join further synchronizes the two streams, preventing concurrent writes to the same buffer. (developer.nvidia.com)

Likely an incorrect or invalid review comment.

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/bot run

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PR_Github #18379 [ run ] triggered by Bot

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PR_Github #18379 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #13785 completed with status: 'FAILURE'

@HuiGao-NV HuiGao-NV force-pushed the add_buffer_cache_class branch from 0ba7adb to a5574c4 Compare September 10, 2025 22:54
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/bot run

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PR_Github #18412 [ run ] triggered by Bot

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PR_Github #18412 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #13811 completed with status: 'FAILURE'

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/bot run --stage-list="B200_PCIe-PyTorch-1" --add-multi-gpu-test --disable-fail-fast

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PR_Github #18456 [ run ] completed with state SUCCESS
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@HuiGao-NV HuiGao-NV force-pushed the add_buffer_cache_class branch from 8781b72 to 051bb73 Compare September 12, 2025 09:24
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/bot run --disable-fail-fast

@HuiGao-NV HuiGao-NV force-pushed the add_buffer_cache_class branch from 051bb73 to e56a4f6 Compare September 12, 2025 09:48
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/bot run --disable-fail-fast

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PR_Github #18472 [ run ] completed with state SUCCESS
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/bot run --stage-list="GB200-8_GPUs-2_Nodes-PyTorch-1,GB200-8_GPUs-2_Nodes-PyTorch-4,DGX_B200-8_GPUs-PyTorch-1"

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PR_Github #18486 [ run ] completed with state SUCCESS
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@HuiGao-NV HuiGao-NV force-pushed the add_buffer_cache_class branch from e56a4f6 to 4c7c30e Compare September 14, 2025 06:35
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/bot run --stage-list="GB200-8_GPUs-2_Nodes-PyTorch-1,GB200-8_GPUs-2_Nodes-PyTorch-4,DGX_B200-8_GPUs-PyTorch-1"

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PR_Github #18505 [ run ] completed with state SUCCESS
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@HuiGao-NV HuiGao-NV force-pushed the add_buffer_cache_class branch from 4c7c30e to fb10bc7 Compare September 14, 2025 14:15
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/bot run --stage-list="B200_PCIe-PyTorch-2" --add-multi-gpu-test

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PR_Github #19965 [ run ] completed with state SUCCESS
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/bot run --only-multi-gpu-test

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error: subprocess.CalledProcessError: Command 'nvidia-smi -L' returned non-zero exit status 255.
It seems to be a machine error. Need to rerun

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/bot run --only-multi-gpu-test --disable-fail-fast

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@HuiGao-NV HuiGao-NV force-pushed the add_buffer_cache_class branch from f1acc86 to f72369d Compare September 26, 2025 05:46
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pipeline of SBSA timed out when setup enviroment. Rerun the stages in it.

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/bot run --only-multi-gpu-test --stage-list="GB200-4_GPUs-PyTorch-1"

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@HuiGao-NV HuiGao-NV force-pushed the add_buffer_cache_class branch from f72369d to d53d10b Compare September 26, 2025 13:34
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/bot skip --comment "All stages passed before rebasement"

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PR_Github #20048 [ run ] completed with state SUCCESS
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PR_Github #20098 [ skip ] triggered by Bot

and no-graph flow

Signed-off-by: Hui Gao <huig@nvidia.com>
Signed-off-by: Hui Gao <huig@nvidia.com>
Signed-off-by: Hui Gao <huig@nvidia.com>
Signed-off-by: Hui Gao <huig@nvidia.com>
@HuiGao-NV HuiGao-NV force-pushed the add_buffer_cache_class branch from d53d10b to bd30b29 Compare September 26, 2025 13:42
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PR_Github #20098 [ skip ] completed with state SUCCESS
Skipping testing for commit d53d10b

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/bot skip --comment "All stages passed before rebasement"

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PR_Github #20103 [ skip ] completed with state SUCCESS
Skipping testing for commit bd30b29

@HuiGao-NV HuiGao-NV merged commit f4d3be4 into NVIDIA:main Sep 26, 2025
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@HuiGao-NV HuiGao-NV deleted the add_buffer_cache_class branch October 13, 2025 07:31
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