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[TRTLLM-6748][feat] add PDL support for more kernels #7977
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PR_Github #19895 [ run ] triggered by Bot |
📝 WalkthroughWalkthroughIntroduces a conditional CUDA kernel launch macro in envUtils.h and adopts it across several MoE-related kernels. Adds architecture-guarded cudaGridDependencySynchronize calls in multiple kernels. Updates several host-callable functions in moePrepareKernels.cu to accept a cudaStream_t and routes all launches through the new macro. Adds header includes for envUtils. Changes
Sequence Diagram(s)sequenceDiagram
autonumber
actor Host
participant Macro as LAUNCH_WITH_PDL_WHEN_ENABLED
participant Env as getEnvEnablePDL()
participant CUDA as CUDA Runtime
participant Kernel as Target Kernel
Host->>Macro: Launch request (grid, block, dynShm, stream, args)
Macro->>Env: Query PDL enabled?
alt PDL enabled
Macro->>CUDA: cudaLaunchConfig_t setup
Macro->>CUDA: cudaLaunchKernelEx(config, Kernel, args)
else PDL disabled
Macro->>CUDA: Kernel<<<grid, block, dynShm, stream>>>(args)
end
note over Kernel: On SM_90+\nconditionally calls cudaGridDependencySynchronize()
Estimated code review effort🎯 4 (Complex) | ⏱️ ~60 minutes Pre-merge checks and finishing touches❌ Failed checks (2 warnings)
✅ Passed checks (1 passed)
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Actionable comments posted: 5
Caution
Some comments are outside the diff and can’t be posted inline due to platform limitations.
⚠️ Outside diff range comments (4)
cpp/tensorrt_llm/common/envUtils.h (1)
18-22: Add required headers for cudaLaunchConfig_t and arg packingEnsure definitions for cudaLaunchConfig_t and allow pack utilities.
#pragma once #include <cstdint> +#include <cuda_runtime_api.h> +#include <array> +#include <utility> + #include <optional> #include <string>cpp/tensorrt_llm/kernels/moePrepareKernels.cu (3)
113-173: Guarded grid sync still requires explicit block-level sync here.
cudaGridDependencySynchronize()only enforces the per-grid dependency order between CTAs; it does not synchronize threads within a CTA. BothcomputeCountAndSendStaticsandrecvCountAndStaticsrely on every thread in the block having finished populating shared memory before the subsequent loops run. On SM90 the macro replaces the historical__syncthreads()that guaranteed that ordering, so these code paths now race and can read partially initialised shared state. Please restore the CTA barrier immediately after the guarded call (or keep the original__syncthreads()alongside it) to maintain correctness.
231-252: Missing CTA-wide barrier around grid dependency sync.Same issue here: the guarded
cudaGridDependencySynchronize()replaced the original block barrier, but the kernels still require a full CTA sync before entering the per-thread copy loops (shared state inlocalSendIndice,localBackwardIndice, andrankRecvCount). Without reintroducing__syncthreads(), SM90 builds can observe stale data. Please add the CTA barrier back right after the guarded call.
284-290: Restore the block-level synchronisation before tail fill.The tail-fill loop reads
totalRecvTokenCountthat was computed cooperatively. After insertingcudaGridDependencySynchronize(), we still need the CTA-wide barrier that used to sit here; otherwise threads can run ahead with stale totals. Please add back the__syncthreads().
🧹 Nitpick comments (1)
cpp/tensorrt_llm/kernels/moePrepareKernels.h (1)
22-22: Avoid unnecessary header dependencyThis header declares no symbols using envUtils; include it only in .cu where the launcher is used to reduce compile-time coupling.
-#include "tensorrt_llm/common/envUtils.h" +// Include envUtils.h only in implementation files that launch kernels.
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📒 Files selected for processing (6)
cpp/tensorrt_llm/common/envUtils.h(1 hunks)cpp/tensorrt_llm/kernels/fusedMoeCommKernels.cu(3 hunks)cpp/tensorrt_llm/kernels/fusedMoeCommKernels.h(1 hunks)cpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cu(8 hunks)cpp/tensorrt_llm/kernels/moePrepareKernels.cu(8 hunks)cpp/tensorrt_llm/kernels/moePrepareKernels.h(1 hunks)
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cpp/tensorrt_llm/kernels/fusedMoeCommKernels.hcpp/tensorrt_llm/kernels/moePrepareKernels.hcpp/tensorrt_llm/kernels/fusedMoeCommKernels.cucpp/tensorrt_llm/common/envUtils.hcpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cucpp/tensorrt_llm/kernels/moePrepareKernels.cu
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🧠 Learnings (9)
📚 Learning: 2025-09-23T15:01:00.070Z
Learnt from: nv-lschneider
PR: NVIDIA/TensorRT-LLM#7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:15-17
Timestamp: 2025-09-23T15:01:00.070Z
Learning: In TensorRT-LLM NCCL device kernels, the <sstream> header is not needed as an explicit include in config.cu because it's provided transitively through other headers. Local compilation testing confirms this works without the explicit include.
Applied to files:
cpp/tensorrt_llm/kernels/fusedMoeCommKernels.hcpp/tensorrt_llm/kernels/moePrepareKernels.hcpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cu
📚 Learning: 2025-09-23T15:01:00.070Z
Learnt from: nv-lschneider
PR: NVIDIA/TensorRT-LLM#7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:15-17
Timestamp: 2025-09-23T15:01:00.070Z
Learning: In TensorRT-LLM NCCL device kernels (cpp/tensorrt_llm/kernels/nccl_device/config.cu), std::ostringstream is used but <sstream> doesn't need to be explicitly included because it's provided transitively through other headers like tensorrt_llm/common/cudaUtils.h or config.h. Local compilation testing confirms this works without the explicit include.
Applied to files:
cpp/tensorrt_llm/kernels/fusedMoeCommKernels.hcpp/tensorrt_llm/kernels/moePrepareKernels.hcpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cu
📚 Learning: 2025-09-23T15:13:48.819Z
Learnt from: nv-lschneider
PR: NVIDIA/TensorRT-LLM#7910
File: cpp/tensorrt_llm/kernels/nccl_device/multimem.h:20-30
Timestamp: 2025-09-23T15:13:48.819Z
Learning: TRT-LLM targets modern CUDA toolkits that support FP8 datatypes, so cuda_fp8.h can be included unconditionally without version guards in TRT-LLM code.
Applied to files:
cpp/tensorrt_llm/kernels/fusedMoeCommKernels.hcpp/tensorrt_llm/kernels/moePrepareKernels.hcpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cu
📚 Learning: 2025-08-21T02:39:12.009Z
Learnt from: djns99
PR: NVIDIA/TensorRT-LLM#7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1475-1480
Timestamp: 2025-08-21T02:39:12.009Z
Learning: The min latency mode functionality in TensorRT-LLM MOE kernels (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu) is deprecated and no longer being maintained/updated, as confirmed by djns99. Bug reports and optimization suggestions for the computeStridesTmaWarpSpecializedLowLatencyKernel and related min latency code paths should be deprioritized.
Applied to files:
cpp/tensorrt_llm/kernels/fusedMoeCommKernels.cu
📚 Learning: 2025-08-19T03:35:20.866Z
Learnt from: djns99
PR: NVIDIA/TensorRT-LLM#6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4616-4626
Timestamp: 2025-08-19T03:35:20.866Z
Learning: In the MOE profiler TMA workspace preparation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu), the overlapping of TMA WS regions for NONE and FINALIZE variants is deliberate design to save memory space, as confirmed by djns99. The comment "reuse the same pointers to save space" reflects this intentional behavior.
Applied to files:
cpp/tensorrt_llm/kernels/fusedMoeCommKernels.cu
📚 Learning: 2025-08-08T22:03:40.707Z
Learnt from: sklevtsov-nvidia
PR: NVIDIA/TensorRT-LLM#3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1198-1209
Timestamp: 2025-08-08T22:03:40.707Z
Learning: In the CUTLASS MoE kernels (cpp/tensorrt_llm/cutlass_extensions), when `layout_info.fusion` is set to `TmaWarpSpecializedGroupedGemmInput::EpilogueFusion::FINALIZE`, the `router_scales` parameter must be non-null by design. The fused finalize kernel epilogue does not perform nullptr checks and requires valid router scales to function correctly. This is an implicit contract that callers must satisfy when enabling the FINALIZE fusion mode.
Applied to files:
cpp/tensorrt_llm/kernels/fusedMoeCommKernels.cu
📚 Learning: 2025-08-20T07:43:36.447Z
Learnt from: ChristinaZ
PR: NVIDIA/TensorRT-LLM#7068
File: cpp/tensorrt_llm/kernels/moeTopKFuncs.cuh:169-172
Timestamp: 2025-08-20T07:43:36.447Z
Learning: In TensorRT-LLM MOE kernels, when processing up to 128 experts across 32 threads, each thread handles at most 4 experts (N < 5 constraint), where N represents candidates per thread rather than total system capacity.
Applied to files:
cpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cucpp/tensorrt_llm/kernels/moePrepareKernels.cu
📚 Learning: 2025-08-25T00:03:39.294Z
Learnt from: djns99
PR: NVIDIA/TensorRT-LLM#7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1185-1189
Timestamp: 2025-08-25T00:03:39.294Z
Learning: TLLM_CHECK_WITH_INFO is a host-side utility function and cannot be called from CUDA device functions (those marked with __device__ or __global__). In device code, assert() is the primary mechanism for handling "should never happen" conditions, and like standard C++ assert, CUDA's assert only works in debug builds and is compiled out in release builds.
Applied to files:
cpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cu
📚 Learning: 2025-09-23T14:58:05.372Z
Learnt from: nv-lschneider
PR: NVIDIA/TensorRT-LLM#7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:42-49
Timestamp: 2025-09-23T14:58:05.372Z
Learning: In TensorRT-LLM NCCL device kernels (cpp/tensorrt_llm/kernels/nccl_device/), the token partitioning intentionally uses ceil-like distribution (same token_per_rank for all ranks) to ensure all ranks launch the same number of blocks. This is required for optimal NCCL device API barrier performance, even though it may launch extra blocks for non-existent tokens on later ranks. Runtime bounds checking in the kernel (blockID validation) handles the overshoot cases.
Applied to files:
cpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cucpp/tensorrt_llm/kernels/moePrepareKernels.cu
🧬 Code graph analysis (3)
cpp/tensorrt_llm/common/envUtils.h (2)
cpp/tensorrt_llm/kernels/moePrepareKernels.cu (5)
grid(302-302)grid(360-360)block(301-301)block(335-335)block(359-359)cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderMaskedMultiheadAttentionLaunch.h (1)
grid(259-345)
cpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cu (1)
cpp/tensorrt_llm/kernels/fusedMoeCommKernels.cu (4)
tokenCount(1066-1128)tokenCount(1066-1066)tokenCount(1140-1213)tokenCount(1140-1140)
cpp/tensorrt_llm/kernels/moePrepareKernels.cu (1)
cpp/tensorrt_llm/kernels/fusedMoeCommKernels.cu (4)
tokenCount(1066-1128)tokenCount(1066-1066)tokenCount(1140-1213)tokenCount(1140-1140)
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🔇 Additional comments (10)
cpp/tensorrt_llm/kernels/fusedMoeCommKernels.h (1)
23-23: LGTM: envUtils include aligns with new launcher usageHeader now exposes the macro/function to dependents.
cpp/tensorrt_llm/kernels/fusedMoeCommKernels.cu (3)
1072-1074: Verify need for cudaGridDependencySynchronize on SM90Guarded sync may impose a full-grid dependency barrier; confirm it’s required for correctness and that kernels are launched in a mode that supports grid dependency semantics on targeted toolkits.
1147-1149: Same concern: grid-dependency sync in receive pathConfirm correctness/perf trade-offs and launch-mode requirements.
1469-1470: LGTM: switch to PDL-aware launcherOnce the launcher is fixed to pack args, this call site is correct (dim3 grid/block already).
Please validate end-to-end that launches succeed with and without TRTLLM_ENABLE_PDL set.
cpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cu (6)
22-22: LGTM: envUtils includeNeeded for new launcher macro/function.
143-146: Verify SM90 grid-dependency sync is necessary herezeroExpertTokenCountKernel does only per-block writes; ensure the barrier is actually required.
185-187: Verify grid-dependency sync placementConfirm cudaGridDependencySynchronize before the counting loop is necessary and doesn’t regress perf.
336-339: Verify need for cudaGridDependencySynchronize in no-redundant route kernelConfirm launch-mode/toolkit support and benchmark impact.
515-517: Verify grid-dependency sync in sort route kernelAs above; ensure correctness requirement and acceptable overhead.
294-296: Launcher parameters alreadydim3; no action needed. ThegridDimandblockDimarguments are alreadydim3and compile correctly—ignore this suggestion.Likely an incorrect or invalid review comment.
cpp/tensorrt_llm/kernels/moeLoadBalance/moeLoadBalanceKernels.cu
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Signed-off-by: Zhenhuan Chen <zhenhuanc@nvidia.com>
Signed-off-by: Zhenhuan Chen <chenzhh3671@gmail.com>
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/bot [-h|--help]to print this help message.See details below for each supported subcommand.
run [--reuse-test (optional)pipeline-id --disable-fail-fast --skip-test --stage-list "A10-PyTorch-1, xxx" --gpu-type "A30, H100_PCIe" --test-backend "pytorch, cpp" --add-multi-gpu-test --only-multi-gpu-test --disable-multi-gpu-test --post-merge --extra-stage "H100_PCIe-TensorRT-Post-Merge-1, xxx" --detailed-log --debug(experimental)]Launch build/test pipelines. All previously running jobs will be killed.
--reuse-test (optional)pipeline-id(OPTIONAL) : Allow the new pipeline to reuse build artifacts and skip successful test stages from a specified pipeline or the last pipeline if no pipeline-id is indicated. If the Git commit ID has changed, this option will be always ignored. The DEFAULT behavior of the bot is to reuse build artifacts and successful test results from the last pipeline.--disable-reuse-test(OPTIONAL) : Explicitly prevent the pipeline from reusing build artifacts and skipping successful test stages from a previous pipeline. Ensure that all builds and tests are run regardless of previous successes.--disable-fail-fast(OPTIONAL) : Disable fail fast on build/tests/infra failures.--skip-test(OPTIONAL) : Skip all test stages, but still run build stages, package stages and sanity check stages. Note: Does NOT update GitHub check status.--stage-list "A10-PyTorch-1, xxx"(OPTIONAL) : Only run the specified test stages. Examples: "A10-PyTorch-1, xxx". Note: Does NOT update GitHub check status.--gpu-type "A30, H100_PCIe"(OPTIONAL) : Only run the test stages on the specified GPU types. Examples: "A30, H100_PCIe". Note: Does NOT update GitHub check status.--test-backend "pytorch, cpp"(OPTIONAL) : Skip test stages which don't match the specified backends. Only support [pytorch, cpp, tensorrt, triton]. Examples: "pytorch, cpp" (does not run test stages with tensorrt or triton backend). Note: Does NOT update GitHub pipeline status.--only-multi-gpu-test(OPTIONAL) : Only run the multi-GPU tests. Note: Does NOT update GitHub check status.--disable-multi-gpu-test(OPTIONAL) : Disable the multi-GPU tests. Note: Does NOT update GitHub check status.--add-multi-gpu-test(OPTIONAL) : Force run the multi-GPU tests in addition to running L0 pre-merge pipeline.--post-merge(OPTIONAL) : Run the L0 post-merge pipeline instead of the ordinary L0 pre-merge pipeline.--extra-stage "H100_PCIe-TensorRT-Post-Merge-1, xxx"(OPTIONAL) : Run the ordinary L0 pre-merge pipeline and specified test stages. Examples: --extra-stage "H100_PCIe-TensorRT-Post-Merge-1, xxx".--detailed-log(OPTIONAL) : Enable flushing out all logs to the Jenkins console. This will significantly increase the log volume and may slow down the job.--debug(OPTIONAL) : Experimental feature. Enable access to the CI container for debugging purpose. Note: Specify exactly one stage in thestage-listparameter to access the appropriate container environment. Note: Does NOT update GitHub check status.For guidance on mapping tests to stage names, see
docs/source/reference/ci-overview.mdand the
scripts/test_to_stage_mapping.pyhelper.kill
killKill all running builds associated with pull request.
skip
skip --comment COMMENTSkip testing for latest commit on pull request.
--comment "Reason for skipping build/test"is required. IMPORTANT NOTE: This is dangerous since lack of user care and validation can cause top of tree to break.reuse-pipeline
reuse-pipelineReuse a previous pipeline to validate current commit. This action will also kill all currently running builds associated with the pull request. IMPORTANT NOTE: This is dangerous since lack of user care and validation can cause top of tree to break.