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arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIoptimization
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Optimize a % b operation for ARM64 for following scenarios:
a is unsigned int, b is power of 2.
static uint PerformMod_1(uint i) {
return i % 8;
}Today we generate something like this:
53037C01 lsr w1, w0, #3
531D7021 lsl w1, w1, #3
4B010000 sub w0, w0, w1We can generate:
and w2, w1, 3a is signed int, b is power of 2.
static int PerformMod_2(int i) {
return i % 16;
}Today we generate:
G_M58511_IG02:
131F7C01 asr w1, w0, #31
12000C21 and w1, w1, #15
0B000021 add w1, w1, w0
13047C21 asr w1, w1, #4
531C6C21 lsl w1, w1, #4
4B010000 sub w0, w0, w1We can generate:
negs x1, x0
and x0, x0, #(n - 1)
and x1, x1, #(n - 1)
csneg x0, x0, x1, mia is an int, b is a variable.
static uint PerformMod_3(int i, int j) {
return i % j;
}Today we generate:
1AC10802 sdiv w2, w0, w1 # or udiv if a is unsigned
1B017C41 mul w1, w2, w1
4B010000 sub w0, w0, w1We can generate using msub:
sdiv w3, w2, w1
msub w3, w3, w1, w2Reference: https://godbolt.org/z/yxH8jZ
Reference: https://patchwork.kernel.org/patch/11126001/
category:cq
theme:optimization
skill-level:intermediate
cost:medium
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arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIoptimization