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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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We should consider using DC ZVA instruction in the runtime so it can be directly used by GC or other places where memset is needed. “DC ZVA” seems effective and takes memory system into write streaming mode which avoids doing a linefill the L1 cache during scenarios like memset. Last year, we merged the work to use “DC ZVA” for zero init the frame. I was hoping to see the memset implementation to be similar to the one suggested in Arm64 optimizing guide.
Some other refence: ARM-software/tf-issues#408
category:implementation
theme:intrinsics
skill-level:expert
cost:medium
impact:small
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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI