Ryan Johnson

Ryan Johnson

Portland, Oregon Metropolitan Area
361 followers 348 connections

About

My education and experience have been both technical and people focused, and that…

Activity

Experience

  • Mozilla Graphic

    Mozilla

    Portland, Oregon Metropolitan Area

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    Portland, Oregon Metropolitan Area

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    Portland, Oregon Metropolitan Area

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    Portland, Oregon Metropolitan Area

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    Portland, Oregon Metropolitan Area

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    Portland, Oregon Metropolitan Area

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    San Francisco Bay Area

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    San Francisco Bay Area

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    Greater Minneapolis-St. Paul Area

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    Greater Minneapolis-St. Paul Area

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    Greater Minneapolis-St. Paul Area

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    Greater Minneapolis-St. Paul Area

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    Greater Minneapolis-St. Paul Area

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    Greater Minneapolis-St. Paul Area

Education

  • University of St. Thomas Graphic

    University of St. Thomas

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    Activities and Societies: Led the psychology graduate student group (1994-1995).

    Graduated with Honors (4.0 GPA)

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    Graduated with Honors (GPA: Major: 3.94, Overall: 3.88)

Patents

  • Silicon object array with unidirectional segmented bus architecture

    Filed US 20040130346

    A logic array is provided, which includes a plurality of unidirectional segmented buses connecting a plurality of processing elements, called silicon objects, within an integrated circuit. The bus includes a string of unidirectional bus segments. Each silicon object includes a bus input coupled to one of the bus segments in the first bus, and a bus output coupled to a next subsequent one of the bus segments in the first bus. A landing circuit is coupled to the bus input for receiving digital…

    A logic array is provided, which includes a plurality of unidirectional segmented buses connecting a plurality of processing elements, called silicon objects, within an integrated circuit. The bus includes a string of unidirectional bus segments. Each silicon object includes a bus input coupled to one of the bus segments in the first bus, and a bus output coupled to a next subsequent one of the bus segments in the first bus. A landing circuit is coupled to the bus input for receiving digital information from the bus input. A function-specific logic block is coupled to an output of the landing circuit and has a result output. Each silicon object further includes a multiplexer having first and second inputs coupled to the bus input and the result output, respectively, and having an output coupled to the bus output.

    Other inventors
    • Kevin E. Atkinson
    • Timothy H. Dwyer
    • Mark D. Elpers
    • Dirk R. Helgemo
    See patent
  • Coding and decoding system and method for high-speed data transmission

    Filed US 20030152154

    This document discusses high speed data communication systems and methods, such as for communicating symbols using pulse-amplitude-modulated (PAM) or other multilevel (i.e., more than two) signal levels (e.g., PAM5 symbols using five signal levels). One example encodes and/or decodes between n-bit blocks of binary data (e.g., n=12) and m-symbol code words (e.g., m=6 PAM5 symbols). In this example, the code words are selected to limit the runlength of consecutive symbols transmitted without a…

    This document discusses high speed data communication systems and methods, such as for communicating symbols using pulse-amplitude-modulated (PAM) or other multilevel (i.e., more than two) signal levels (e.g., PAM5 symbols using five signal levels). One example encodes and/or decodes between n-bit blocks of binary data (e.g., n=12) and m-symbol code words (e.g., m=6 PAM5 symbols). In this example, the code words are selected to limit the runlength of consecutive symbols transmitted without a symmetric-about-baseline transition between signal levels. In another example, the code words bound a word disparity representing a cumulative deviation from baseline of the values of the symbols of the code words. In a further example, the code words bound an intraword disparity representing a symbol-by-symbol cumulative deviation from baseline, within the code word. Symmetric code words with the same amount, but opposite signs, of nonzero word disparity are paired and together mapped to a unique code of the n-bit block of binary data. During communication, a running disparity is computed, and the code word of the pair that will reduce the running disparity is communicated. Word boundaries are discerned by communicating a nondata control word. In one example, the code or control words are selected to improve immunity to single symbol transmission error. In another example, error checking is performed using the word and running disparities.

    See patent

Projects

  • txpool

    A persistent process pool in Python for use with Twisted. Twisted is a Python-based event-driven networking engine for doing asynchronous I/O.

    See project
  • walnut (unfinished)

    - Present

    A cross-process/cross-host Redis-based memoizing decorator in Python for asynchronous
    (and sycnhronous) functions in Twisted applications (http://twistedmatrix.com).

    See project

Languages

  • English

    Native or bilingual proficiency

  • Spanish

    Limited working proficiency

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