Digital System Design Project Light Weight Encryption Processor
Overview
You will design a simplified encryption processor. The processor features are: Feature Description Inputs 128-bit plain text 8-bit key = 8'haa55 (same key for round1 /round2) Reset/Clk Start Number of Rounds - Just two rounds - No initial round - No final round Transformations per round Implements four transformation: - Byte substitution (using s-box) - Row shift - Column mix - Add key
Processor Block Diagram
CLK reset
128
start plaintext key
128
Encryption Processor
128
round1 ciphertext round2 ciphertext
Design and Testbench Structure
Write a testbench to stimulate the design. You will be graded on the TB as well as the design
Constructs to avoid in the DUT, Can be used in TB
Construct Type initial events real time Notes Used only in test benches. Events make more sense for syncing test bench components. Real data type not supported. Time data type not supported.
force and release assign and deassign fork join primitives table Functions/Tasks
Force and release of data types not supported. assign and deassign of reg data types is not supported. But assign on wire data type is supported. Use nonblocking assignments to get same effect. Only gate level primitives are supported. UDP and tables are not
Deliverables
1. Short report 2. Code : DUT +TB +Tests
Logistics
Form teams of 2-3 members Deadline July 16