KEMBAR78
Cad For Vlsi Circuits | PDF
Scribd
Upload
2K views1 page

Cad For Vlsi Circuits

This document outlines the units of study for a course on CAD for VLSI circuits. The 5 units cover: 1) VLSI design methodologies and tools, 2) design rules and layout compaction algorithms, 3) floor planning concepts and routing algorithms, 4) gate-level and switch-level simulation, and 5) high-level synthesis including hardware modeling, allocation, assignment, scheduling, and transformations. The course totals 45 periods and references two textbooks on VLSI design automation algorithms.

Uploaded by

Rohith Raj
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
2K views1 page

Cad For Vlsi Circuits

This document outlines the units of study for a course on CAD for VLSI circuits. The 5 units cover: 1) VLSI design methodologies and tools, 2) design rules and layout compaction algorithms, 3) floor planning concepts and routing algorithms, 4) gate-level and switch-level simulation, and 5) high-level synthesis including hardware modeling, allocation, assignment, scheduling, and transformations. The course totals 45 periods and references two textbooks on VLSI design automation algorithms.

Uploaded by

Rohith Raj
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 1

VL9221

CAD FOR VLSI CIRCUITS

LT P C 3003

UNIT I VLSI DESIGN METHODOLOGIES Introduction to VLSI Design methodologies - Review of Data structures and algorithms - Review of VLSI Design automation tools - Algorithmic Graph Theory and Computational Complexity - Tractable and Intractable problems - general purpose methods for combinatorial optimization. UNIT II DESIGN RULES Layout Compaction - Design rules - problem formulation - algorithms for constraint graph compaction - placement and partitioning - Circuit representation - Placement algorithms - partitioning UNIT III FLOOR PLANNING Floor planning concepts - shape functions and floorplan sizing - Types of local routing problems - Area routing - channel routing - global routing - algorithms for global routing. UNIT IV SIMULATION Simulation - Gate-level modeling and simulation - Switch-level modeling and simulation - Combinational Logic Synthesis - Binary Decision Diagrams - Two Level Logic Synthesis. UNIT V MODELLING AND SYNTHESIS High level Synthesis - Hardware models - Internal representation - Allocation assignment and scheduling - Simple scheduling algorithm - Assignment problem High level transformations. TOTAL: 45 PERIODS REFERENCES: 1. S.H. Gerez, "Algorithms for VLSI Design Automation", John Wiley & 2. Sons,2002. 3. N.A. Sherwani, "Algorithms for VLSI Physical Design Automation", Kluwer Academic Publishers, 2002.

You might also like