Hold Time ECO for hierarchical design
Albert Li, Global Unichip Corporation
albert.li@globalunichip.com
J.J. Hsiao, Dorado Design Automation
jjhsiao@dorado-da.com
March 26, 2009 / DAC User Track
The ECO Company
Agenda
z Introduction
z Contributions
z Hold Time ECO Flow
z Flow Descriptions
z Case Study
z Conceptual Limitations
Introduction
Number of corners, number of modes, and number of subdesign blocks are the three major panic index of todays
hold time fixing. The increasing number of corners and
modes raises the possibility of cross mode setup-hold
conflict, while the increasing number of sub-design blocks
results more cross partition timing issues. Either the cross
mode or the cross partition timing issues will require large
number of ECOs, if not well addressed somewhere else in
the design flow.
The hold time ECO flow introduced here dramatically
benefits both logic team and physical team with the
following major contributions.
Contributions
z Hold time ECO for whole chip at once, not a block by block
approach.
~
~
Need only one engineer to handle the ECO job
Output ECO netlist and ECO placement (DEF) of each block for
individual ECO route
z For a real tapeout (65nm/5.2M instances) with eight subdesign blocks, the flow processes 38 STA scenarios at once,
within four hours.
z Setup time are kept intact during hold time fixing.
z Pre-ECO analysis validates the targeted hold time uncertainty
in advance. It reduces time consuming ECO iterations.
z Flexible hold time fixing strategies for less area overhead.
Hold Time ECO Flow
Block Level P&R
Fix 95% of the Hold vios
Whole Chip Data
.v
.def
.spef
.sdf
Pre-ECO Slack Paths analysis
Whole Chip STA
Slack Reports of all scenarios
Path Analysis
Predict difficulty for meeting the target
Hold Time uncertainty
Decide Hold Fix strategies for groups of
corners / modes / sub-blocks
Path Compacting
MMMC Setup Free
Hold Fix
Extract dominating slack paths
Enable handling 40+ scenarios of data at
once
Fundamentally architechted for MMMC
ECO
Keep Setup time intact during Hold Fix
Each corners
ECO.sdf
.v
Each blocks
ECO.def
Legend:
Hold Time ECO Flow
Tweaker
Pre-ECO STA
*MMMC: Multi-Mode, Multi-Corner
ECO Route
Flow Descriptions
Block Level P&R
Fix 95% of the Hold vios
z Fix 95% of hold time violations at block level P&R
~
Assume that the timing will be signed-off based on three RC,
four sdcs, and three library corners ( 36 basic STA scenarios +
possible SI/derating scenarios).
P&R with single RC and sdcs of major operation modes. ( Less
MMMC scenarios, less loading for P&R tools).
z Leave the last few, say 5%, hold time violations to be
addressed by the proposed flow.
~
The last few violations can only be fixed by a flow with the
capability of handling all scenarios.
Flow Descriptions
Whole Chip STA
Slack Reports of all scenarios
z Dump slack reports of all scenarios at chip level STA.
~
The slack reports are of signoff quality. Correlation issues are
minimized.
z Feed the slack reports, as well as the signoff SPEF, SDF,
and DEF, into the flow.
~
The proposed flow is with design data of signoff quality and
always take physical information into consideration.
Flow Descriptions
Path Analysis
z Pre-ECO slack paths analysis
z Predict difficulty for meeting the target Hold Time uncertainty
~
~
The hold time uncertainty is indeed where the hold time
violations come from.
Effective feasibility prediction reduces time consuming ECO
iterations.
Flow Descriptions
Path Compacting
z Extract dominating slack paths
~
~
Therere many identical paths, with different slack, reside in
various scenarios of slack reports.
By extracting the dominating (unique) paths, the number of Hold
Paths fed into the hold time fixing engine can be reduced
dramatically.
Path Compacting enables the flow to handle more than 40
scenarios of slack reports.
Flow Descriptions
MMMC Setup Free
Hold Fix
Merge Timing Window Files
of all scenarios of STA
Timing Window Before Buffer Insertion
(-0.4:0.2)
FF
(-0.4:0.6)
(-0.3:0.2)
(-0.3:0.2)
(-0.3:0.2)
(-0.3:0.2)
(-0.3:0.3)
(-0.4:0.2)
FF
Construct Path Domain Graph
(-0.3:0.3)
Insert 0.1
Evaluate Setup Budget
FF
FF
Hold Fix
Timing Window After Buffer Insertion
Update Timing Window
(-0.4:0.2)
FF
(-0.4:0.6)
(-0.2:0.0)
(-0.2:0.0)
(-0.2:0.0)
(-0.2:0.0)
(-0.2:0.1)
(-0.4:0.0)
Update Slack Domain Graph
FF
D
Setup Free Hold Fix
(-0.2:0.1)
(min slack:max slack) pin slack in ns
FF
FF
fast corner
slow corner
Hold Time fixing strategies
z Various strategies for less area overhead
Common Point Insertion
Dummy Load Hook-ups
Hi-Fanout Insertion
Cell Swapping
Case Study
z Design: 65nm / 5.2M instances / 8 sub-design blocks
~
~
~
~
~
~
~
~
Violated Hold Paths: 24362 (end points)
Number of STA scenarios: 38
Inserted cells: 11324 cells
(BUFX1: 9866, BUFX2: 602, BUFX8: 33, DELX1: 823)
Area:19740 um^2 ( ~= 140x140)
Run Time: 4 hours
Result: Hold time violations: 24362/-0.70 down to 38/-0.01
Setup time violations: minor impact (could be due to routing
change)
Original
ECO Result
Setup/WNS
Hold/WNS
Setup/WNS
Hold/WNS
116/-0.3063
24362/-0.70
113/-0.3084
38/-0.01
wc_rctyp_norm
All 38 scenarios
wc_rctyp_norm
All 38 scenarios
Conceptual Limitations
z Run time (number of scenarios x number of hold violations)
~
The proposed flow is positioned as a Hold Time ECO flow with
capability of handling all scenarios of signoff STA. It is not
suggested to leave all the hold time violations to be addressed
by the flow.
It is suggest to use your P&R tool to fix 95% of the hold time
violations with major but minimum number of scenarios. The idea
is simply for relieving MMMC loading of P&R tools but still fully
utilize the advantage of P&R tools.
