System Software and
Machine Architecture
Book: L. Beck and Manjula
System Software
n
System software consists of a variety of
programs that support the operation of a
computer, e.g.
q
Text editor, compiler, loader or linker, debugger,
macro processors, operating system, database
management systems, software engineering tools,
.
People
Application Program
Debugging Aids
Utility Program (Library)
Macro Processor
Compiler
Assembler
Text Editor
Loader and Linker
OS
Memory
Processor
Device
Information
Management
and Process
Management
Management
Management
Bare Machine (Computer)
System Software & Architecture
n
System software differs from application
software in machine dependency
q
System programs are intended to support the
operation and use of the computer itself, rather
than any particular application.
Simplified Instructional Computer (SIC)
q
SIC is a hypothetical computer that includes the
hardware features most often found on real
machines, while avoiding unusual or irrelevant
complexities
Simplified Instructional Computer
n
Like many other products, SIC comes in two
versions
q
q
The standard model
An XE version
n
extra equipments, extra expensive
The two versions have been designed to be
upward compatible
SIC Machine Architecture
n
Memory
q
q
q
Memory consists of 8-bit bytes, 15-bit addresses
Any 3 consecutive bytes form a word (24 bits)
Total of 32768 (215) bytes in the computer memory
Registers
q
Five registers, each is 24 bits in length
Mnemonic
Number
Special use
Accumulator
Index register
Linkage register
PC
Program counter
SW
Status word
SIC Machine Architecture
n
Data formats
q
q
q
24-bit integer representation in 2s complement
8-bit ASCII code for characters
No floating-point on standard version of SIC
Instruction formats
q
Standard version of SIC
8
15
opcode
address
The flag bit x is used to indicate indexedaddressing mode
SIC Machine Architecture
n
Addressing modes
q
Two addressing modes
n
Indicated by the x bit in the instruction
Mode
Indication
Target address calculation
Direct
x=0
TA=address
Indexed
x=1
TA=address+(X)
(X): the contents of register X
SIC Machine Architecture
Instruction set:
n Load/store registers: LDA, LDX, STA, STX
n Integer arithmetic: ADD, SUB, MUL, DIV
q
COMP
q
All involve register A and a word in memory, result
stored in register A
Compare value in register A with a word in
memory
Set a condition code CC (<, =, or >)
Conditional jump instructions
q
JMP, JLT, JEQ, JGT: test CC and jump
Source: (Appendix A, Page 495)
SIC Machine Architecture
n
Subroutine linkage
q
JSUB, RSUB: return address in register L
Input and output
q
q
q
Performed by transferring 1 byte at a time to or
from the rightmost 8 bits of register A
Each device is assigned a unique 8-bit code, as an
operand of I/O instructions
Test Device (TD): < (ready), = (not ready)
Read Data (RD), Write Data (WD)
SIC Programming Example
n
Data movement
ALPHA
FIVE
CHARZ
C1
LDA
STA
LDCH
STCH
.
.
.
RESW
WORD
BYTE
RESB
FIVE
ALPHA
CHARZ
C1
load 5 into A
store in ALPHA
load Z into A
store in C1
1
5
CZ
1
reserve one word space
one word holding 5
one-byte constant
one-byte variable
SIC Programming Example
n
Arithmetic operations: BETA = ALPHA+INCR-1
ONE
ALPHA
BETA
GAMMA
DELTA
INCR
LDA
ADD
SUB
STA
LDA
ADD
SUB
STA
...
WORD
RESW
RESW
RESW
RESW
RESW
ALPHA
INCR
ONE
BETA
GAMMA
INCR
ONE
DELTA
1
1
1
1
1
1
one-word constant
one-word variables
SIC Programming Example
n
Looping and indexing: copy one string to another
MOVECH
STR1
STR2
ZERO
ELEVEN
LDX
LDCH
STCH
TIX
JLT
.
.
.
BYTE
RESB
WORD
WORD
ZERO
STR1,X
STR2,X
ELEVEN
MOVECH
initialize index register to 0
load char from STR1 to reg A
add 1 to index, compare to 11
loop if less than
CTEST STRING
11
0
11
SIC Programming Example
ADDLP
INDEX
ALPHA
BETA
GAMMA
ZERO
THREE
K300
LDA
STA
LDX
LDA
ADD
STA
LDA
ADD
STA
COMP
JLT
...
...
RESW
RESW
RESW
RESW
WORD
WORD
WORD
ZERO
INDEX
INDEX
ALPHA,X
BETA,X
GAMMA,X
INDEX
THREE
INDEX
K300
ADDLP
1
100
100
100
0
3
300
initialize index value to 0
load index value to reg X
load word from ALPHA into reg A
store the result in a word in GAMMA
add 3 to index value
compare new index value to 300
loop if less than 300
array variables100 words each
one-word constants
SIC Programming Example
n
Input and output
INLOOP
OUTLP
INDEV
OUTDEV
DATA
TD
JEQ
RD
STCH
.
.
TD
JEQ
LDCH
WD
.
.
BYTE
BYTE
RESB
INDEV
INLOOP
INDEV
DATA
test input device
loop until device is ready
read one byte into register A
OUTDEV
OUTLP
DATA
OUTDEV
test output device
loop until device is ready
XF1
X05
1
input device number
output device number
write one byte to output device
SIC/XE Machine Architecture
n
Memory
q
Maximum memory available on a SIC/XE system is
1 megabyte (220 bytes)
An address (20 bits) cannot be fitted into a 15-bit
field as in SIC Standard
Must change instruction formats and addressing
modes
SIC/XE Machine Architecture
n
Registers
q
Additional registers are provided by SIC/XE
Mnemonic
Number
Special use
Base register
General working register
General working register
Floating-point accumulator (48 bits)
SIC/XE Machine Architecture
n
There is a 48-bit floating-point data type
q
q
fraction is a value between 0 and 1
exponent is an unsigned binary number between 0
and 2047
The binary point is immediately before the high
order bit which must be 1
1
11
36
exponent
fraction
f*2(e-1024)
Floating Point (cont) SIC/XE
n
n
n
n
Suppose the exponent is e and the fraction is f
The number is f * 2 (e+1024)
0 sign is positive
1 is negative
Data Formats Example
n
Integer
5 = 000000000000000000000101
-5 = 111111111111111111111011
Character
A 01000001
Data Formats Example
n
Float
4.89 = .1001110001111010111000010100011110
10111000010100 * 23 (1027)
=0 10000000011 100111000111101011
100001010001111010
Data Formats Example
n
Float
-.000489 = 100000000011000000
111100000001111110 * 2-10
=1 01111110110 100000000011000000
111100000001111110
(1014)
SIC/XE Machine Architecture
n
Instruction formats
8
Format 1 (1 byte)
op
Format 2 (2 bytes)
Format 3 (3 bytes)
Format 4 (4 bytes)
op
r1
r2
1 1 1 1 1 1
12
op
n i x b p e
disp
1 1 1 1 1 1
20
op
n i x b p e
address
Formats 1 and 2 do not reference memory at all
Bit e (0: use format 3 and 1: use format 4)
SIC/XE Machine Architecture
n
Base Relative Addressing Mode
n i x b p e
opcode
1 0
b=1, p=0, TA=(B)+disp
disp
(0disp 4095)
Program-Counter Relative Addressing Mode
n i x b p e
opcode
b=0, p=1, TA=(PC)+disp
0 1
disp
(-2048disp 2047)
SIC/XE Machine Architecture
n
Direct Addressing Mode
n i x b p e
opcode
0 0
b=0, p=0, TA=disp
disp
(0disp 4095)
n i x b p e
opcode
1 0 0
b=0, p=0, TA=(X)+disp
(with index addressing mode)
disp
SIC/XE Machine Architecture
n
Immediate Addressing Mode
n i x b p e
opcode
0 1 0
disp
n=0, i=1, x=0, operand=disp (no memory reference)
n
Indirect Addressing Mode
n i x b p e
opcode
1 0 0
n=1, i=0, x=0, TA=(disp)
disp
SIC/XE Machine Architecture
n
Simple Addressing Mode
n i x b p e
opcode
0 0
disp
i=0, n=0, TA= location of operand (SIC standard)
n i x b p e
opcode
1 1
disp
i=1, n=1, TA= location of operand (SIC/XE standard)
SIC/XE Machine Architecture
n
Addressing Modes Summary
Assembler decides
which format to use
SIC/XE Machine Architecture
Example Instruction
Format
(PC) + disp
(B) + disp + (X)
((PC) + disp)
disp
b/p/e + disp
addr
SIC/XE Machine Architecture
n
Instruction set:
q
q
load and store the new registers: LDB, STB, etc.
Floating-point arithmetic operations
n
q
q
Register move: RMO
Register-to-register arithmetic operations
n
ADDF, SUBF, MULF, DIVF
ADDR, SUBR, MULR, DIVR
Supervisor call: SVC
Input and output:
q
I/O channels to perform I/O while CPU is executing
other instructions: SIO, TIO, HIO
SIC/XE Programming Example
SIC version
ALPHA
FIVE
CHARZ
C1
LDA
STA
LDCH
STCH
.
.
.
RESW
WORD
BYTE
RESB
SIC/XE version
FIVE
ALPHA
CHARZ
C1
1
5
CZ
1
ALPHA
C1
LDA
STA
LDCH
STCH
.
.
.
RESW
RESB
#5
ALPHA
#90
C1
1
1
SIC/XE Programming Example
ALPHA
BETA
GAMMA
DELTA
INCR
LDS
LDA
ADDR
SUB
STA
LDA
ADDR
SUB
STA
...
...
RESW
RESW
RESW
RESW
RESW
INCR
ALPHA
S,A
#1
BETA
GAMMA
S,A
#1
DELTA
1
1
1
1
1
BETA=ALPHA+INCR-1
DELTA=GAMMA+INCR-1
one-word variables
SIC/XE Programming Example
n
Looping and indexing: copy one string to another
MOVECH
STR1
STR2
LDT
LDX
LDCH
STCH
TIXR
JLT
.
.
.
BYTE
RESB
#11
#0
STR1,X
STR2,X
T
MOVECH
initialize register T to 11
initialize index register to 0
load char from STR1 to reg A
store char into STR2
add 1 to index, compare to 11
loop if less than 11
CTEST STRING
11
SIC/XE Programming Example
ADDLP
ALPHA
BETA
GAMMA
LDS
LDT
LDX
LDA
ADD
STA
ADDR
COMPR
JLT
...
...
RESW
RESW
RESW
#3
#300
#0
ALPHA,X
BETA,X
GAMMA,X
S,X
X,T
ADDLP
100
100
100
load from ALPHA to reg A
store in a word in GAMMA
add 3 to index value
compare to 300
loop if less than 300
array variables100 words each
SIC/XE Programming Example
