EC2357: VLSI Design Lab
Tanner EDA Tutorials 1
S-EDIT and T-SPICE
Prepared by
C. Thiruvenkatesan
Associate Professor / ECE
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SPICE (Simulation Program with Integrated Circuit Emphasis)
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Circuit simulation is an important part of any design process.
By simulating your circuits, you can detect errors early in the process, and
avoid costly and time consuming prototype reworking.
SPICE is a computer simulation and modelling program used by engineers
to mathematically predict the behaviour of electronic circuits.
Developed at the University of California at Berkeley, SPICE can be used to
simulate circuits of almost all complexities.
However, SPICE is generally used to predict the behaviour of low to mid
frequency (DC to around 100MHz) circuits.
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SPICE has the ability to simulate components ranging from the most basic
passive elements such as resistors and capacitors to sophisticated
semiconductor devices such as MESFETs and MOSFETs.
Using these intrinsic components as the basic building blocks for larger
models, designers and chip manufacturers have been able to define a truly
vast and diverse number of SPICE models.
Most commercially available simulators include more than 15,000 different
components.
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The quality of SPICE models can vary, and not all SPICE models are
applicable to every application.
It is important to consider this when using the models supplied with a
SPICE simulation package.
Using a SPICE model inappropriately can lead to inaccurate results, or
even generate an error in some circumstances.
One of the most common errors made by even seasoned engineers is
confusing a SPICE model with a PSPICE model.
PSPICE is a commercially available program that uses proprietary
languages to define components and models.
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A circuit must be presented to SPICE in the form of a netlist.
The netlist is a text description of all circuit elements such as transistors
and capacitors, and their corresponding connections.
Modern schematic capture and simulation tools such as Multisim /
S-EDIT allow users to draw circuit schematics in a user-friendly
environment, and automatically translate the circuit diagrams into
netlists.
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Cadence OrCAD Solutions
TINA Design Suite
NI Multisim Software
5Spice
LTSpice Software
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Schematic Capture: S-Edit
S-Edit is an easy-to-use design environment for schematic capture and it gives you the
power you need to handle your most complex full custom IC design capture.
S-Edits tight integration with SPICE simulation allows viewing operating point results
directly on the schematic and performing waveform cross-probing to view node voltages
and device terminal currents or charges.
S-Edit imports schematics via EDIF from third party tools, including Cadence, Mentor,
Laker, ORCAD and ViewDraw with automatic conversion of schematics and properties for
seamless integration of legacy data.
S-Edits schematic design checks enables you to check your design for common errors
such as un-driven nets, unconnected pins and nets driven by multiple outputs so you can
catch errors early before running simulations.
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Analog Simulation: T-Spice & W-Edit
T-Spice performs fast, accurate simulations for analog and mixed-signal IC designs and
fully supports foundry models for reliable and accurate simulations.
T-Spice offers HSPICE and PSpice compatible syntax and supports the latest industry
models, including PSP, BSIM3.3, BSIM4.6, BSIM SOI 4.0, EKV 2.6, MOS 9, PSP, RPI a-Si &
Poly-Si TFT, VBIC, and MEXTRAM models to allow easy integration of legacy designs and
foundry models.
T-Spice lets you precisely characterize circuit behaviour using virtual data measurements,
Monte Carlo analysis, and parameter sweeping.
T-Spice supports Verilog-A for analog behavioural modelling, allowing designers to prove
system level designs before doing full device level design.
W-Edit provides an intuitive multiple-window, multiple-chart interface for easy viewing
and analyzing waveforms and data in highly configurable formats.
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Physical Layout: L-Edit
L-Edit is a complete hierarchical physical layout editor combining fast rendering and
built-in productivity tools to let you maximize your efficiency when creating the layout
for your design.
Take full advantage of L-Edits optimized editing which allows you to edit layout with
fewer mouse clicks than any other layout editor, for maximum efficiency.
Speed up design cycles with built-in productivity tools such as object snapping, alignment
tools, automatic guard ring generation, complex Boolean operations on objects or layers,
and cross-probing between schematic and layout.
L-Edit supports parameterized cells allowing you to create automatic custom layout
generators or use DevGen to easily setup layout generators for most common devices such
as MOSFETs, resistors, or capacitors.
L-Edits built-in Interactive DRC displays violations in real time while you edit your
layout, helping you create compact, error-free layouts the first time.
L-Edits Node Highlighting capability allows you to highlight all geometry connected to a
node so you can quickly find and fix LVS problems such as shorts and opens.
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Thank you
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