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8085 MP

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144 views16 pages

8085 MP

microprocessor

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Anil Rawat
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4NARO17 GATE 2018- Previous Solutions & Video Lectures for FREE: Previous GATE Questions on Microprecessors and Memary Mapping with Sluion (1967 40am? PAPER TAS Gateway to Se & IITs Home GATE GATE 2014 Keys__-Yearwise GATE Questions Topics Previous GATE p: pers (1987 -2047) In-Depth Concepts Practice Questions wm Solution GATE Quest Practice Problems GATE Exam Notes Porrercy Soi & @ Start Download = ee eee bal View PDF A " ww DS eanr Previous GATE Questions on Microprocessors and ‘Memory Mapping with Solutions (1987 - Till Date) 191 ‘The program given below i un onan 8085 based microcomputer system, Determine the contents ofthe rpsters: PC, SP, B,C, H, Later a halt instroction is execute, Sutloa tps Pew taco vate a is 1992 nan 8085 microprocessor sytem with memory mapped VO, ‘UO devices have 16 bt addressee UO deviees are accessed using [Nand OUT instructions ©. There can be a maximum of 256 input devices snd 256 output devices ‘4. Asitimetic and logic operations ean be diet performed with the YO dats, Anawest A Station bpm youtube com vatehPy-CT¥aRQICE 2. The following program is run on 8085 microprocessor: iipshwwr gatopaperin2014tiprovius-gale-questers-on_14hinl He 4/4201 GATE 2018- Previous Solutions & Video Lectures for FREE: Previous GATE Questions on Microprecessors and Memary Mapping with Sluion (1967 a Track Your Internet Speed Wena MY SPEED TEST@) sos > Deseo CGA Aci isi ve Mar Ques wit Preis CATE Quins alo Dig Previes GAT Qos Miao ad ‘car: Preis Gaon oe Meri ROM, CoAT ers Goons en Agana GATE Perit Quoting ates ly aps Pron GATE Quoin o8 1C gi Panes Prt GATE Qos ee Molin MUR) Pru GATE Ques ua Cabin rvs GATE Quin oe Ka, SOP ad FOS ros GATE Quen oe Lage ate (96710 cer 20) Sepenbero) ng 8) his) eto) ayaten iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl Memory Address in Fi instruction 2000 arse, 1900 2003 PUSH Ht 2004 PusHD 2008 ALL 2050 2008, PoP i 2009 Hur ‘ithe completion ofthe execution ofthe program, the program counter of the 8085 contains and the sack pointer eonins SG bp puta vac jRMBSIQACST 3. Figure shows the memory ciruit of 9085 microprocessor. foo =p oe Sq — Whit ie the toa size of the memory i the cite? 1. Wha are the beginning and ening addresses of the memory in hip 17 ©. What are the beginning and ending addresses ofthe memory in| ship2 ‘Ac th memory chips in the ezcut ROM ar RAM? How wil you replace the two NAND gate the circuit with one 3to8 decoder without changing the memory size or the memory aukresses? Assume that the decoder has one active high enable Py and one active low enable E> Solution: ips:/ww- youtube comwatch”y~ZhLawiMastY 1993 Ina microprocessor, wait sates are uted to ‘Make the processor wat during & DMA operation Make the processor wait during an interrupt processing {Make the processor wal daring » power shutdown AL Interface slow peripherals to the processor AnewersD 2. A microprocessor hs five addres line (Ay Ao] and eight data lines [Dy—Dp] An input device A, an ouput device B, » ROM and » RAM are ‘memory mapped tothe microprocessor atthe addresses as shown in figure Devices and B have four addressable egsters each’ RAM has 8 bytes and ROM has [6 byes, ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl B ROM RAM es A 8, Indice the aden ines tobe connected to each device and menor. '. Obtain the minimum sum of produc expression forthe chip select (CS) fanction ofeach device’memory Solution: ps:iwww.youtubscom/watchiv~-WheTAXOTI 1995 1. When a CPU is interrpte it 3. Stops executing of instructions Bb. Acknowledges interupt and branches of subroutine ©. Acknowledges interop and continaes {Acknowledges intrspt and waits Tor the next instruction fom the inert deviee ‘Anewer: 8 2. ASDMA’cransfer implies «2, Direct ansfr of dats hetwosn memory and accumulator b. iret transfer of data between memory and LO devices without use oF ©. Transfer of data exclusively within uP registers A fast ranster of data between uP and LO devices ‘Sinton 3. An ‘Assembler’ of a microprocessors used far 3, Assembly of processors n'a production line ©. Creation of new program's using diferent modules ©. ‘Translation of a program form assembly language to machine language “4 Translation ofa higher level language into English text, Answer: € 4 A hypothetical CPU has a parallel adess bus, patllel data bus, 2 RD and WRC active LOW signals. Two ROMS of size 4K words each and two RAMs of sizes 16K und 8K words, respectively are to be connected to the CPU. The memaries ato beso connecod th they Gil he adares space of the CU as per the memory map shown inthe Figure. Assuming a chip select signals are active LOW. ‘What isthe numberof lines inthe address bus of the CPU? a6 ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. b, Determine the values of eddess X,Y, Zand W as desimal numbers ©. Using a2 to 4 decode and some additional gates, draw a circuit forthe devoding loge, Solution: bp:w-youtube-com*wateh?sTedmGplerMAo 1996 1 The otal number of memory accesses involved (inclusive ofthe op code feeb), when an SORS processor executes te insrtion LDA 2003 is 2. The lowing sequence of insttios ae ected by an 8S 1000, mit ‘SP, 27FFH 100s GALL i006 1006 PoP “The content th stack pone (SP andthe HL reise pron Compicton of exceton of hese nts ae a SP= 20H, IIL ~ 1008 4. SP=27FD, HL 1006 * Soluti 1997 1. In 8085 pP system, the RST instucton wil ease an intecrapt 2. Only ifaninterup: service routine is st being executed bb Only fa bitin the snterupt mask is made 0 ©. Only iinterupts have been enabled by an BI instruction Nowe ofthe above Amwer: © Solution: 2. Tae decoding circuit is shown in figure, has been used to generated the ive low hip select signal fora microprocessor peripheral (Te address Tine redesignated as Ag to Ay for 'O adresse). s—=D- nan b. As-ATHE ©. 30-33H 470-73 Amewort A Solution: bps: youtube comivateh?-IMANEBAPIVE 3. The flloving instructions have hoen executed by an SORS uP For which address wil the net instruction be fetched? iipshwwr gatopaperin2014tiprovius-gale-questers-on_14hinl ane ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl "ADDRESS (HEX) INSTRUCTION 6010 UX H, 84, 79H 6013 MOV A, L 6015 ADDH 6016 DAA 6017 MOV H, A 6018 PCHL, ois b 8379 © 6979 {None ofthe above Amwer: © Solution 44. signed integer has been stored in a byte using the 2s complement forms, We wish o store the sme integer ina 16 bit word, We should (@) copy the original byte to the less significant byte of the word and Fl” ‘more significant with zeros (©) copy the original byte to the more significant byte of the word and fl lee significant with zeros (€) copy the original byte to the less significant byte of the word and make fi the more significant byte equal to the most significant bit of the original b) (a) copy the original byte to the less significant byte as well as the m significant byte of the word tpsww: youtube comvatehh-KPDGRwiI9LE 5. Match the fllowing, while moving data between registers ofthe 8085 andthe stack (1) @ PUSH instruction (a) Pre increments the stack pointe (2) a POP instruction (b) Post increments the stack point (0) Pre decrements the stack point: (d) Post decrements the stack poin Answers 16, 2-8 Solution 6. An 8085 uP uses a2 MHz crystal. Find the time taken by itto execute the following delay subroutine, inclusive ofthe ell instruction nthe calling program. {cating program Dey: PUSH PSW VIA, 64H lea DELAYLOOP: NOP ‘Youaze given that CALL Tnsruction takes [8 eyeles ofthe system clock, PUSH requites 12 eeles and conditional jump takes 10 cycles ifthe Jump is taken an 7 cycles its not. Al other instructions used above ake 6 ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. {Gn+ 1) elock eyels, where ithe number of acess tothe memory, Inclusive ofthe opcode fetch ‘Answer: 1.842 mee ‘Solutio 1998 1. An VO processor cont the flow of information between 1. Cache memory and UO devices Main memory and HO devices © Twotlo devices ‘Cache and mein memory Solution: _hpsswww: youtube com/watek?=8SBel_bHUDA, 2. Am insiruction use to set the cay lag in a computer an be classified Data tansfer ». Asitimetc © Logical Program control newer: Solution: ups: www youtube com/watch'y-TPSA9MO9aho 3. Write shor assembly language program, without wsing any arithmetic ineuction, to store hexadocimal SD in the lag register of 8085 ‘microprocessor. Data moter registers of the processor must not alter upon. xcuting this Progr MOV ha Mov 1'sbH Poe tr Solution: 1999 1. IFCS =Ayg°Ay4A3 i sed asthe chip select logic of 4K RAM in an 8085 system, thea is memory range will be ‘3000 3FEFEH . 7000-7FEFEL ©. 3001= SFFFII and 6000 ~ 6FFFEL {16000 = 6FFFH and 1000 —TFFFH, lution: hps:/ivwo-youtube-comiveteh 2. An 8085 aserbly language program is given below. iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl ane ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl MVIC, 03H Lxt H, 2000H MOVA,M Contents of the memory locations 2000 H to 2002 H pre ¢ 2000: 18H 2004; 10H, 2002: 2 Loop: INK H Mov p,m, (2) What does the above program do? cmp 8 (b) At the end of the program, what will be Ne Looe? (i) the contents of the registers A, B, C, H and L (it the concition of the carry and zero flags? NOV AB (lil) the contents of the memory locations Loop: OCR C 2000 H, 2001 H, 2002 H and 2100H. Nz LooPA STA 21004 HUT _Anawers a) this prgea wil found the highest suraber peat isthe given ‘emotlttln, Goal thet highest number wl preset nthe eeumulatoe ‘3 2000 1._ nthe 8O8S microprocessor, the RST 6 instruction transfers the program execution to the following lotion 30H b. 26H ©. 48H 50 Solution: htps:heww-youtube-comvatch?y—48rOVRL, x10 2. ‘The number of hardware interrupts (which require an extemal signal to interrupt) present in an BOBS microprocessor are ml 4 eS as Answer: Solution: btps:!hwww-youtube-comvateh?y-Wilabyeeddas 3. The contents of register (B) and Accumulator (A) of 8085 microprocessor are 40H and 3AH respectively, The contents of A and the stats of erry fa (CY) and sgn flag (S) aller executing SUB B instruction are a ASFICY=1, ST b A=ORCY=1, 5 © AFO,CY=0, 4 Av IRCY=1, 81 “solution : hips: wrw youtube com/watch?y=GOSSPruh2Lk 4. The program and machine code for an SONS microprocsttr ate given by ‘The tating addres ofthe above program i 7FFFIL, What would happen if itis executed from 800011? m6 ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. (2) The program and machine cade for an 8085 microprocessor are given by 3E mvt a c3 a 00 Nop 80 ADD B 3D DEC A C2 INz 8008 on 80 3. AMP so0c 1g address of the above program is 7FFF H. What would happ: its executed from 8000 H? (©) For the instructions given below, how many memory operations (read/w {are performed during the execution in an 8085 uP? (©) Weite an instruction which takes the minimum possible time to clear ‘accumulator of the B085.. Anewer: (a ithe program ecete fom 80001, wil nd an nite oop wth Salvoneinsiscton BHP ooo" uncon amp to memory ocalon {B) Number ofmachne yee rope for ALL 2000H and LDA 2o00H are sad grape (Sika A aoa su 4 Solution: 2001 1. An 8085 microprocesor based system uses a4K x8 bit RAM whose starting address is AAOOH. The address ofthe lst byte inthis RAM is 3. OFFFH. . 1o00Hr ©. BOFFHL 4 BAOOH ‘Solution: —_hps:/www youtube com/watch?v=psL AGimAjVS 2. Consider the following sequence of instructions for an 8085 microprocessor based syste 4 Ifthe program execution begins athe location FFOOI, write down the "sequence of instructions which ae actually exeeuted HLT instrstion Assume all Flags are initially RESET. iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl ane ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl , Which ofthe three ports (PORT, PORT? and PORTS) wll be loaded with "dara, and what is the bit pattem ofthe data? Answers (0 pot awit data 03H ‘Solutio 2002 1. Consider the following assembly language program, MVIB, 87H MOV A.B START! IMPNEXT. MVLB, 00H XRAB OUT PORT! HLT NEXT: -XRAB. SP START our PoRT2 HLT ‘The execution ofthe shove program in an 8085 microprocessor wil result in ‘An output of 87H af PORT! 1 An output of 7H at PORT2 Infinite looping ofthe program execution with accumulator data remaining at OO1T a Tnfite looping ofthe program exceution with accumulator data ‘between OOH and 87H nnpsuwww: youtube comvateh=37, LUSRWke0 2. An $085 microprocessor ops {he flowing route STARE MOV A.B ourssi Dena STA rs INPSTARD 2. Deterine the tal nunber of machine cclesrequted to xcoue te routn til the Minato exceed for the ft ine Determine te ime interval batween two conecive (MMW) sirate ve. the extemat logic controls the READSY line so that three WATT sits ae introduced the VO WRITE machine ecl, erin the tine nterval between two conserve (MEMW) signa newer) 2 Oat (an Salution ing at § MH clock frequency exceutes 2003 1. In an 8085 microprocessor th instruction CMP B has been executed while the content ofthe acumulatr i Tes than that of register B. As 8 resul, 2, Cary flag willbe set but Zero flag will be reset, 1 Garry fag wil be eset but Zero ag wil be set ©. Both Carry ag sid Zero Mag wl be eset, 44 Both Cary lag and Zero ag will eset newer: A Solution: ips:/vw.youtube.comwateh?y-kKweMh2kzbe 2004 1. The $255 programmable peripheral interface is used as described below. (i) AnAD converter is interfaced to a microprocessor through 1 $255. The conversion is inated by a signa fom the 8255 on port C-A Signalonpor'.A~ signal on port C causes data o be stobed into port. i) Two computers exchange data using a pair of 8285s, Port A works 82 bidirectional dataport supported by appropriate handshaking sienas. a6 ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl ‘The appropriate modes of operation ofthe 8255 for(i) and (i) would be 1. Mode 0 for(i) and Mode 1 for(i) 1. Mode | for (i) and Mode 2 for(i) © Mode 2 fr () and Mode 0 fr (i 4 Mode 2 for (i) and Mode 1 for (i) Answer: B Solution 2. The number af memory eyles required to exceue the following 8085 (LDA 30001 Gi) EXID, FOFIHL Would be 2 fori) and 2 for(i) 4 for qi) and 3 for(i) ©. 3 for and 3 for Gi) 43 for(i) and fori) Answer: Solution 3. Consider the sequence of 808 instuctons given below LxtH, 9258 MoV A.M CMA MOV M.A. Which one of the following is performed by this sequence of instructions? Contents of lcstion 9258 are moved to the accumslator Contents of location 9258 are compared with the contents ofthe sccumulator ©. Contents of location 9258 are complemented and sored in locaton 9258 ‘4 Contents of location $892 are complemented and stored in locaton 5892 ‘Anmwers€ Solution: psy youtbe.com/watehPw-Us-ROGYEXAR 4, Tes desired to multiply the numbers OAH by OBH and store the result in the accumulator The numbers are available in risers Band C respectively. A pat ofthe SO8S program fortis purpose is given below: MVLA, 00Hi Loop: ir END ‘The sequence of instructions to complete the program would be 3. JNZLOOR, ADB, DERE b. ADDB, SNZLOOR, DCR ©. DCRC, INZLOOP, ADD B 4 AbDB, dere, INZLOOP Solution: haps:www-youtue.com/wateh?y—gsv_RagPBO 2005 Statement for linked Answer Questions 1 & 2: Consider an 8085 mieroprocesor system. 1. The following program stats at location 0100H, LXt SP, OFF CXL, 0701 MVI A, 20H SUBM ‘THE Contents of accumulator when the program counter reaches O109H is 2. 20H b. oH ©. OO FFL 2. Thin addition, following code exists from O109H onwards on 40it si8 ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. iipshwwr gatopaperin2014tiprovius-gale-questers-on_14hinl ADDM. ‘What wil be the result in the accumulator after excusing the lat 3. 40m 20H ©. 60 4 22H lution (1 & 2) 2006 1 An VO peripheral device shown n igre (b) below iso be interfaced to ‘an $085 microprocessor To elect the UO device inthe addres range DSI — DTH, is chip-select (CS) should be connected to the ouput ofthe decoder shown in the Figure (a) below 7 : vote os 208,2 RD vo okie me | met " suse = he a—| / s a. (6 Fa. (a) mt cxrepap tps: yout comfratee-p Cada 2. Following ithe opment of 8085 asenblylmguge progam ixise errr CALL 00H sooo! Lx, acest Posi bsw Shi Por Fsw RET (the completion of RET inst the contents of SP i 2 erat & scm © isp 2007 1.8255 hips intercede a 808 miroprcetr system a 0 10 tapped 10 sown nthe fie Tear ings AD a A af he 88S tre tsedy the 255 chip decode intemal ste orate contol Tse The aes ine to yas well ate HOM gal are or tds decoding, The ans of adrestoes for which he 8255 chip woud fetal te ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl a. FSH FB . FSIL-FCIL © FSH_FFH 4. FOR FTE “Anewer:C Solution: hips:wwwyoutube comwvateh?mtWFKmBGgbEw Statement forthe linked answer questions 2&3: ‘An 8085 assembly aaguage program s given below. Line | MVEA, BSH ‘MVLB, OBI XR16OH ADDB ANISBE PLS. STASOLON mr 2. The contents ofthe accumulator just afer execution ofthe ADD instruction ia ine 4 wall be 3. After execution of ine 7 ofthe program the status ofthe CY and fags willbe... respectively wep WhSDPW 2008 1. An 08S exceutes the folowing instructions 2710 LXIH, 30A0H 2713 ADH 2714 PCH. All adresses and constants ate in Hexa desimal Lat PC be the contents of the program counter and HL be the contents of Hristo pir just afer executing PCHL, Which ofthe following statements is corect? © PO~ 614011 and HL~ 610K, 4 PC~ Si40H and HL 2715H Answer: © sip: youtube comvatch?y-YS9EV dnd 2009 wie ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl 1._ Ina microprocessor the service routine for a certain interrupt stars fom 4 fixed location of memory which eannot be externally st, butte interrupt an be delayed or rejected Such an interrupts 2, nonsmaskable and non-vectored by maskable and non-vectored ©. nonmaskable and vectored 44_maskable and vectored Solut Iagpswwre:yoube comvwatehv=pJ-64_ 05-10 2010 1. Forte #085 assembly imguage program given below, the content of the accumulator after the exeetion ofthe program is 3000, MLA, 45H 3002 MOV, A 3003. STC 3001 CMe 3005 RAR 3006 XRAB oot si oT ETL pege : i "Solution: utps:iwwo youtube comwatch”-NSEONs_Oivk. 2011 1._An $05 assembly language program is given below. Assume that the amy flag is nally ust. The contents ofthe accumulator after the execution ofthe program is MVIA,O7H RLC MOV B.A. RLC RLC ADD B RRC a aCH b. ott 23H ist newer: ntpswwre: youtube comwateh'v-GlPuCxCavws 2013 1. For 8085 microprocessor, the flowing program i executed MVIAQSHE MVLB, ost PTR: ADD B Der B INZ PIR ADLOSH BLT [Atthe end ofthe program, accumulator contains = ITH 20H © 2H 4 os Answer: A Solan + Inps:twww youtube com/watchtv-SYjXsPIwh-Y 1wi8 ‘4142017 GATE 2018- Previous Solisions& Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Solitons (1987. 2014 1. Forte $085 microprocessor, th interfacing circuit to input 8 — bit Agta data (Dlg = Dip) fom an exteral device is shown in Figure. The instruction for correct data transfer is Bos 7p 5 VWODeviee Decoder § Ae sb ab AB 3e- Distt ie 3 [Data Bu aes ell %s-Dhy DO, Doy| 2 Be Asa 1p ab Beso DES —— BD. A A> = Ax As A> a Aik 2 Ae — ‘A Ave aa GATEpape = MTA Fa 8 NSH © OUTFSH LDA FAS AnawertD Solution : hps:nww.youtube comvatsy-IHGSBTSDsAs 2. An 8085 mioprocetor executes “STA 1254" wit starting adress iccaton IFFEH (STA copie he contents ofthe accumulator othe 6 bit der loestion, Wl th aston itched and excited, the Sequence of values wren a the adress pins Ayo Ay (A) IFH, 1FH, 20H, 12H (8) IFH, FEH, IFH, FFH, | (©) IFH, IFH, 12H, 12H (D) 1H, 1FH, 12H, 20H, 1 RGR TAIL [Los te recreation cook 10.comments iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl wie {4142017 GATE 2018- Previous Solisions& Video Lectwres for FREE: Previous GATE Questions on Microprocessers and Memory Mapping with Soliuions (1987 iipdhwwra gatepape.in-20tprevius-gale-questors-on_14himl Top comments 0 8 » leap Mababare avostaay Shaedeite, Thank ts very for ty Pease load some mote programs trom prvaus questo papers of [NET SET nama of computer slsoe plese as soon ae possible C1): eat aj Setar 2 yup Stands ‘ary uratupeiog other subjects ora) heey ‘Some questons dort have soliton Ina please prove tase In thankyou foregut your wore reo [SHREEAhar Simple aroteegs Swedes ‘Tan. vey much Rielly hebing me toward GATE heey ‘CHANDAN KUMAR BHAGAT Son gy = Swedes 1 Rep Kuldeep Singh ist shad se ‘hanks to much fr wonderful explanation. es Sandegp Kumar argo - Sep ‘and ans ofthis question 11) 004 2}60H Fe Sandeep kumar ata - Sess ‘Question 2005 coma cetals wrong... cect questions LXIH am +) rep arunsinghmebra “yao «Sore ‘tanks thi i ep fora beter approach toward the problema ate Sir plere cols you upload sore vides of problems on ‘mioprocessor rom ebctcl brane ate Suprest singh 2yeeseg - Sart ‘Some Inks arent hae forthe solitons. tay swi6 {4142017 GATE 2018 Previous Solisions & Video Lectires for FREE: Previous GATE Questions on Microprocessers and Memory Mapping wit Solitons (1987. iipdhwwra gatepape.n-20‘4"tprevius-gale-questors-on_14himl Start Di Get your Free Software Here Sabie PC sen) Pon Your Fandback (Saute ae ‘Simp theme. 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