U . NIT INTRODUCTION TO 8051 MICRO CONTROLLER : = PART-A SHORT QUESTIONS WITH SOLUTIONS . Q1. What is microcontroller? An: , this includes a CPU, R “Ansighly integrated chip that contains all the components comPrSITE © controller. Typically, some for SEROML LO ports and timers. The main task of @ microcontole® 8 0 vrontrol a particular system. Microcontrol Gre designed for embedded applications, in contrast to the microprocesso%° seed in personal computers or other general p applications. TE Dae FS Mcroprocenor_ Fo[_ OP Devs Figure G2.__List the on-chip peripherals of 8051 microcontroller. Ans: “The on-chip peripherals of 8051 includes, (i) Timers/Counters Gi), VO pons : Gi), UART (iv) ADC «PWM wi RC i (vii) SPI + (viii) Capture module (ix) Watchdog timer (x) _ Real time clock (xi) Analog comparator (xii) USB (xiii) CAN (xiv) Power management module (ALLIN-ONE JOURNAL FOR ENGINEERING STUDENTS S GROUP a SPECTROMMICROPROCESSORS AND MICROCONTROLLERS [JNTU-KAKINADA] 42 25 Explain mathematical flags of 8981 microcontroller? anst (Woda Papers, a6) Apr Set2, 0 areas follows, carey otherwise cleared. It is _Atier performing an arithmetic or logical operation, if there is a carry from MSB then CF is s ein arithmetic, mp, rotate ard boolean ineruction’ ‘ausitiary Carry Flag (AC) _Atier an arithmetis of logical operation i there isa carry or borrow from 3% bit to 4" bit then AC flag is set, otherwise | is used for BCD arithmetic C flag is set, oth verflow Flag (OV) es ov rhs Nas et whenever te el of signed nuke operation is fo large easing the higher order bit to low into the sienbit ‘i parity ®) Spaniel flag is set if register A contains odd number of ones and cleared if register 4 has even number of ones. ; Ga. Draw the pin diagram of 651, ‘anst The $051 microcontroller is 40 pin dua inline package IC chip. The pin diagram of 80S1 microcontroller is shown in the figure below. Pio PLI Vee Pia P6.0 (ADOy ‘1 P13) PO.1 (ADI) . Potif 23 P02(AD2) | Port-0 Pig P03(AD3) | or Pus 0.4 (ADS) ("Address/ Pia POS(ADS) | Data RST P0.6(AD6) | lines (RXD) P3.0} P0.7 (AD7). CXD)PRF~ 11 ggg, 3H EA . F 3 | aNtors2b 2 : AL Pons | GNTIPs3f— 1 Meresentoler 29 | PSEN Alternate (TO) P34) P2.7(AlS) function (TH) P3.5] P2.6(Al4) tines (WR) P36 P25 (A13) (RD) P37 P2a(Al2) | Port2 + Oscillator_~ XTAL2) P23 (All) or ‘inputs “L XTALI P2.2(A10) | Address xD p2tiasy | tines P20(as) J . Fir: Pin gram of 8051 Miercontol ssigned to Port 3 pins of 8051 mi Q5. List the alternative functions Ans: s Apri.t6, Set2, a1(e) MIA} tional 1/O port. The pins of port-3 can be configured to function as yo Eis Formed fox pins 1-17. Port is aso abi V0 pins and also to perform alternate functions as given below. Look for the SIA GROUP Loco {I on the TITLE COVER before you buyUNIT-4 (Introduction to 8051 Microcontroller) P3.0-RXD__: Used for receiving serial data P3.1-TXD —: Used for transmitting serial data P3.2-INTO : Used for extemal interrupt-0 7 P3.3-INTI : Used for external interrupt-1 P3.4-70 —: Used for external timer-0 input P3.5-T1 —_: Used for external timer-1 input P3.6-WR ‘Used for extemal data memory write signal P3.7-RD__: Used for external data memory read signal. Q6. Write short notes on the use of control signals WR and RD. Ans: | WR : IR stands for write signals. Itis an active low signal (.e, it gets activated when Tislow) to external data memory. The port3.6 pin of $051 is assigned to TR signal. SSI OC writing ee RD: RD stands for ‘Read’ signal, when it slow indicates the peripheral thatthe pocesor is perforin 7 device read operation. RD is active, low shows the state for TT, TW of any ead cle the sighal re “hold acknowledge". Q7. Draw the oscillator circuit and timing diagram of 8051. Ans: The oscillator circuit of 8051 is shown in figure (1). 1S Memo, mains trstated aoe sey § | tT Figure (1}: 8051 Oscillator Clock using Crystal The timing diagram of 8051 is shown in figure (2). b+ Ips for XTAL, f = 12 MHz2————> fl pct ou arr, —a AE nw PCL outatP, ect — at an instance ne, DPLow Pitot (2): Timing Diagram of 8051 SPECTRUM ALL-IN-ONE JOURNAL FOR ENGINEERING STUDENTSans: ‘The program memory organization in 8051 microcontrolle ih 7 Wi ROL cnhocONT! 4.4 ns AND MI MIcROPROCESSO! walle. G8. Draw the program memory organization in 6051 microc LERS [JNTU-KAKINADA} sis shown in figure: Ans: Q9. Draw the data memory organization In 8051 mlcroco’ ree | . xem eakoytes rowan “eral aay ion wort ery ert OFF Progam EF} eae 00H — et Ayea=o (EAST = Figure FE troller? ude Papert, 4) APC, S03, 216) MUA) ‘The data memory organization in 051 microcontroller is as shown in FEU: err spect 7™ fet xterm! regen a (2s) oe om (ow) Ine du RAM (28) ost ooo : Glnteroa! Data Memory i) External Data Memory ~ Figure m memory? _External Program Memory Q10. How does 8051 differentiate between the external and internal progra! Ans: The differences between extemal and internal program meinory are mentioned below: Taternal Program Memory External memory is extemally interfaced to program memory of the 8051 microcontrol When the Fa pin is grounded, then it indicates that the program code is stored in external memory. : ‘The 8051 can have extemal inemory upto 64 kB - interfaced to it, with address map (0000H-FFFFH, Indirect addressing mode is used to access external memory. 1, ] intemal memory physically exists on the chip of program ‘memory of 8051 microcontroller. 2. | When the Ed pinis connected to V,, it indicates that the program code is stored in the microcontroller’s, ‘on-chip (Internal) memory. ‘The internal memory of 8051 is of 4 kB, with address map (0000H-OFFFH, 4. | Direct addressing mode is used to access internal memory. Define potting. Polling is a procedure of determining the highest-priority source among all the available sources with the help of a software. Look for the SIA GROUP Loco {ff}-on the TITLE COVER before you buy $$ Apri-t8, Set, Q1%0) cayIT-4 (introduction to 8051 Microcontroller) Define interrupt and interrupt service routine. rrupt: An interrupt is a signal either from hardware or from a program that interrupts the normal process Pt: An interrupt jgnal either from hard from a pi r r ing OF the FUpt Service Routine: Each interrupt has an Interrupt Service Routine (ISR). When om interrupt is eeegee »eontroller branches to the ISR. For each interrupt there is a fixed location in memory that holds the address gee >» of memory locations set aside to hold the addresses of ISRs is called the interrupy vector table, Draw the format of TCON special function register in 8051 micro-controller. ‘Timer Control Register (TCON) is an 8-bit register, It is bit-add er/counter of S051. Figure below shows the bit a: verflow) and TR (Run Control) bits of both tims “(Unterrupt) bits, O.and timer 1 and lower 4 bits are used for Controlling 72° sage : z 6 § 4 3 2 1 ar tet [Tro [Ro [ert [10] Figure: Timer Contro! Special Function Registei Draw the format of SCON special function register in 8051 micro-controller. Serial Contol Register (SCOND isan 6-it reine. I alo a it adres eer 1 eto prOueam e and data bits of data framing. tis also used to specify the mode in which the serial port isto work. THE n in the figure below: - 6 Site 3 2 1 0 sMo | SM1 | SM2 | REN | Tes | rps | tr | RI i Figure: The Serial Port Control (SCON) ist the different operating modes of serial port with their band rates and transmiss! le four modes of operation of serial port are, — ) Mode 0 ) Mode 1 | Mode 2 . Mode 3 eee sho [smi | Mode | Baud Rare | tranrmision Format 0 0 1/12 oscillator frequency | 8 data bi ne 2 1 1 Variable 10-bits (8 data bits, 0n€ start bit- and one stop bit). one StF, ° Programmable to either | 11 bits (8 dasa bits, one Pi. 164 or 1/32 of oscillator | bit and 9 bit is proeram” frequency ot 1 3 | Variable 11 bit (data bits Oe te 3 . bit and 9 bit is program Table: Operating Mades of Serial Port IN-ONE JOURNAL FOR ENGINEERING STUDENTSMIcROPROGESSORS AND MICROCONTROLLERS [JNTU-KAKINADAl Bee ~ PART-B aa ‘OVERVIEW OF 8051 MICRO CONTROLLER) | z 16. Draw the block diagram of microcontroller and explain it. (Model Papers, 25) 1Apri-18, Set-, a6(a) Mga) anst ‘ ‘The block gram ofa miozonlle iste in the ite Blow. Buca - ; = cmt Counter control |+— ROM RAM TimerO }+— inputs: = i cw = Bs ae sei cont ro pa Hoy =: oF rT TF 5 Py Pi Ps Pa TxD RxD Figure: Black Diagram of Microcontroller All the components of a microcontroller aré built into one chip. 1. Central Processing Unit (CPU) CPU is the heart of microcontroller unit. It (CPU) performs and controls'all the operations of the microcontroller. CPU is a combination ofthe following elements: ALU, Program counter, Stack pointer, Accumulator, Registers and Timing and control unit. A ‘The ALU is the acronym for Arithmetic Logic Unit: It performis arithmetic operations like substraction, addition, multiplication, division and logical operations like AND, OR, NOT, XOR, NAND. truction to be executed in the program being % The Program Counter (PC) stores the 16-bit address of the nex ‘executed thus, keeps track of the program sequence. % The Stack Pointer (SP) holds the tit adress ofthe cutent topof the stack (.e, the address ofthe location in stack, where the last data was stored). * ‘Accumulator’ is a special 8-bit register in which the result of any mathematical operation gets accumulated (stored) automatically. It can also be used to store the 8-bit data, 7 ‘There are a niamber of registers in a CPU which are used as general purpose registers, i.e., to store various data. ‘The function of the ‘timing and control unit’ is to synchronize the internal operators of microcontroller with the frequency of the clock signal and o control the flow of data within the microcontroller and also between the micro é controller and external devices. Look for the SIA GROUP LOGO ZS on the TITLE COVER before you buyUNIT-4. (Introduction to 8051 Microcontroller) 2 Oscillator Circuit is also known as clock generator. The oscillator circuit consists of a resonator and necessary electrical compo The frequency of the clock pulses and the funetioning speed of the microcontroller depends upon the frequency, resonator. \ Internal ROM and Internal RAM Certain amount of memory is inbuilt in the microcontroller chip. This memory is known as on-chi are two types of on-chip memories. They are intemal ROM and intemal RAM. 4 Internal ROM is the on-chip memory in which the program (code) instructions are stored. Thus, itis also known a ‘on-chip program (code) memory. 4. Timers/Counters: Timers/counters are two-byte registers which are used in a program to determine the time per of an event or to calculate the number of events. For example, pulse-width measurement, frequency measurem band rate generation, cou » can be done using the on-chip timer/counters. Interrupt Logic Ciret interrupts arisit try: The interrupt logic circuitry in a microcontroller is the logic circuit which senses 1 in the microcontroller and makes the microcontroller aware of the active interrupts and the ord ofthe interups which should be served bythe mcrocontller. This loge eet ntudes interrupt enabler interrupt priority register and other necessary elements. 6. Serial and Parallel /O Ports: The microcontroller chip consists of inbuilt serial /O port and parallel VO port which the external devices can be interfaced to the microcontroller. The serial /O port is meant for transferring| data between micro-controller and external devices, in the form of bits (ie., one bit at atime). Whereas, by ‘of parallel VO port the data can be transferred in the form of bytes (ive. 8-bits of data ata time). Q17. What is the advantage of microcontroller over microprocessor? (pri-7, Set 2, ae) |ApALA7, Sat : (or) Discuss the advantages of microcontroller based system over microprocessor based system. the advantages of microcontroller based system over icroprocessor based system are given below: peripheral devices, 2. Less hardware is required for the system using microcontroller due to its in built additional features. 3 the speed of a microprocessor. 4. ‘The PCH size required for installing a microcontroller based system i less due to less hardware requirement Ss. Microcontroller based systems are more reliable. f 6. Most ofthe pins of microcontroller are mulifunctioned icone pin can perform more than one function. 7. ‘The cost of microcontroller based system is less due to less hardware requirement, 8. The environment of common software/hardware design is available from manufactures. 9, Microcontrollers can easily synchronize the communication between peripherals of different speeds. 10, Microcontroller have many bit handling instructions and hence controlling is more affective. Q18. What is the difference between Microprocessors and Microcontrollers 7 (or) Mention the difference between 8086 microprocessor and 8051 microcantroll SPECTRUM @LLIN-ONE JOURNAL FOR ENGINEERING STUDENTShe diflerences between a microprocessor and a microcontroller i shown below ‘Microprocessor Microcontrotier cchiecture ofa mictopocessorconsitzof | 1. | Thearchitecture ofa mierocontolier consist af Te enrol unt, registers and interop circuit tieroprocessor along with memory (ROM and RAM), rcs . {VO interfacing unit and various pheripheral units. ere are only fow instructions in microprocessor 2 lions in microcontroller that “Tint jupport data handling ini, suppot dita handling in bits. vt ewroceir oy vps ve mine | 3. Inamierocontoller, mest ofthe pins have multiple functions. fuetions. pata and programsare adéesedusing the same | 4 | Dataand programsare adressed using different Premory adress rane. memory edness ange. Pt 5. | There are only few instructions in microcontroller “There are many instructions in microprocessor hat perform daa tansfer among memory and CPU. to perform data transfer among memory-and CPU. Intakes more time to access memory and UO 6.| tttakes less time to access memory and 10 devices. : devices as they are built with in a microcontroller. Hardware requtements are more forthe systems | 7. | Less hardware is required forthe systoms that use that use microprocessor. microcontroller. “The designing of microprocessor based systems » | 8. | The designing of microcontroller is not as flexible as is very exible.” : that of microprocessor based systems. it has single memory to store data and code. 9.| thas separate memory to storage data and code. __ 4.2 ARCHITECTURE ‘i es Q19. List the features of 8051 family of microcontrollers. (on) List the salient features of 6051. ; : Apri, sett, 10) MIB} 7 (on What are the features of 8051 microcontroller? ' Apri $7, Sat, ane) MB (Refer Only Five Points), : "The following are some features of 8051 microcontfollers, 805 l'microcontrollers have 4096 bytes of internal program memory. ‘They have 128 bytes of internal data memory. ‘8051 microcontrollers possess four register banks, ‘They possess one microsecond instruction cycle with 12 MHz crystal. 8051 microcontrollers have 32 bidirectional VO lines organized as four 8-bit parts. ‘They consist multiple mode, bigh-speed programmable serial port. : 8051 microcontrollers have 16-bit timerscounters, i ‘They possess two-level prioritized interrupt structure, : 8051 microcontrollers suppor full depth stack {or subrontine return linkage and data storage. ‘They have direct byte and bit address ability. ; i: a Look for the SIA GROUP Loco {Yon the TITLE COVER before you buy 128 user defined sofware gs ae avaible in $01 mieroconllers i . 8051 microcontrollers support signal overflow detection and parity, computation features.UNIT-4 (Introduction to 8051 Microcontrolier) Q20. Give the details of 8051 microcontroller family chips. Ans: Intl comporation manufactures various microcontrollers in hit and 1648 configurations. MCS.S1 isthe amity of 8-bit microcontrollers. Each member of MCS-51 family has various port numbers. Table (1) illustrates the different controllers of MCS-S1 scries with their ROM size so ROM Memory Microcontroller SXCSI sxes2 8XCSIFA SXCSIRA, 8XCSIFR SXCSIRB sxcsire 8xcsIRC 8XCSIRD Table (1) The features of $051 family of microcontrollers are listed in table (2). [ Device number Data RAM ROM. Bus Width (bits) Memory Memory, 8031 ie 128 bytes - 4 8051 128 bytes 4kB 8751 128 bytes | “4B EPROM 8082 AL 256 bytes sie 8752 BH 256 bytes | 8kBEPROM Table) Q21. Explain the architecture of 8051 with its diagram. (Model Papers, a2(a} | Apri-17, Set2, Q6(a) M8) | Apr-17, Set. (or) 7 Explain architecture of 8051 microcontroller with a neat sketch. (on ” ‘ 4 With nieat diagram explain the architecture of 8051 microcontroller. And also discuss each P detail. ; Give the functional block diagram of 8051 microcontrolle SPECTRUM ALL-IN-ONE JOURNAL FOR ENA ee A. MICROPROCESSORS AND MICROCONTROLLERS [JNTU-KAKINADA] 4,10 ‘ans: Figure (I) shows the functional block diagram of 80S1 microcontroller. roomy raore7 {Hit Par’? sive [Sick Figure (1) ‘The individual blocks of 8051 microcontroller are discussed below: Program Counter (PC): PC is 16-bit register, which holds program memory address of currently fetched instruction. It is capable of addressing 64 k bytes of code. PC Incrementer: This isa 16-bit register which keeps incrementing the address in accordance to the prograin flow. it is used to facilitate PC to be used for addressing modes. DPTR: 1t consists of'two 8-bit registers DPH and DPL. It is used to hold a 16-bit address. DPTR holds the data in indirect dressing mode, E Accumulator (A): iis an 8-bit register that stores one ofthe operand and its immediate results while performing ALU operation. B Register: It is a 8-bit register which holds second operand while performing ALU operations. “B" register is tised during ‘multiply and divide operations along with A register ALU (Arithmetio and Logical performs arithmetic operations like addition, sub-traction, multiplication, division and logical operations like AND, OR, NOT, EXO SW: Program Sttus Word (PSW) contains four mathematical or math flags, one user program flag and two register select bits syle as shown in figure (2). Look:for the SIA GROUP LOGO {7} on the TITLE COVER before you buyUNIT-4 (Introduction to 8051 Microcontroller) Tn figure @ 2 After performing an arithmetic or logieal operation, if there is a earry from MSI then CF is set, otherwi cleared. It is used in arithmetic, jump, rotate boolean instruction. Auxiliary Carry Flag (AC): Afr an arithmetic or logieal operation if there is a carry or borrow from 3°¢bit to 4% bit then flag is set, otherwise cleared. tis used for BCD arithmetic, Overflow Flag (OV): This flag is set whenever the result ofa signed tiumber operation is too large to flow into the sign bit. 00-078 03-0Fh 10-17h, Is-1Fh iSO and RS1, Register Select Bits, Table: Flag F,: Flag | of the user. Stack Pointer: Stack is a section of RAM used by the CPU to store information temporarily. Stack pointer is 8-bits \ddress held in the stack pointer is the location in the internal RAM where the last byte of data was stored by stack op: ‘Temporary Register - Temp 1 and Temp 2: Temp! and Temp 2 registers are used during comparisons and certain other: tions, These operations use the contents of registers but do not modify ther. | | | ‘Timing and Control: All operations are performed in synchronous withthe eloek in step.‘The cont unit generates Cot signals like ALE, PSEN. RD. WR : ALE: While accessing external memory, the low address byte is latched through this pin, PSE’ RD {1 is active low program strobe enable used for reading the contents of external program memory. Iti active low read signal used for reading the contents of extemal data memory. WHE: tis an active low vite signal used for writing the coments to extemal data memory, IR (nstruction Register): It holds opcode of current instruction. Program Address Register: This isa 16-bit register which holds the address of the code to be a for application to the address bus pins and.it also outputs the address for the code (or) data, There this program address re finds its move instruction. RAM Address Register: Similar to program address register it holds the address of the data reference. It finds its use di move instruction. ‘i ROM: I is a read only program memory. The ROM ean be masked, EPROM or flash EEPROM with 4 kB. ‘TMOD (Timer Mode Register): It is an 8-bit register that specifies operation of timer 0 and timer 1 along with theirno TON: It is an S-bit register that (Timer control register) stores TF and TR of both timer 0 and timer 1 along with if control bits. -gister used to program the start, stop and data bits of data SCON (Serial Contral Register): SCON register is an 8-bit PCON (Power Control Register): It contains the flags that differentiates power-on-reset, crown-out-reset, a watch reset and an external MCLR reset SBUF; It is used for serial transmission and reception. ‘SPECTROM ALL-IN-ONE JOURNAL FOR ENGINEERING STUDENTS:BE, ARZTL me sn MICROPROCESSORS AND MICROCONTROLLERS [JNTU-KAKINADAI ‘ond, S613, 060) MI 4.12 ‘@22, Draw the pin diagram of 8051 and explain the function of each and every pin. (on) Draw the pin diagram of 8051 and explain the function of various signals. (or) April-1, Set, 6) M10) Draw the 8051 connection diagram and explain. (on) . Draw the pin configuration of 6051 microcontroller and give the pin description, : (on) Explain the alternate functions of port 0, port 2 and port 3. Api, sot, 810) 8) (Refer Only VO Pins Excluding Port 1) ans: ‘The 8051 microcontroller is a 40 pin dual in line package IC chip. The pin diagram of 80S1 microcontroller is shown in nl % ce a exw P34 Po. AD?» (TxD) P31 ALE PSEN Microcontroller en P2.7(AISY rect P2.6(A14) bet P25 (A13) oe P2412) pore2 3 pins. a contol pins 1 are divided into four §-bit parallel ports P,, P,, P, and P, as shown in figure. Out of these 32 pins, The 32 VO pins of 05 o>, and P,) ae configured to perform atermate functions (VO function, address or data bus for higher 24 pins (ie. pins of. order memory and some other for the SIA GROUP LOGO QS on the TITLE COVER before you buy special functions). Looknut UNIT-4_ (Introduction to 8051 Microcontroller) }___Port-0 (Pins 39-32): The group of 8 pins Ge, 30RD Ip configured as port-0. This port is an 8-bit VO port. tt ic also used to access external memory. The pins PO.0.9.7 represent AD,-AD, respectively. The low order address byte (AD,-AD, of the to byte address (AD,-AD, external memory i time multiplexed with the data being written or read. Hence, the pins of port-0 can be used to transfer data bytes between 8051 and extemal devices ‘and also to address an external memory, gPort-t (Pins 1-8): The pins 1-8 are configured as port The pins of this port are configured to perform only UO fanction. Thus port-1 of $051 can be' used only a6 Uo por. 4 Port-2 (Pins 21-28): The pins 21-28 form a parallel VO port (port-2). The pins of port-2 can be configured as VO pins or they can be configured as high order addres lines (AD,-AD,,) ofa two byte external memory address, 4 Port-3 (Pins 10-17): Por-3 is formed from pins 10-17, Port-3 is also a bidirectional 1/0 port. The pins of port. 3 can be configured to function as 10 pins and also to perform alternate functions as given below P3.0-RXD — : Used for receiving serial data P3.-TXD — + Used for transmitting serial data P3.2-INTO : Used for external interrupt-0 P33INTI = Used for extemal interrupt 3.4.70 + Used for extemal timer-0 input P3.5-Tl + Used for extemal timer-1 input P3.6-WR ° : Used forextemal data memory wit signal P3.7-RD + Used for extemal data memory read * signal 2. Power Supply and Ground Pins Pin-40 (V,): This is a power supply pin. Anexternal D.C power supply of +5 V is connected to this pin. Pin-20 (GND): This pin is the ground pin of 8051 and it is ‘connected to the ground in order to ground the of 8051 microcontroller, 3. Oscillator Pins Pin-18 (XTAL2), Pin-19 (XTAL! generator, the output of external oscillator (clock generator) must be connected to pins XTAL2 and XTAL1 must be connected to the ground. In case of internal clock generator, the XTALI pin is connected as input to the inverting amplifier of oscillator circuit and XTAL2 pin is connected to the output of inverting amplifier. in case of external clock SPECTRUM ALL-IN-ONE JOURNAL FOR ENGINEERING STUDENTS Control Pins Pin-29 CPSEN -Program Store Enable): PSEN fsana lows output control signal. When microcontroller reads th “extemal program memory, the PSEN signal gets activated every six oscillator periods. The PSEN signal serves as th ‘eadstrobe tothe external program memory. This signal ea {he exterial program memory to enable its contents tothe 8051, Pin-30 (ALE-Address Latch Enable): AL ‘output signal. While accessing the external memory, this is used to latch the lower byte of the address which is ‘multiplexed with port-2, Program instructions fom the intemal program memory fi addresses 00001 to OFFF whercas 8051 fetches the p instructions from the extemal program memory for address 00H to FFFFH. When the EA pin is low, ie, EA = 0,1 8051 microcontroller fetches the program instructions from) extemal program memory for addresses OOO0H-FFFFH. Pin-9 (RST-Reset): The RST pin isused toreset the 8051 mic controller. In order to reset 805 1, high signal should be appli {0 this pin for two machine cycles, whi the oscillator is Q23. Explain the working of 8051 oscillator and clock ‘Apa, et2, 060) For proper functioning of @ microcontroller its ‘operations must be synchronized, A clock signal (eta pulses) of suitable frequency is used to synchronize the ‘operations ofa microcontroller. The clock signal is obtained ‘an oscillator circuit (clock generator). The oscillator eicuite ofa resonator and suitable circuitry, which can generate cl pulses of desired frequency. 7 ‘The 805} microcontroller does not have a inbull oscillator circuit It requires an external oscillator to synct the internal operations. An external oscillator is cont the 8051 microcontroller usis ‘The oscillator circuit of 805 covitains a resonator is quartz crystal or ceramic. It (oscillator) also contains capacitors as shown in the figure below: * Ceramic or erystal resonator 8051 Micro- controller Is(XTAL) 19XTAL,)ae 414 MICROPROCESSORS AND MICROCONTROLLERS [JNTU-KAKINADA] “The basic frequency of microcontroller isthe frequency of erystal used in the oscillator cireuit. Manu-faétures provide different designs of 851, which can run at predetermined maximum and minimum frequencies. The predetermined frequency anges from 1 MHz to 16 MHz In serial data communication, to obtain standard communication frequency rates (i.e., band rates) the basic clock frequency of 8051 microcontroller should be exactly divisible by the internal counters of 8051. For instance, a crystal of 11.0592 MHZ frequency can provide a cycle frequency of 921.6 kHz. When this cycle frequency is divided evenly. it yields standard ‘communication baud rates of 19200, 9600, 4800, 2400, 1200, 600 and 300 Hz, ‘The fetching and execution ofan instruction may be completed in one. two or four machine cycles. Machine cycle is the smallest time interval required to execute a simple instruction or a part of complex instruction. A machine cycle consists of 6 states and a single state consists of2 clock pulses. Thus, a machine cycle consists of 12 clock pulses. ‘Therefore, the time required to execute an instruction is given by the equation represented below. 12xn 7,,= 2 ‘n= number of machine cycles required to fetch and execute an instruction. f= frequency of the crystal resonator. CREGISTER SET Q24. Discuss the register set of MCS-51 family of microcontrol (on Draw the register structure of 8064 and explain. ‘Ant The register structure of 8051 ia shown inthe igure below: es a taka i ig iL SR CSR (Model Papers, QS(t) | Apri-18, Set, 06(0) MIB) Te) PETAR) Ce] Pa ee i ‘mop | | TCON ZH TIF] [Reeser | | resiver | | Resiser | | Register A 3 Therap Register Taner Control RegBiers Reser] Lkeeser] Cera] PETER] FETED] CET eB] aes THo | [ 70 Tat 7 cuter | | comer} | counter | | Coutcr TineriConrol Registers TB] os] ee) Gee scon | | saur | [ rcon | | psw Resixer | [Reester | LRegster | | Register 1 eam ‘Sernl Data Registers Fags Pupse no|_ are Tar 2[~ Be | : Sack Pointer 20 | "hoe | Bit Aires for Th RAM Area Only : iF] Reps | . Bank wl 3 Toe Te 15 No Aatieaa ' Data Poser Rr peepee, | | rosa comer v2 Reger Bak TT Go Car) Cea oe} Foto | [Pont | | Pon? | | Port3 oof er taich_| | ten | [town _| |_tateh Regiter SRS Bark [Re oe Number of| Direct Byte Address oo[ ee Bis “indicates Bk Addressable oar 000 mo Tsteral Taal 7 ROM i g a ont : Figure Look for the SIA GROUP LOGO {Yf} on the TITLE COVER before you buyUNIT-4- (Introduction to 8051 Microcontroller) Instruction Register: This register holds the instruction which is to be decoded. Its. also used in power down mode operatic Progeam Address Register: This is 16-bit register which holds the address ofthe code to be accessed. The PC holds the addres for application to the address bus pins and it also outputs the address forthe edde oF data. There this program address regi finds its use during move instructions. Program Incrementer: This is a 16-bit register which keeps inerementing the address in accordance to the program flow. It used to facilitate PC to be used for addressing modes. RAM Address Register: This is also similar to program address register and it holds the address of the data reference. It fi its use during move instruction. ‘Temporary Registers - Temp 1 and Temp 2: TEMP 1 and TEMP 2 registers are used during comparisons and certain g operations, These operations use the contents of registers but do not modify them, Aand B Registers: The 8051 microcontroller contains 34 general purpose or working registers, Both the registers 4 and # are used to hold the results, after arithmetical (or) logical operations are performed. The 32 registers are arranged as part of intemal RAM in four banks fi to B, each consisting of 8 registers (Ry R,). B register is used during multiply and divide operations along, ith A register. Program Counter: Program counter holds the address of the next instruction to be executed. Program counter is automatical incremented after every instruction fetch. Program counter is the only register that dogs not have an intemal address. Program counter in SOSI is 16-bit wide, 0 it ean access program addresses from 0000h to FFFFh i.e, 64 k bytes. B ‘manufacturers have limited only 4 k bytes of ROM on the chip. Therefore program counter is used for aceessing adresses 0000 to OFFF, Port Latches (P,.P,, P,» P,): These registers specify the values to be output on an output port or the value read from an. port. They are also bit addressable. Each port is connected to an 8-bit register in the SER. chip data and code with the MOVX and MOVC commands. Flags and Program Status Word (FSW): The program status word contains four mathernatical (math) flags, one user p flag and two register select bits. 7 6 5 4:3 2 1 ° cr _|ac |or [rsi [rso [ze [- |p Figure: PSW Function Regi In the above figure, Carry Flag is set otherwise cleared. tis used for BCD arithmetic. Overtiow Flag (OF): This flag is set whenever the result of a signed number operation is too large causing the high order| over flow into the sign bit arity (P his flag is set if register 4 contains odd number of ones and cleared if register 4 has even number of ones. User Flag (F,): This flag is seveleared/tested by software as a user defined status flag. It is also called general purpose fi we [Re | Betbvertioon | ava 0 0 0 00-07% 0 1 1 08 - OF, 1 ° 22 10-178 1 i 3 18-1Fh ‘SPECTRUM ALL-IN-ONE JOURNAL FOR ENGINEERING STUDENTS ‘SIA GROUP &SARTO (TO 4.16 Stack Pointer Sapa data is stored onto stack. poten of and data is retriy os byte of data wan MICROPROcEs: al AM Sed by the CP Flies incremented iy ion. The address hel ion. An SSORS AND MICROCONTROLLERS [JNTU-KAKINADA], 'U to store information temporarily."Stack pointer is 8-bits wide, When and vice versa. Data is pushed onto the stack using PUSH instruction ler reset operation, the SP i lized to 07 H, causing the stack to begin at 08 HL. © ae commonly known as © of s sl Hy ks SFRs, The address of spes function registers lies in between 80 We not used by SFR. So, the unused address space between 80 H and FF H are feserved -Power down bi ty preogam power down ecfeation an bocned by sens Peretaren {CHMOS poses) Figure: PCON Rogistor Format (b) IP Gnterrupt Priority): IP(nterrupt priority register) is a 8-bit, addressable Special function register, whose is OXBSH. This register is used to alter priorities (high the interrupts of 8051. If IP = 0, the cor as follows, wey fener interop ScClaredy pesmi “ete ert ny ve re erat ek Sera serie proty evel Scared by peace Tet 2 utero pay eve Figure: Format and Bit Description of IP Register (or) micro-controller. (a) TMoD (b) SCON. SPECTRUM ALL-IN-ONE JOURNAL FOR ENGINEERING STUDENTS4:20 MICROPROCESSORS AND MICROCONTROLLERS [JNTU-KAKINADA] Anse . (a) Timer Mode Control (TMOD): Both timers 0 and 1 use the same TMOD register which is an 8-bit register where the or Acts are et aside fr time O and th de for timer. In that case, the lower 2-bits are use c lowe imer Dand the upper 4-bits are set aside fi . re used to indicate the simer mode and upper 2-bits specify the operation ee HstS: 4 x 2 1 oO mi [Mo [gate | C/T, | Mi_| Mo Timer Mode Control Function Register sating Control: When set timer/counter is enabled only while the INTI/INTO pin is high and 7R1/0 if the TCON is set are by the gate Ga The timers in 8051 have a means of starting and stopping. The start and stop bits of the timer are ‘controlled by soft art bits TRO and TRI, ‘an event count, by counting clock pulses from input pins 70 or 71.1F C/T" is cleared to O'by program itis used as at (MO, Mi: Mode Select Bits: tis sed wo select the timer mode. There are three modes. Mode 0 is a 13-bit timer, mode 1 is a Muhit timer, mode 2 an 8-bit timer with automatic reload option and mode 3 establishes TL & TH as two seperate counters. (by _ SCON: Serial Controt Register SCON: SCON register is an 8-bit register used to program the stat bit, stop bit and data pits of data framing. This register is used to specify the mode in which the serial port is to work, 76 5 4 3 2 1 0 ‘ smo] smi | sma [REN | TB8 | RBs | 71 | Rr “Figur: Tho SerialPort Control (SCON) ‘The functioning of bits SMO and SMI is shown in below table. [sno [sn 0] 0) made Ochi einer band = TS 0 | 1 | -esituarr tau = vriable mode : | 1 | o | eaivuarr aud 732 or 968, mode 2 1 | 1 |, osicuare tnd = vale mode 3 Table 'SM2_ It ean be used for multiprocessor communication in modes 2 and 3. If itis set to *1" in mode 1, no interrupt is generated tunless a valid stop bit is received. Iti clear to ‘0° if mode 0 is in use. Also, if 9 bit of the received data is a “1” and when ‘SMB is set to “I” then an interrupt will be generated. The interrupt will not be generated if 9* bit is set t0 *0", sett ‘I"to enable reception. REN Receive Enable bit. ‘TB 8 Tiansmitted bit 8 Its set (or) cleared by program in mode 2 and mode 3. RBS Received bit 8, Itis bit 8 of received data in mode 2 and 3; it is unused in mode *0” and it function as stop bit in mode 1. ‘TI Transmit Interrupt Flag. Itis set to *1" at the end of bit time end it is to be cleared by the program. RI Receive lntemupt Flag. tis seto“I'atbit 7, halfway through mode 1 and end in mode ‘O* and itis also cleared by the program. ; : A. io PORTS AND MEMORY ORGANIZATION : 229. Draw different 8051 port structures and explain. Also specify thie features of different parallel! /O ports available with 8051 microcontroller. Anst The 8051 has four bidirectional ports and they are, 1. Port 0(P0) 2 Port (Pl) 3. Port2(P2) 4. Port 3 (P3). , 2 Look for the SIA GROUP LOGO {{ on the TITLE COVER before you buyofa latch, an output driver and an input driver. ‘The input and output drivers of ports O and the output drivers of pot byte of the extemal memory address, is given by the port 0, which i time multiple the port 2 outputs the hiah byte of the extemal memory address if the address is 16 BH Y multiplexed address and data bs and port 2 would be outputting the 4, ~ Ay, auldress Hine ‘Apart from being pin ports, they also serve the functions of various special features Such 2% P30 RXD Serial input port P31 TXD Serial output port P32 INTO. External interrupt 0 P33. INTI External interrupt 1 external memory. The low e being read Or Written While ved with the byte being read or ti Tit aide. (c.) port 0 carries AD, to AD, Tihs port 3 pins are multifunctionats rt 2 are used to access the P34 TO Timer 0/Counter 0 external input, P35 TI Timerl/Counter 1 external input P36 WR External data memory write strobe 3.7 RD External data memory read strobe. Consol Signals ‘AddrossDasa : ead Latch Bt =a Interna Bus Banral Woteto Latch Control Fa a opie = a PORT SFR Latch - a Read Pin Data (@) Por 0 Structure Read Latch Bat Internal Bus Bete Write to Lateh a PORT SFR Latch eee genre eee () Pont Structure a i fea = oes ies = - pee Soe peg ane mene SPECTROM ALL-IN-ONE JOURNAL FOR ENGINEERING STUDENTS ee oupMICROPROCESSORS AND MICROCONTROLLERS [JNT! Alerate Output eee Invern Bus Write to Late PORT SFR atch ndtaten Alternate apt (2) Poet3 Structure Figure: 8051 Port Structures ‘The above functional diagram shows that each of the four ports consists of atypical bit atch and VO buffer. Type D Mip-flop is used to represent the bit latch, In response toa “write to latch” signal from the CPU, D flip-flop will clock in a value from the internal ‘bus. Along with the response tothe “read pin” signal from the CPU, the level of the port pin itself is also placed on the intemal bus. ‘Some instructions that read por, activate the read latch signal and others activate the “read pin signals. ‘From the functional diagram we observe that, the ourput drivers of ports O and 2 are switchable to an internal address and. *address/data bus by an intemal contrel signal for it in external memory access. Also, if there isa 1” inthe P3 bit latch, then the output is controlled by the signal labeled “alternate output function”. 30. Explain the memory organization of 8051 microcontroller (or) Draw and explain the capacities of internal and external program memory and intern: data memory. 7 Ans: Memory organization in'8051 microcontroller is done as follows, 1. Program Memory 4) Extemal program memory i) Internal program memory. 2. Data Memory ( _Extemal data memory of 64 k bytes capacity * Gi) Internal data memory of 256 bytes capacity. 1. Program Memory: Program memory is accessed through EA pin. 1f EA is high, then internal program memory is accessed till OFFFH memory location and external program memory is accessed from 1000H to FFFFH memory location. If BA pins low, only external program memory is accessed from 0000H to FFFFH memory locations (64 k). Program ‘memory organization in 8051 shown in figure (1), FEFFH, FFFFH, o iy Exenal program ‘emery tema [OFFA progam mm L ooo (eae Figura : Look for the SIA GROUP Loco ZY on the TITLE COVER before you buyData Memory: Data memory organization is shown in figure (2). The instruction MOVX is used to access external data memory of size 64 k. Here, internal data memory of 256 bytes has.two partitions, . () 00H — FFH for internal data RAM (128 bytes) Gi) 80H ~ FFH for special function registers (128 bytes). a FFFFHL Special ) : function regsters External 128 bytes) ata ‘ > Lsoir eee nena baw data RAM i (128 byes) ont 00011 (i Internat Data Memory i) External Data Memory 7 igure (2): Data Memory Organization 31. Explain about memory and 0 addressing of 8051. Ans: (Godel Papert, Q5() | ApriMt8, Set, a5) Microcontrollers can be used to connect a man-machine interface and the machine itself. For example, the buttons: ‘operate a microwave act as the interface between the machine and the user. Depending on the button pressed. the microcont gives the corresponding instructions to the machine. There are many applications that use microcontrallers. Hence, the know! bout interfacing devices to the microcontroller and expanding of microcontroller memory is very important, ‘Memory Interfacing: Memories like SRAM, EPROM, EEPROM, cte., are usually interfaced to the microcontroller tore the capabilities of 8051, However, such interfacing does not utilizes the vital resources of the system. External Memory : 4 The $051 gives the facility to interface external RAM or ROM, if application demands more RAM. and ROM wh exceeds its limit. 4 Twoseparate external memory spaces are made available by the 16 bit PC and DPTR by different control pins for er external ROM and RAM chips respectively. ees External RAM is accessed by DPTR and up to 64 KB of RAM ean be interfaced. RAM Interfacing: Memory chips have, 1. One or more pins are called CS (chip select) or CE (Chip Enabled). The CS should be activated to access the 2. Address lines varies depending upon the memory capacity A, —A,, for? KB'RAM (2!"=2.kB). * 3. Control signals, Output Enable (OF) and Write Enable (WE), 4. Data (/P, O/P) lines. : : Yee x o VO data ine = 2k«8 ES (p)“D) om T V,.GND : Figure () SPECTRUM ALLIN-ONE JOURNAL FOR ENGINEERING STUDETis.MICROPROCESSORS AND MICROCONTROLLERS [JNTU-KAKINADA] In connecting a memory chip to microcontroller following points are to be noted, The data bus of microcontroller is connéted directly to the data pins of memory chip. Control signals RD (read memory) and WR (rite memory) from microcontroller are connected to the OF and WE pins ‘of memory chip respectively : The address ines from CPU are connected directly to the address ‘on memory capacity), “The remaining upper adress pins are wsed to activate CS pin of the memory chip. No data ean be written into or read es of the memory chip as per requirement (depending from the memory chip unless CS is activated Example: Interfacing 443 RAM Let the adress of chip is 300011 0 3FFF : Aig Au Ay Arz Ait Aio Ao An Ay Ag As Au As Az Aro ood soo oto o 0 oo ot wer Lb go eo oe ere ors Tochipscket “To adiress tes of memory chip cs ‘Then, the corresponding interfacing diagram is shown in figure (2). Au Ao Figure (2) Interfacing with Exteraal ROM: The 8031 chip isa ROM less version of the’ 8051. in many systems, where the on chip ROM of the 8051 is no sufficient, the use ofan $031 is ideal, since it allows the program size to be as large as 64 k bytes. ~ BA Pin: The EA pin is comected to <1 nica thatthe program code is stored in the microcontroller’s on-chip ROM. To indicate that the program code is stored in extemal ROM, this pin must be connected to ground, This isthe ease for the 8031 based system. : Sometimes due to repeated buring and eesing of on-chip ROM, its UV-EPROMis no longer working. In such cases, one can also‘use any 8051 a5 the $031, We have to connect EA pin to ground and connect the memory chip to external ROM containing the program code P, and P, Ports: The Program Counter (PC) of 8031/51 is 16-bit. Hence, it is capable of assessing up to 64 k bytes of program Ode. Inthe 8031/51, pot and port 2 provide 16-bit address to access extemal memory. Port O is multiplexed address/data. P, Pyovides the lower Bit adesses 4,4, and P, provides the upper 8-bit addresses 4, ~ dy. Py 8 alo used to provide the 8-bit data bus D,~D, “The address latch enable infor the 8031/51 microcontroller decides whether P, is used as data or address path. When ALE = the #031 uses forthe datapath and when ALE = 1, iti used for the address path, Look for the SIA GROUP Loss GB ‘on the TITLE COVER before you buyUNIT-4 (Introduction to 8051 Microcontrotler) Demultiplexing of address/data paths of port 0 is done using 74LS373 latch, which ‘shown in the figure @) RD ny RD roy WR one wk} Cone! io SEN 77 "Rie Upper $it sonst Address bot Address bis re (3I: Address Data Demultiple Normally ALE = 0 and P, is used as data bus for sending data out or receiving data i use P, as an address bus, it puts the addresses 4,-4, on the P, pins and activates ALE = 1 to indicate that P, has the addres PSEN: Another important signal for the 8031/51 is the PSEN (Program Store Enable) signal, To access external ROM c program code, the 8031/51 uses the PSEN signal, se Figure (4) shows the connection of 8031 to external program ROM: ‘Whenever, the 8031/51 wants When the EA pin is connected to ground, the 8031/51 fetches opcode from extemal ROM by using PSEN (In other PSEN is used to fetch the code). The PSEN pin is connected to the OE pin of ROM. In chips where EA is connected to ¥... PSI is not activated 7 son cA RD m7 ~ WR ome sonst G_Enable Do vasa Do Figure (4): 8031 Connection to External Program ROM " LO Interfacing: V/O devices like keyboard, 7-seement LCD display, simple on-off switches, microwaves, etc. are the mon devices that are interfaced to 8051. ‘The capability of 8051 is not fully utilized with these devices and there are many! applications that expose the capability of 80S1. Shopping malls with fire alarms, electric circuit alarms are such applicati “The following points must be considered, while interfacing the /O devices with the microcontroller. (Check the number of ports required for interfacing the VO device. “The speed with which an I/O device and the microcontroller operate must be synchronized. If memory is already interfaced to 8051 and if there is some problem interfacing the /O device, then go fora \ interfaced with 8051. SPECTRUM ALLIN-ONE JOURNAL FOR ENGINEERING STUDENTSAWOL LE ALAR OT COE GE 9 an 4.26 MICROPROCESSORS AND MICROCONTROLLERS [JNTU-KAKINADAI 4,5 INTERRUPTS ? 32. Define polling? Explain interrupt structure of 8051. ‘Apsi-t0, Set, a8(0) MIP) (or) Explain interrupts in 8051. (Refer Only Tnterript Strweturé 6f 8051) Ans: polling For answer refer Unit-V, QUI, Interrupt Structure of 8051: An nterupis a signal either from hardware or from a program that interrupts the normal processing, of the CPU. The 8051 have five interrupts which are available to users. But many manufacturers data sheets have six interrupts since they include Reset, ‘The six interrupts in 8051 are as follows, 1. Reset: when reset pin is activated the 8051 jumps to address location 0000. ‘Two from the timer/counter overflow flags, one for timer O and one for timer 1. Memory locations 000BH and 001BH in the interrupt vecior table belong to timer 0 and timer 1 respectively. 3, Two interrupts from external inputs (INTO and INT!). Pins of port 3, port 3-bit 2 (P3.2) and port3 - bit 3 (P3.3) are for extemal hardware interrupts INTO and INTI respectively. These external interrupts are also referred to as EX1 and EX2. ‘Memory locations 0003H and 0013H in the interrupt vector table are assigned to INTO and INT1. 4, One from serial port (71 or R1) both for transfer and receive. Memory location 0023H in the vector table belongs to this interrupt. Table below shows the interrupt vector table for the 8051 Alllthe interrupts of 8051 are vectored interrupts i.e., when interrupt occurs, the control of microcontroller is automatically transferred to its ISR. Interrupt : (Hex) Reset Extemal hardware 3.212) interupt to (INTO) ‘Timer interrupt (TFO) : Extemal hardware P3.3(13) interrupt | (INT1) Timer 1 interrupt (TF1) Serial COM interupt “(land Th) ble: Interrupt Vector Table Enabling and Disabling an Interrupt: Upon reset, all interrupts are disabled (masked), that is none of them will be recognized by the microcontroller, even if they are activated. The interripts must be enabled by software, so that the microcontroller can, respond (recognize) to them. A register called IE (Interrupt Enable) is used for enabling (unmasking) and disabling (masking) : the interrupts. Figure shows IE register, itis bit addressable register. repo ote ee 2 1 0 FA | - [et [es [em | ext | ero] Exo d (16) Special Function Regist igre: The Interrupt Ei Look for the SIA GROUP LOGO {Y} on the TITLE COVER before you buyUNIT-4 (Introduction to 8051 Microcontroller) nabled Interrupt Bits: Disables all interrupts, if Za ~ 0 and no interrupts will be recognized (acknowledgeg ch interrupt source is individually enabled, or disabled by setting or clearing its enable bit. Reserved IF.5 ET2: Enabled Timer 2 Overflow Interrupt: If ET2 = 1 the timer 2 overflow or capture interrupt is enabled. If} the timer 2 interrupt is disabled 1es Jed Serial Port Interrupt: ES ~ 1, enables serial port interrupt and ES. nabled Timer 1 Overflow Interrupt: ETI =L, enables overflow interrupt and ET nd EX nables it, ETO 1. enables it, EXO = 0 disables it. : rity in 8051 microcontroller. Mayiune-t4, Sea (or) ). disables serial port interrupt, 0, disables it enabled External Interrupt 1: EX1 = 1, disables it. O disables it nables it bled Timer 0 Overflow Interrupt: ETO= 1, Hnterrupt 0: EX! Q33. Write a short notes on interrupt pr Explain interrupt priorities in 8051, Interrupt priori priority interrupt register. Tego Povey timer shoo inert Ocoee Figure: Interrupt Priority (IP) Special Function Register Bits set to | indicates higher priority and bits cleared to 0 indicates lower priority. Interrupts with a hight priority interrupt another interrupt with a low priority, the lower priority interrupt continues after the higher is fimished. If two interrupts with the same pr iy oceurs at atin hen the following priority level can be used. Interrupt External Interrupt 0 (EO) ‘ Fimer/Counter 0 overflow (TFO) External Interrupt 1 CEI) Timer Coumer I overflow (TF1) Serial (RI ot TH) Example The serial interrupt could be assigned the highest priority by setling PS bit in IP register to “1? all others to" group of memory locations set aside to hold the addresses of ISRs is called the interrupt veetor table. Steps in Executing an Interrupt; The 80S examines the interrupts at the end of every machine eyele ($6 state). SPECTRUM ILL-IN-ONE JOURNAL FOR ENGINEERING STUDENTSMICROPROCESSORS AND MICROCONTROLLERS [JNTU-KAKINADA] Tecognized the microcontroller goes through the following steps, and saves the address of the next instruction (PC) on the stack, ‘Once the interrupt i finishes tx 1 also saves the current status ofall the interrupts internally (not on the stack). 11 jumps to a fixed location in memory called the interrupt veetor table that holds the address of the interrupt service routine. The interrupt service subroutine uni it Upon executing the RET! instruction, the micro-controtler returns to the place where it was interrupted. First it gets the Program Counter (PC) address from the stack by popping the top two bytes of the stack into the PC. Then it starts to cexeoute from that address. What are the different sources of interrupts in 80517 Explain each of them in det vcrocomputer gets the address of the ISR from the interrupt vector table and jumps to it, It starts to executing the -aches the last instruction of the subroutine which is RET (return from interrupt). : Anranaay93, Set, 08 “The 8051 microcontroller includes six interrupt sources. They are. 1.” Reset External interrupt-0 at pin-12 (INTO) External interruptet at pin-13 (INT) + “Timer0 interrupt and Timer interrupt Serial por interrupt. Reset: The reset interrupts the highest priority and non-maskable interrupt. When the reset interrupt occurs, the program contol is immediately transferred tote starting location of the program memory. Thus on reset, the 8051 microcontroller starts its operation fom the execution of the instruction inthe first location of program memory (ie., 000014). he external interrupt occurs when the signal at INTO pin isa ow signal. This External Interrupt at pin-12 (AW interrupt i indicated by the interrupt Nag IE, ie. When signal at BVTD pin is low then 1E, will beet to 1, ie. IE, =U ‘When signal st INTO pins high then IE, willbe set to 0, ie. IE, = 0 External Interrupt- at pin-13 (INT): The external interrupt-l oceurs when the signal at INTi pin is a high signal “The status ofthis interupt is indicated by the interupt flag IE, When INTH = 0 then IE, =I When INTI =I then IE, = 0 : ‘Timer-0 and Timer-t Interrupts: Thé overflow of 8051 timer (timer-0 or timer-1) acts as an interrupt to the 8051 microcontroller. When a timer overflows, the Timer Flag (TF) of respective timer will be set to 1, (i.e, TF = 1). When timer.0 overflows, then TF, = 1 and When timer-1 overflows, then TE, = 1 Serial Port Interrupt: The serial port interrupt is generated whenever a data byte is transmitted or received By the 8051 microcontroller. The interup bit RI will beset to I (ie, RI= 1), when a data byte is received by 8051 and the interrupt bit TIwill be setto I (ie. TL=1j, when a data byt is transmitted by 8051. Since, either of the two events (ic. transmitting of data) indicates a serial port interrupt to 8051, the interrupt bits RI and TI are logically OR in order to feed 4 single of serial por interupt tothe 8051 ; s s 4.6 TIMERS AND COUNTERS A Explain in detall the modes of operation of timer unit in 8051 microcontroller. __Api-t6, sat, (0) (8) (or) Explain the modes of operation of timer unit in 8051 microcontroller. 2 ‘Aprilt7, Se, 6(8) MIB] (or) Explain different modes of counter/timer in 8051. : Look for the SIA GROUP Loco Qf on the TITLE COVER. before your »Mi Lae, i 4.29 J an UNIT-4_ (Introduction to 8051 Microcontroller) Bn ‘The different Modes of Counter/Timer in 8051 are as follows, veto alt it sets the Mode 0: In the mode 0, the timer register is configured as a 13-bit register. As the count rolls fro" sae NTI =). The mer interrupt flag TF1. The counted input is enabled to Timer/Counter. When TR1 ~ 1 and either B86 7, jy TH11 and 7/1. 13-bit register consists ofall $-bits of 7H11 and the lower S-bits of TL. Ithokds values between 000K 10 1 pp it comes The upper 3-bits of TL are indeterminate and should be ignored. When the timer reaches its maximum to initial value 0000 and TF is raised. : ‘ Pulse ao Interrupt —| | tx-sbis |—{ tex }—> 8 fore values of 0000 t0 for starts counting Mode 1: This mode is same as mode 0 except that the timer register is being run with all 16-bits. Th re TF =1 the timer FFFFH can be loaded into the timer’s register TL and TH. Once it is loaded, the timer must be started. The ti and continues till it reaches its limit of FFFFH. When it moves from FFFF to 0000, it sets the timer flag o” is stopped. Pulse input eo Tux.sbis |[roxstis | {tux PS" 7 Figure 2k: Timer Mode-t 16.bit TimerfCounter aa ‘Mode 2: It is an §-bit timer, therefore it allows only values of 00 to FFH to be loaded into the timers register 7H After loaded with the §-bit value, then the timer must be started. It is also alled as auto reloaded mode, jt of FFH. After the timer is started, it stats count up by incrementing the TL. register, It counts up till it reaches its limit Pulse fae TEX bis TEX |—> interrupt 3 W Reload Tx THX bits Figure (3: Timer Mode-2 Auto Reload of TL from TH for mode 3. Placing Mode 3: Timer 0 and 1 may be programmed to be in mode 0, 1 or 2 independently. This does not hold good 7 “ ia -t 0. Timer 0 in mode timer in mode 3 causes ito stop counting. The control bit TRI and the timer 1 flag TF are then used by 3 becomes two completely separate 8-bit counters 70 is controlled by the gate arrangement and sets timer flag TO whenever it ‘overflows from FFh to 00h. THO receives the timer clock | under the control of TR1 only and sets the TF flag when it overflows. Puke ube __ toes } TRO }—> Interrupt f12 : TR THO Bis Tr i bem TCON : Figure (4: Timer Mode-3 4.7 SERIAL COMMUNICATION Q37. Discuss in detail about serial port operation in 8051 microcontroller. Ans: The 8051 microcontroller consist of a serial port intended for serial communication. The type of communication of serial por is full duplex, this means that, data can be transferred and received simultaneously. To transmit and receive the data, the. | serial port makes tse of pins TaD and RxD respectively, During this communication process the register SBUF is used to hold the data, the register SCON is used for controlling the data and the register PCON is used for controlling data rates. The SBUF_ | register isa special type of register which is used by serial port to access the reveive and transmit register. The transmit regis is loaded when something is written into SUF register and while reading SBUF a separate receive register is accessed. The sters is 99H. j address used by these mutually exclusive re SPECTRUM ALL-I-ONE JOURNAL FOR ENGINEERING STUDENTSrE a, 4.30 q “The serial por conggepp— MICROPROCESSORS AND MICROCONTROLLERS [JNTU-KAKINADA] jicroee (Port consi mirocoraie p etea mdes,e mete prem mnes The lesion oa periclr mole 75 ar fis bd AT BSEON ween Sess te The: ‘Several bit formas of PCON register and SCON register are shown in fgute (1) and figure (2) respectively. ates He altint sete se eae hese ESB) Figure (1) MSB = Most Significant Bit LSB = Least Significant Bit Posi i a Name and Significance PcoNo [IDL Tdle mode bit. For CHMOS microcontrollers, this bit is set to 1 by program torenter idle mode configuration. Peon, | FD Power. down bit, For CHMOS microcontrollers this bitis set t0 1 by program to enter power down configuration. PCON2 | GFO | General purpose user flag bit 0". Set/cleared by program. PCON3 | GF | General purpose user flag bit ‘I. Sevcleared by program. Poons-4} - Undefined. PCON.7 | SMOD. | Itisa serial baud rate modify bit. It is ‘O" whenever reset. To double the baud rate it is set to 1" Table (1) 7 6 5 4 3 2 1 0 smo| smi |sM2|REN| TBs] RBs} TI | RI se) (3B) Figure 2) ‘Name and Significance ‘Receive interrupt flag. Cleared by software after servicing and set by hardware when byte is received. ‘Transmit interrupt fag. Cleared by software after servicing and set by hardware when byte transmitted. , Received bit 8, Set/cleared by hardware to indicate the data of 9* data bit received. E ‘Transmit bit 8. It is set and cleared by hardware in order to 2 determine the state of 9* data bit transmitted in 9-bit UART mode. Receiver enable contro! bit. It is set and cleared by software in oder to enable/disable serial data reception. i Serial port mode control bit 2. It is set by software in order to ‘SCON.O scont | TI SCON2 | RBS scon3 |’ TBS scons | REN scons | SM2 disable reception of frames for which bit 8 is zero. ‘Serial port mode control bit 1. It is set and cleared by software. scons | SMI SCON.7 ‘Scrial port mode control bit ‘0°. It is set and cleared by software. Table (2) ‘S14 GROUP LOGO {YB on the TITLE COVER before you buy Look for thUNIT-4 (Introduction to 8051 Microcontroller) 038. Explain with the suitable waveforms for different modes of serial data transmission modes in ag (Model Papers, Q5(6) | Ape (or) Explain different seriai data transmission modes in 8051. Ans: : Serial data transmission may be carried out in four different modes each operating at different baud rates. Selection particular mode is done by setting SMO and SMI bits in SCON register as shown in table below and the baud rates ean be (for only mode-1.2 and 3) through SMOD bit in PCON register. sMo|smi| Modes | Description 0 | 0 | Mode o | Shift register \ 0 | 1 | Mode I |, 8-bit UART 1} o riya Mode 2 } 9-bit UART. Mode 3 | 9-bit UART : Table ‘Mode 0: Mode 0 is also referred as shifi register mode as shown in figure (1). In this mode, 8-bits of data is transmitied, received through a single RXD pin, Here, an internal pulse source is connected to TXD pin for providing shift clock to extemal circuits = RXD Das Ot TXD Check -Extemal Data Bis Shifted in - Figure (1): Shi Register Made 0 Timing During the transmission through RXD, data is shifted out ic.,on the tailing edge of S6P2 change of dita occurs. At! data received must be in synchronizm with the TXD shift elock. : At the trailing edge of SSP2, data is sampled and then atthe leading edge of shift clock, itis shifted into SBUF. In 6, the baud rate cannot be varied and it is usually higher than the standard communication rates, . Mode 1 (8-bit UARI ‘TXD pin and received 4 his mode configures SBUF as a 10-bit full duplex receiver/iransmitter, Here, data is transmitted XD pin simultancously. Its data format is shown in figure (2), Step | Dy p, [san ve [se] P| P| PAL | m. | > | al at Mode 1 3 Here, transmission is initiated with a start bit followed by 8 data bits and a siop bit when the transmissfon of al 101 finishes, interrupt flag TI is set to *1’. . SPECTRUM ALL-IN-ONE JOURNAL FOR ENGINEERING STUDENTS - sIA GROUP.MICROPROCESSORS AND MICROCONTROLLERS [JNTU-KAKINADA] tated during the trailing edge of start Bit. Data bits are received in the same sequence in which they wore transmitted, and are shifted into the receiver at a specified baud rate. The baud rate for mode 1 is obtained by using timer 1, and the required baud rate can be calculated by using the timer | overflow flag as shown in the equation below, 2s00 ct x (Timer Lovertlow flequene Band rte = 75 x0 frequency) ‘Mode 2: This mode is identical to mode 1 but the data word contains’ bits as shown infigure (3), = es 50° Beas vse | a 3 Figure (2 Serial Transmission of 11-bits in Modo 2 Data formot contains one start bt, 9 data bits and one stop bit. Dring the transmission, the TBS bit of SCON register is transmitted asthe 9 data bit. During the reception, 9 data biti stored in RBS bit of SCON register, discarding both start and ‘Baud rate inthis mode is determined by SMOD bit of PCON register and the oscillator frequency as shown below, Bau drate =- aS (Oscillator frequency) Mode3 : ‘This mode is identical to mode 2 that transmits 11-bits. The only difference is that its aud rate is determined by timer | overflow flag as in the case of mode 1 given below, Bau dae = 77 x(Tirer Fovertow rat) Look for the SIA GROUP LOGO ZY on the TITLE COVER before you buy