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116 views30 pagesCR-Unit 2-Notes
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/ 30
Chapter 2
‘SDR Architecture
Learning objectives
‘¢ Essentials functions of the Software Radio
‘¢ Basic SDR - Hardware Architecture
‘+ Computational Processing Resources
Software Architecture
'» Top level Component Topology
© Architecture goals
«Interface Topologies among Plug and Play Modules
1 Quantifying Degrees of programmability
Architecture Partitions
2.1. Essential Functions of the Software Radio
{ie dood te
Rado lL,
sranamiter [* commatiatone| Recawer [* Reciion
“Channel
Originator
source | 4| crane source |-4fchanet
oder || ‘Coder Decosee| *|acaser
Figure 2.1 Traditional model of radio communications
Software Defined Radio (SDR) is a radio communication system where
‘components that have been generally implemented in hardware (e.g. mixers,
filters, amplifiers, modulators/demodulators, detectors, ete.) are rather
implemented by means of software on a personal computer or embedded system.
Software radio is introduced to improve the performance of the existing hardware
ado 2.2 Cognitive Radio—
chanel Coding EDecading
Senice
Network
Suppet
“ont Cont
ile personne
Figure 2.2 Functional mode! of software radio communications systems
‘The Essential funetions of the software radios are:
| Multiband technology
Channel encoding
|. Multimode Radio
Information Security (INFOSEC)
Synchronous Digital Hierarchy (SDH)
Sooint control
Axle beam-forming,
Air Interface
9. Evolution support
10, Plug-and-Play architecture
1) Multiband Technology
+ Software Radio (SR) must w be supported 10 access more than one RF
‘band communication channels at the same time. It is essential for Software
Radio to identify different frequency signals and process at a time.
Muhiband technology generally involves the use of devices that an
access multiple frequency bands in the telecommunications spectrum. Tt
often allows these devices more room for data transfer, which provides users
with faster data service as wel as decreased dropped calls while using voice
‘communication, aR Architecture 2.8,
SDR that use this type of technology include the multiband radio, the
‘multiband antenna, and the multiband scanner, as well as accessories like
filters and other types of audio accessories, These devices usually access
‘multiple frequency bands at the same time, giving them more bandwidth
to transmit and reccive data or to communicate using voice calls. They
™ay be larger physically than the single band devices becuse they need 10
‘compensate for these additional features. More devices and equipment are
being developed to support this type of technology. Most of these devices,
are being used for public safety services and emergency response situations
like fires, floods, earthquakes, or medical emergencies,
2) Channel encoding
Channel encoder adds redundancy to the transmitted signal. It is helpful to
‘correct the errors caused by noise during transmission. Channel encoder used
to perform multiple functions. It includes RF/ Channel access, IF processing
and MODEM.
( RE/Channel access:
Antennas and RF conversion units are used (0 receive various RF band
frequency signals. These devices capable of receiving multiband RE signals.
Gi) IF process
Intermediate frequency processer performs filtering, frequency translation,
spaceltime Diversity processing, beam forming and related functions.
iit) MODER
Radio frequency channe! Modulator-Demodulator (MODEM) supports for
multiple frequency bands. It generates waveforms for different frequency
band.
3) Multimode radio
Software Radio generates multiple air Interface waveforms with different
frequency and these waveforms are demodulated in different frequency bands.
‘This property is called Multimode Radio,
4) Information Security (INFOSEC)
© Information security used for secured data communication. It Involves
various Process, The processes are i) Authentication, i) Stream
cencipherment, iii) Transmission security (TRANSEC). 2.4 Copnitive Radio.
«© Authentication process reduces the possibility at unauthorized access. It
‘reduces the fraud activities. Stream encipherment provides privacy.
‘Transmission Security (TRANSEC) hides the communication event using
spread spectrum techniques.
5) Synchronous Digital Hierarchy (SDH)
SDH allows to connect remote sourves includes data, facsimile, videos and
‘multimedia source with radio node. Local Area Network (LAN) or other
‘network may use for service and network support
8) Joint Control
4 Joint Control provides system stability, error recovery, timely date flow and
isochronons streaming of voice and video. Advancement of Radio,
the complexity ofthe Joint Contiol, Itevolves toward autonomous selection
fof band, mode and data format, Singleton (Single band versus multiple
bands) and nul functions further complicates the Joint Control
4 Joint Control integrates all fault modes, multiple Personalities and support
Fanetions on a limited resontce of Applications-Specific Integrated Circuits
(ASIC's), Fields Programmable Gate Arrays (FPGA's), Digital Signal
Processors(DSP's) and General-Purpose Computers (© provide a reliable
telecommunications object.
7) Agile Beamforming
«© Beamforming is a Radio Frequency (RF) management technique in which
‘an access point uses multiple antennas to send out the same signal. Here
‘multiple signals are transmitted to users and analyzing the feedback from
users the wireless network can adjust the signals it sends out and determine
the best path the signal must to be taken in order to reach a user device. It
means, beannforming shapes the RF beam as it traverses the physical space
of the systems,
‘s Agile beamforming is a faster process supports additional users and
enhances quality of service. Dedicated processors, DSP processor used for
analyzing the user feedback and determine the best path for transmission,
8) Al interface
‘Air interface is the radio communications link between the mobile station and
the active base station, In Software Radio new Air interface personalities may SESE eS ee eeeseeesese SDR Architecture 2.5
used for modifying any aspect of the Air interface. It includes waveform
hopping, spreading, or construction. The required resources (Bandwidth,
‘memory and processing capacity) must to be maintaining those available.
9) Evolution support
Evolution support used to define the waveform personalities and to download
them (e.g., over the at) and to confirm that each new personality is safe before
being activated
10) Plug-and-Play Architecture
‘¢ In Plug and Play architecture various modules are introduced into the
environment and removed. Here modules are connected with the
environment and removed, when it requites, ‘The major challenge of
architecture is interface points for Plug and Play hardware and software
‘modules.
SDR forums are inthe process of identifying such interface points through
generalized application programmer interfaces. A less obvious challenge
is this architecture will have the mathematical properties of controllability
and predictability for rue Plug and Play service,
2.2 Basic SDR
‘© The basie SDR contains the radio front-end, the modem and eryplographic
security functions. In some radios include support for network devices
connected to either the plain text side or the modem side ofthe radio, which
allows the radio to provide network services and to be remotely controlled
‘over the local Ethernet.
‘+ Some Radios additionally provide control ofexternal Radio Frequency (RF)
analog functions such as antenna management, coax switches, power
amplifiers or special purpose filters. The hardware and software architecture
‘must allow RF external features to be added when required for a paticular
installation or customer requicement
2.2.1 The Hardware Architecture of an SDR
Receive Mode:
‘© The RF Front End (RFFE) use the following functions to support the receive
‘mode, (i) Antenna matching unit, (ii) Low noise amplifier, (ii) Filters, 26 Cognitive Rudio—___ —
{iv) local oscillators, (v) Analog to Digital (A/D) Converters (ADC). ADCs
used 1 capture the desired signal and suppress undesired signals toa practical
extent. This expands the dynamic range of the ADC available to capture the
desired signal
ao
Seieat
alee
ini feng Ans
tt fopesion
ee
Figure 2.3. Digital receiver signal processing block diagram
‘The modem performs the received signal or synthesizes the transmitted
signal, of perform both functions for full duplex radio In the receive mode
‘operation, the modem shifs the carrier frequency of the desired signal to a
specific frequency, This will be nearly equivalent to heterodyne shifting the
cartier frequency fo Ditect Current(DC) as perceived by the digital signal
processor o allow it to be digitally filtered
‘The digital filter offers a high level of suppression of intesfering, signals
which not within the bandwidth ofthe desired signal. After that the modem
time-aligns and de-spreads the signal as required and recflters the signal to
the information bauslwidih, The modem then time-aligns the signal to the
symbol of band time so that it ean optimally align the demodulated signal
With expected models of the demodulated signal
‘The modem contains an equalizer to correct for channel multipath artifacts
and for filtering and delay distortions. It may include rake filtering to
‘optimally coherent multipath components for demodulation,
‘The modem compares the received symbols with the possible received
symbols and create a best possible estimate of which symbols were ee See SE eaaaccaeaeaeaeeeeeee SDR Architecture 2.7
transmitted. If there is a presence of weak signal or strong interference
some symbols may be received in error. If the waveform contains Forward
Emror Correction (FEC) coding the modem, decode the received sequence
of encoding symbols by using the structured redundancy introduced in the
‘coding provess to detect and correct the encoded symbols that were received
‘Transmit Mode:
‘* In transmit mode the RFFE includes Digital © Analog Converter (DAC),
local oscillators, filters, power amplifiers and antenna matching circuits.
‘The important operation of these circuits is to synthesize the RF signal
without introducing noise and spurious emissions at any other frequencies,
‘that might interfere with other users of the spectrum,
depen | ashe contesanny
fon
Figure 2.4 Digital transmitter signal processing block diagram
© The process of the modem in transmit mode is the inverse of that for
receiving. ‘The modem takes bits of information to be transmitted and
{groups the information into packets, then adds a structured redundaney
to provide for error correction at the receiver, After that group's bits to
bbe formed into symbols, selects a wave shape to represent each symbol,
synthesizes each wave shape and filters each wave shape to keep it within
its desired bandwidth. 2.8. Cognitive Radio. : Bee
‘© Modem spreads the signal to much wider bandwidth by multiplying. the
symbol by @ wideband waveform which is also generated to match the
‘desired transmit signal bandwidth, Ifthe waveform contains atime slotted
structure like Time Division Multiple Access (TDMA) the radio will wait
for the appropriate time while placing samples that represent the waveform
into an output First In First Out (FIFO) buffer ready to be applied to the
DAC.
«© ‘The modem must be control the power amplifier and the local oscillators 10
proxhuce the desired carrier Irequency and must contro! the antenna matching
‘unit (9 minimize the Voltage Standing Wave Ratio (VSWR),The modem
also control the extornal RF element including transmit yersus receive mode,
cartier frequency and smart antenna contro.
«© The erypiographic security function performs encryption any information 10
be transmitted, The Digital Encryption Standard (DES) and the Advanced
Encryption Standard (AES) used for eryptographic processing. In additional
10 provide privacy for voice communication, cryptography performs a major
role in assuring that the billing isto an authenticated user terminal. In the
future, it may used for authenticate transactions of delivering software and
purchasing services.
‘» The application processor used to implement a vocoder, a video coder, data
‘coder and selected web browser functions. The aim is to use knowledge of
the properties ofthe digitized representation of te information to compress
the data rate to an acceptable level for transmission,
's The voice, video and data coding is typically utilized knowledge of the
redundancy in the source sigaal (speech or image) to compress the data
rate compression factors typically in excess of 10:1 are achievable in Voi
coding and upto 100:1 in video coding. DSP processor supports to run
speech and video applications ane! General Purpose Processors (GPP) used
10 run Text and web browsing
2.3 Computational Processing Resources in an SDR
“The computational resources in SDR consist of General Purpose Processors (GPP),
Digital Signal Processing System (DSP), and Field Programmable Gate Array
(FPGA), These processors occasionally will include other chips that extend the
‘computational capacity, Dedicated purpose, non programmable chips not used in
SDR, because the flexibility to support waveforms and applications is limited. Sp Architecture 2.9
2.3.1. General Purpose Processors (GPP)
‘© Currently General Purpose Processers (GPP) selected by many SDR
developers are the PowerPC. Nowadays PowerPC from various vendors
available in the market, This type of processor is readily programmed in
standard C or C+ language, and this will support a very wide variety of
addressing modes, floating point and integer computation and large memory
space. These Processors usually including multiple levels of on-chip and
off-chip cache memory.
‘© These processors normally perform more than one billion mathematical
operations per second (mops). This -ype of General Purpose Processors
(GPPs) usually pipeline the arithmetic functions and decision login function
several Ievels deep in order to achieve these speeds. In addition, they
frequently perform the effective address computations in parallel with
arithmetic computation, logic evaluations and branch decisions,
2.3.2. Digital Signal Processing (DSP) Processor
‘The importance of the waveform mociulation and demodulation processes
isthe speed at which these processors ean perform real or complex multiply
accumulates. ‘The waveform signal processing process represents more than
90 percent of the total computational load in majority waveforms and the
protocols to participate in the networks frequently represent 90 pervent of
the lines of code.
«The importance of hardware SDR design is thatthe SDR architecture must,
Jude DSP type hardware multiply accumulate functions, so that the signal
processes can be performed at high spoed and GPP type processors forthe
protocol stack processing,
DSP Architectures are different than General Purpose Processors. The
DSP architecture is optimized to be able to perform multiply accumulates
in a very fast manner. DSP internal architectures contain one oF more
maltipliers and one or more accumulators in hardware.
‘The implication of this special purpase device has an unusual memory
architecture normally partitioned. So that these processors fetch two
‘operands simultaneously and also te able to fetch the next software
instruction in parallel withthe operanc fetches.
'* Nowadays, Digital Signal Processo-s are available’ that can perform
fractional mathematics (integer) multiply accumulate instructions at rates 218 Cognitive Radio. 2
‘of 1GHz, and also pestorm floating point multiply operations at 600MF
DSPs are also available ir the market with many parallels multiply
accumulate engines, reporting rates of more than 8G mops.
‘© The other important feature of the DSP is that it contains far fewer and
less sophisticated addressing modes. DSPs frequently utilize modi
of the using C language to more efficiently express che signal processing
parallelism and fractional arithmetic and thus maximize their speed. So that
the DSP is much more efficient processor for signal processing, but a less
capable device to accommodate the software associated with the network
protocols,
2.3.3 Field Programmable Gate Array (FPGA)
© Field Programmable Gate Array (FPGA) is capable of providing great
amounts of multiply aecumuate operations on a single chip, exceeds DSPs
by more than an order of magnitude. Ia FPGA, more than 100 multiply
accumulators can be organized to perform multiply accumulate processes
al frequencies of more than 200MEz
{ In additional (o the Digital Signal Processor, FPGA also provides the timing
logie to synthesize clocks, band rate, chip rate, time slot and frame timing,
‘thus leading to a reasonably compact waveform implementation. The signal
processing process expressed as a set of register transfer operations and
multiply accumulate engines, very complex waveforms can be implemented
in one chip, In addition Condic operations, log magnitude operations and
difference magnitude operations required specialized hardware
implementations when implemented in FPGAs.
© The disadvantage of using FPGA processors i that the waveform signal
processing is not defined ir traditional software languages such as C or
(C+, batin Very High Speed IC Hardware Description Language (VHDL),
a language for defining hardware architecture and functionality.
© Additionally FPGA implementations tend to be higher power and more
costly than DSP chips. All the three computational processors demands
significant off-chip memory. General Purpose Processors (GPP) requires
‘more than 128MDbytes of off-chip Instruction memory to support a complex
suite of transaction protocols of today's telephony standards. —— SDRArchitecture 2.44
‘© Nowadays SPRs contains a mix of these computational devices to assure
that supports a wide variety of desirable applications and implemented at
‘an acceptable amount of resource level
2.4 The Software Architecture of an SDR
«The majraim ofthe software architecture in an SDR sto place waveforms
and applications onto sofware based rao platform in a standanized
‘way, The waveforms and aplication ae installed, used and replaced by
nother application as required to achieve the user's objectives, Hardware
platorm must to have Highly standardized inefaces to make the waveform
‘and application interfaces in a standardized way.
ee
a (rence —]
|
(CoraReresavacn
vre)
We)
VO)
Faso Sercas Overs
‘ecu Savin ra
Gerdrdaed 05 nos - POUR Corgis Sam
perry Sy
oad Suppo Bas HW Devers, Sok SST
ieee
ordre Componnis a Process ul roses Resarae
Figure 2.5 Software Architecture of an SDR.
4 In this way the vendors can develop their waveforms independent of the
knowledge of the underlying hardware. Hardware developers also develop
aaradio with standardized interfaces, which can subsequently be expected to
‘run a wide variety of waveforms from standardized libraries.
© Application Programming Interface (API) procéeds the waveform
developments in radio hardware and the radio hardware translates commands
and status messages crossing those interfaces to the unique underlying
hardware through a set of common drivers. Additionally, the waveform
is installed into a radio, activated, deactivated and de-installed, and the way Cognitive Radio
in which radios use the standard interfaces must be standardized so that
the waveforms are reasonably movable to more than one hardware platform
implementation. The Software Defined Radio is dissolved into a stack of
hhardware and sofware functions with open standard interfaces.
‘The stack normally starts with the hardware and the one or more data buses,
used to move information among. the various processors, Several
standardized layers of soltware are installed on top of the hardware. This
ludes the boot load, the Operating System (OS), the Board
Support Package (BSP), and Hardware Abstraction Layer (HAL). The Board
Support Package (BSP) consists of inpuVoutput drivers that know bow to
control each interface,
software i
‘The Hardware Abstraction Layer (HAL) gives a solution for General
Purpose Processors to communicate with DSPs and FPGA processors, The
US government has introduced a standardized software architecture known,
as the Software Communications Architecture (SCA). This Architecture
adopted by defense contractors of many other countries worldwide.
‘The Software Communications Architecture (SCA) is a core framework
gives a standardized process for identifying the available computational
resources of the radio, matching those resources to the required resources
for an application.
‘The SCA is made upon a standard set of Operating System (OS) features
called. Portable Operating System Interface (POSIX). This also. has
standardized Application Programming Interfaces (APIs) to perform OS
unetions suchas file management and computational thread task scheduling,
The SCA core framework is the inheritance structure of the open application
layer interfaces and services, ‘These also provide an abstraction of the
underlying sofware and hardware layers.
The SCA also used # Common Objective Request Broker Architecture
(CORBA) middleware to provide a standawlizes metho for software objects
{o communicate with each other, regardless of which processor they have
been installed on the architecture.
‘The SCA also gives a standardized method of specifying the requirements
for each application, performed in eXtensible Markup Language (XML)
The XML i resolved and helps to determine how to distribute and instal
the software objects SDR Architecture 2.43
# The core framework provides a detail about how to configure and query
distributed software objects, In SDR the objects will be waveforms and
other applications
2.5 Top-Level Component Topology
Radio components are shown as ares in the topological model. ‘The are may be &
union or composition of other ares. ‘These arcs defining a natural encapsulation
hierarchy for the radio system atthe top level of the hierarchy, The radio node is a
black box mapping air interface, user and network events to appropriate responses.
‘The functions of Top-Level Component highlighted in Table 2.1
wave oat
Figure 2.6 Topological model of dual band handset streams
‘chanre
‘Source
ion hae Eo oe
Hest Pes some bet
Figure 2.7 Interfaces constraint topological properties 244 Cognitive Radio.
Table 2.1 Attributes of Top-Level Software Radlo Functional Components
Functional | a: eee
Attributes Remarks
Component
Source | Audio, vdeo, fax and data | Ubiquitous Standard
| coding & interfaces algorithms (e.g., ITU, ETSI .))
decoding
Service & | Mutplexing setypand | Wireline and internet]
Network | contol, data services, standards inlaing mobil
| suppor | intermtworking
i “Transmission seouiyy” | May be nallbat in
Information | authentication, non increasingly essential in
ae ‘repudiation, privacy,data | wireless applications.
inegity He e
Base band modem, timing | INFOSEC, modem and
sera ecovery,equalization,channel] IF interf Xt
coving | TOvHLequalizaton.channe TP imerfaces are not |
decoding | NEN8"0rmS,predisionion | standardized
lc rocessing etc,
MopEn, | Dac data processing
iP Bem forming, diversity, | Innovative channel decoding
rocessing | COMPining, characterization | for signal and Qos
processing | ofall IF channels. enhancement.
RE Access | Antenna diversity, RF TFinterfaces are not
conversion standardized.
wnat | Situltaneitymultiband ‘Automatically employ multiple
a propagation, wireline channels or modes for
| interoperability. ‘managed QoS. Be
Muipte | Multiband, moliimode, agite | Multiple Simultaneous
personalities | Sees, interoperable with | personalities may cause
| legacy modes. considerable RFI.
ete ponents Local or network support
| support __| personalities. z
Joint source/channel coding, | Integrates user and network
Joint control | aynamic QoS vs load interfaces multi-user, multiband)
ey stanM*!| contol, processing resource | and multimode capabilites,
‘management. SDR Architecture 2.18
‘# The atributes listed in the above table indicate the allocation of functions to
top-level components, In the topological space, each allocated function may
bea singleton, a subset of the null et. The important functional components
are source coding and decoding, service and network susport, INFOSEC,
RF/channel modem, IF processing and RF/channel access.
‘# Ina Topological model of a radio consists of ares that correspond to the
components. Components are represented topologically by a pair of ares
between data interfaces, the topological domain and range of the maps.
‘© The audio and video (Analog ) waveforms comprise the interface between
the source set and the source coding and decoding functions. Source bits
are normally encoded, Services and network support functions add forward
crror control structure, IF INFOSEC is null then protected bits become clear
bits, Interfaces may be null at one level and visible at ancther level.
‘+ Implementation of topologies is constrained by the interfaces and related
standards as summarized in Table 2.2. Interfaces ae shown ina space which
contains the interface signal itsel x(0 and related meta-level characteristics,
the implementation class(hardware or software), impedance, connector type,
bandwidth, ete. Meta level topological space for analog stream interface
‘identifies dimension of the space and the associated elements that apply
ust be specified.
‘Table 2.2 Top-Level Interface Topologies
Tnterface Key characteristies ‘Topological proper
‘Audio, video, facsimile | Infinite dimensional;
Analog Stream | stream. filtering constraints
comprise open balls).
‘Coded bitstreams and | Finite dimensional; frame
packets, ADCs define | and data structure defines
Source Bitstream | s finite window into a | subspaces. Finite precision
‘quantized discrete time | defines adynamic range
‘sampled waveform. subspace for the ADC.
Framed, multiplexed, | Finite dimensional; FEC
Clear Bitstream | Forward Error Contotted | subspaces have rch
(FEC) bitsteeamsand | algebraic properties.
packets 216 Cognitive Radio, -
Interface | Key characteristics ‘Topologi
Random challenge, — Finite dimensional;
authentication responses, | randomized streams;
Protwoted Bitstream | Public key, enciphered | complex message passing
bitstreams and packets, | for downloads, null
interface reverts to clear
bis
Discrete time synchronous) Digital waveformpropertes
Base band waveform | quantized sample streams | determine fidelity of
(one per cartier) analytic representation
Composite digitally | Analog IPhasinfinite
1 waveform pre-emphasized waveform | dimensional topology.
ready forup conversion. | Digital IF may have base
band product topology.
Power level, shape, Analog RF has infinite
RE waveform, ‘adjacent channel interface | dimensional topology,
ete, are controlled, includes spatial and
temporal dimens
Packaged bitstreams may | Synchronous Digital
require ATM, SS7 or ISO | Hierarchy (SDH) Signalin
protocol stack processing. | System 7(S
[Network Interface
7) subspaces,
| Control Interfaces to all
Parameter spaces:
hardware and software, nae
non-linear logic subspaces.
Joint Control
initalizationtault-recovery
eee ‘Download from evolution cee
ware Objects includes seit descriptive
‘support systems.
language subspaces.
ae Software objects Download Topologi SDR Architecture 217
2.5.1 Radio Knowledge Representation Language (RKRL)
Radio Knowledge Representation Language (RKRL) providesa standard language
in which data exchanges can be dynamically defined. It was created to be used
by software agents with a high level of competence, partly driven by a large
bank of a priori knowledge. RKRL used to define topological spaces of software
defined radio, RKRIL used to study the general properties ofthe interfaces and
‘computational components
omit
Cass: Analog team
Implementation : Hardware
Signabintertace: coax_0C_ coupled
Impedance: 50 ohms.
Carrier Frequency : Base band
21 Bandwidth 350 Ke
‘Slgnale: Protected signal}
Interface. signal: 0)
‘Control parameters
Cin : 048 to 2066
Gain conto: ASC.
Figure 2.8. ilustrative meta_Level Topological Space for analog stream
interface, a topological domain
2.5.2 Topological properties for separability
Interface domain descriptions used for guaranteed delivery of services in the
software radio's Plug and Play environment. The Plug and Play interface must be
effectively separated the module fio
involves the following topological properties.
the rest of the system. Effective separability
1. Composition of module functions on the interface topology provides a well
defined system level function using specified resources to deliver the
intended service.
2. Performance (e.g. spectral purity, data formats, throughput, response time,
ete.) under function constitution is within specified bounds. 248 Cognitive Radio
‘The separability of modules at Plug-and-Play interface points is shown in Figure
2.9, Plug- and - Play modules may consist of top level functional components stich
‘as modem or they may be specified across arbitrary points deep in the hierarchy
such as at the vocoder. ‘The goal of the system is that the system as a whole
bbchaves as desired if the Plug-and-Play modules and the host system each have
the prescribed testable local properties.
AS
7 See)
© momen int oe
eb pent ay Mader
Figure 29 Topology of Plug- and- Play intariaces
2.6 Architecture goals
© The architecture is a famework in that a set of components is used to
achieve specified functions or services withia speed constraints o design
rules The mathematica framework for Plug and lay architecture must be
inductively established the desired properties of given set of components
‘within specified design rules, Radio services an tecinology ar open ended
ttre services, so thatthe framework must be extensible both «9 new
services and o new implementation platforms.
«© The bottom up analysis of the computational propenies of software radio
components amange the stage foF the derivation of the layered vital
machine refecence model. The Architecture prteiples that support Plug
and Play modularity are developed in his process.
«Plug and Play architectre include atleast the folowing characteristics.
1. Compatibility: The structure of the Pg and Play modules must be
compatible with that of the software radio environment and ares plug
into nodes for funetion composition SDR Arehitecte 2.19
2, Predictability: Module composition should preserve radio service
defining properties ofthe system, and when control is exerted, it must
not have unintended consequences. Modules should not consume
jonal resources.
excessive comput
2.7 Interface Topologies. Among Plug- and- Play
Modules
The Interface Topologies ensure the use of resources in Plug and Play module and
further simplifies the Plug and Play architecture
2.7.1 Interface topologies - definitions
Space
Space is the boundless three-dimensional area in which objects and events have
relative position and direction. Physical space is often assumed in three linear
dimensions, although in modern physies consider with time.
Set
In mathematics, a set isa well-defined collection of distinct objects, considered as
‘an object in its own right. For example, the numbers 2,4, and 6 are distinct objects,
\when considered separately, but when they are considered collectively they form
a single set of size three, written {24,6}. Sets are one of the most fundamental
‘concepts in mathematics,
Subset
‘The Subsot is set that is a part of a larger set. In Mathematics its defined by a
sel consisting of elements of a given set that can be the same as the given set or
smaller.
Topological spaces
‘# Topological Spaces are a space which has an associated family of subsets
that establish a topology. The relationships between members of the space
are mathematically analogous fo those between points in ordinary two- and
{hree-dimensional space
‘© The topological space, denoted as (X, O,), i set X and a family of subsets,
,, the open sets, that includes X and the empty set ®, and that are closed
under countable union and finite intersection. The topology isthe family of
subsets O that has the geometric and algebraic sructare. 2.20 Cognitive Radio ae
© In a topological space, users can represent the geometric properties of
interfaces between software radio modules. for example an interlace (©
‘an analog source may be modeled as a subset of functions on R that obeys,
certain constrains
© The constraints consist of bandwidth, adjacent channel interference and
‘minimum and maximum transmitted power. The numberof such waveforms
fare uncountable in an analog interface, but regulatory bodies and the
hardware limit the waveform to structures subset of the possible waveforms.
© In the Figure 2.10 shows two analog waveforms in the tine domain (a)
‘and in the frequency domain (b). The range of waveforms is (A) allowed
‘and prohibited (B). The time domain waveform A is within the allowed
geometry while Bis not, eg, due to unacceptable power or Radio Frequency.
‘These widely user interface constraints limit the elements in the interfaces
to subset with specified properties, such constraints are also geometic,
defining an interior A, the conforming region and an exterior B, the
‘nonconforming regions.
(@) Time domain (6) Frequency domain
Figure 2.10 Interface waveform topology A permitted and B prot
2.7.2. Finite intertace topologies
IF set X has afte numberof elements |X| then all subsets are open sts and
axe also close sets). If [X] = M, then the sumer of topologies which induce
{ topoogical space on X is 22°, double exponential, The entire canite
topologies donot saisy closure under union and theft intersection as required
fora topological space
Basis; A st B C X is bass for Oi the members ofthe Ox ae the union
ofmembers o B. A basis is asmallerset than Or from which Ox may be induced SDR Architecture 2.21
by taking unions. From a hardware viewpoint, a pin in a connector isan interface
point x; €X. The set {Uly-2xi, (81 },4®} which contains three subsets {x1}, ® and
the union of all other interface pins work just as well. The basis with the most
subsets is {¢,{x1)}. the N41 sets that include the empty set and each element of|
X taken as a singleton set
Rigid topology
‘If all of the pins are nocded for a feasible connection, then (X} is the
‘only subset of X that consummates a connection and the-efore is the only
‘element in the interface topology. In this case O, = {{2}} and the topology
is just the fixed set of required inputs X. Ths type of topology may be called
as rigid topology.
« Rigid topology is not a topological space because it lacks the emply set.
‘The empty set isnot a valid member ofthe interface set if the interface will
rot work if no pins are present. If the system will work with the connector
unplugged (eg. resort a default or fail-soft mode) then the empty setis a
member of the interface topology. These principles apply to software.
‘© The Application Programming Interface (API) may specify a call (0
synthesize ( function, for example, with arguments RF (frequency) and
W (bandwidth). If both are required, then Y = {RF, W) and O, = {(¥}
(On the other hand, a tagged API withthe expressions RF= 859 or W = 30
or both of neither would be defined over the space containing (RF), {W),
X= (RF, W} and © :0, = {{RF, W}, {w}, (RF}, ©}
Flexible API topology
‘The emply set also included in the topology because the interface works even if no
arguments are provided, Thus Ox = {X, (RF), {W}, ®}, the set ofall subsets of
X or power set, that is a topological space. This power set topology is the discrete
topology. It may also be called the flexible API topology.
2.7.3. Function call parameter topologies
‘The geometric structure of interface spaces may be better understood using
‘additional notions,
‘Simplex: The simplex is an ordered set of points in a :opological space
which are adjacent in some sense, such as sharing a relation R. Higher
dimension simplexes induce lower dimension simplexes, Simplexes may
bbe embedded in Euelidean space but need not be, 2.22 Cognitive Radio
‘Complex: The simplicial complex is a union cf simplexes which includes
the union of all ofthe lower dimension simplexes of giving simples.
Q Connected: Simplicial complexes that share a q+1 face are q connected,
‘The three vertices of a plane tiangle [A,B,C] n Figure 2.11. Comprise a
‘wo-dimensional simplex, adjacent in the sense that they are connected by
‘the points in the plane. Each line segment joining these vertices comprises
4 one-dimensional simplex (e.g. [A.C}), denoted by the pairs of vertices.
‘The second triangle ABD that shares one Tine segment with the first is also
‘2 simplex. Bach tiangle together with its edges and veitices comprise a
simplical complex. The two triangles also comprise a simplicial complex
in which the simplexes are 1-connected by the line [A,B],
rele 8,.)
Sirol (A.8,0)
Figure 2.11 The three vortices of a plane triangle [A,B,C]
2.7.4 Plug and Play interface geometry
‘Channel slain
© Plugsand Play ntrce Ponts
Seated rte
oO
Figure 2.12 Interface geometry reflects design decisions See eee SDR Architecture 2.23
‘© The Implementation’ decisions created during design, development,
Integration and test may contain an interfuce to a point in the simplical
‘complex of interfaces shown in Figure 2.12. Each domain and range of a
‘conventional interface consist ofa designated point in its simplicial complex,
‘+ The Plug and Play interface defines an interoperable subset ofthe interface
space. The physical interface subspaces must change as a function of the
hhardware in that the service is delivered. The logical interface subspaces
also may have to change as i function of the software modules configured
to deliver the services. .
‘To be fully extensible, plug-and'play modules have to be combined
dynamically. ‘To achieve this in a controlled way, the control algorithin(s)
‘must have @ way of comparing the range of one function to the domain of
the next to determine whether the Funetions are compatible
2.7.5 Extensible capabilities
# Capabilities may be defined as levels (tags) such as the type of video
teleconferencing interface in the International Telecommunication Union
(ITU) H.320 Recommendation. The level of call control support from
‘Microsoft’s Telephony Applications Programmer Interface (TAP) provides
another example of tagged capability levels. The advantage of tags is
simplicity,
Resourcs
‘Type: ADC
Set Extension
Range (eutput-space):
{={None, Double)
=N,
--=(A.80)
Buffering: None(ut
Buffering : Double
ater size 128
Buffer (A); Butter (8)
‘Butera singleton (2410.1)
)
Figure 2.13 Resource topology extension: ADC buttering 2.24 Cognitive Radio—___ —
‘6 Capability tags are defined during the standard: setting process and
‘documented in the text ofthe standards. One disadvantage ofthis approach,
js the possibility misinterpretation of the (ext ofthe standard. To counter this
chronie problem ia telecommunications standardization, European
‘Telecommunication Standard Institute (ETSI) promulgated language that
makes the formal specification of the ITU Z.100 Specification and
Description Language (SDL) the normative expression of the standard with
text providing amplification and explanation
Another disadvantage of capability tags is that capability cannot be defined
dynamically by the radio itself, Computational manipulation of tags by
the software radio joint contro! function is also limited. For control of
dynamically defined software radio-based services the constraints must be
computer processable and the system must be able fo act on them daring
‘operations,
‘* Dynamic capability roquices designer independent semantics. It is easy 10
define designer independent semantics in a way that is readable by people.
‘To do this in a way that is processable by a control algorithm requires a
Radio Knowledge Representation Language (RKRL). Patts of RKRL that
are defined a priori may be extended dynamically, For example, to add
‘a control that seleets from either the A or B butler in a double buffered
interface of a notional ADC requires extension of the interface topology,
‘adding sets and subsets to (X, O,) as suggested in the example of
Figure 2.13.
‘© The Meta level expressions , , , and
introduce the meta-level primitives Buffering, Buffer
Buffer and Buffer lug to an extensible RKRL. The RKRL is assumed to
include a priori semantics for resource, type, setextension, outpul-space,
range, none, double and singleton topotogies (X Ox) with new subsets.
‘ Range expressions define the new subspaces. Diserete values constrain
the subspace (0 an interface point, The resource extension indicates that
if Buffering= none, then the effect is null. In addition the new subspace
Buffering (Double) has the rigid interface topology. The extensibility of
interface topologies may be expressed in the following architecture principle. SDR Architecture 2.25
Architecture principle - explicit extensible interface topology
Application Programming Interfaces (API's) and hardware interfaces, whieh
cexhibit an explicit topological basis for each interface parameter space and that
are extensible in the fleld exhibit the level of flexibility nec
sary to extensible
plug and play services.
Implications: The requirement for an explicit basis assures thatthe interface
topology is defined to completely include error states. ‘The full extension of the
topological bases in the field requires an RKRL. - like representation of radio
resources. This is an area of current research in wireless computer communications
systems.
2.8 Quantifying Degrees of Programmability
4 The degree of programmability used in an Implementation of software radio
‘Architecture and this is a fundamental step for implementation. Since
‘contemporary radios designed, with a mix of processor types, the mix of
processors must be characterized precisely.
'# A single arc is considered as a highest level topological model of a radio,
‘The are is hierarchically divided into its primitive components. Normally
the hardware primitives are diserete devices and software primitives are
single machine instructions.
«Primitives are redefined using software in the fleld are labeled. The measure
of programmability is calculated by dividing the number of labeled primitive
ares and total number of primitive ates.
+ ASIC's programmability is Himited and only a few parameters are modified,
_most ofits gate-level ares will not be labeled.
1 FPGA
‘¢ FPGA’s ate, ideally completely programmable device. But practically, they
‘are more programmable than ASIC's, but it has limitations in using gates
and interconnections, Programmable radios made mostly on reconfigurable
FPGA’.
+ The programmability of an FPGA is more limited than DSP chip, because
usable gates on the FPGA used for expanding the radio functions.
© The topological model of both devices allows us to characterize
programmability more accurately. "The two dimensions (states. and — SPRAvwhitecture 2.33
‘© The Multicast simplifies programming of multichannel operations such as
initializing 100 subscriber channels distributed among 25 DSP chips. A
ccontrol-flow methods show in the figure consist of a minimum set necessary
{for multiprocessor software radio infrastructure.
‘¢ The signal-flow methods shown in the Figure 2:18, set up andl manage signal
flow paths among processes on the sume or on different processors. This
type of isochronous streams must meet tight timing constraints. Since the
‘overhead associated with @ path setup and tear down, these paths must be
‘opened and closed multiple times witkout being set up and torn down again.
# The Time references obtained during network synchronization must be
maintained on a per-network basis, Normally the software radio generally
participates in multiple networks simultaneously, it must maintain absolute
ime per network, This will be accomplished not by changing the software
radio's clock, but rather by defining time offset and drift rate for each
‘network, other ancillary functions related to queuing data messages (€.2.
Toad, clear, test status, and reset) are also part of the infrastructure,
‘© Using the virtual machine paradigm 0
virtual instruction set Infrastructure that consists of Message-Passing,
Isochronous Paths, Timing, Frequency, and Positioning instruction subsets.
‘This extension build on the facilities of the kernel. An expanded RAM
simplex contains a Message-Passing, etc, All subspace depends on kere!
services, the lowest layer of the emerging virtual machine hierarchy.
set of software provides a new
Short Questions & Answers
1. Mention some essential functions ofthe software radio.
(May/June 2014)
{A function of software radio includes spreading/de-spreadinig, frequency
hhop and chip rate recoveries, endeldecode functions, modulation!
‘demodulation, carrier and symbol rate recovery, and channe! interleaving!
