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LM3100
SNVS421H – JANUARY 2006 – REVISED OCTOBER 2017

LM3100 Synchronous 1MHz 1.5A Step-Down Voltage Regulator

1 Features 3 Description
•
1 Input Voltage Range 4.5 V to 36 V The LM3100 Synchronously Rectified Buck Converter
features all functions needed to implement a highly
• 1.5 A Output Current efficient, cost effective buck regulator capable of
• 0.8 V, ±1.5% Reference supplying 1.5 A to loads with voltages as low as 0.8
• Integrated 40 V, Dual N-Channel Buck V. Dual 40 V N-Channel synchronous MOSFET
Synchronous Switches switches allow for low external component thus
reducing complexity and minimizing board space. The
• Low Component Count and Small Solution Size
LM3100 is designed to work exceptionally well with
• No Loop Compensation Required ceramic and other very low ESR output capacitors.
• Ultra-Fast Transient Response The Constant ON-Time (COT) regulation scheme
• Stable With Ceramic and Other Low ESR requires no loop compensation, results in fast load
transient response, and simplifies circuit
Capacitors
implementation. Through the use of a unique design
• Programmable Switching Frequency up to 1 MHz the regulator does not rely on output capacitor ESR
• Max. Duty Cycle Limited During Start-Up for stability, as do most other COT regulators. The
• Valley Current Limit operating frequency remains nearly constant with line
and load variations due to the inverse relationship
• Precision Internal Reference for Adjustable Output between the input voltage and the on-time. The
Voltage Down to 0.8 V operating frequency can be externally programmed
• Thermal Shutdown up to 1 MHz. Protection features include VCC under-
• Thermally Enhanced HTSSOP-20 Package voltage lockout, thermal shutdown and gate drive
under-voltage lockout. The part is available in a
thermally enhanced HTSSOP-20 package
2 Applications
• 5VDC, 12VDC, 24VDC, 12VAC, and 24VAC Device Information
Systems PART NUMBER PACKAGE BODY SIZE (NOM)
• Embedded Systems LM3100 HTSSOP (20) 6.50 mm × 4.40 mm
• Industrial Controls (1) For all available packages, see the orderable addendum at
• Automotive Telematics and Body Electronics the end of the data sheet.

• Point of Load Regulators

• Storage Systems
• Broadband Infrastructure
• Direct Conversion from 2/3/4 Cell Lithium
Batteries Systems
Typical Application
L CFB
VOUT
RFB1
RON REN COUT
N/C N/C
RFB2
SW N/C
CBST SW PGND
VIN VIN PGND
LM3100

VIN VCC
CIN
BST RON
GND EN
SS FB
CSS N/C N/C
N/C TST CVCC

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Table of Contents
1 Features .................................................................. 1 7.3 Feature Description................................................... 9
2 Applications ........................................................... 1 7.4 Device Functional Modes........................................ 10
3 Description ............................................................. 1 8 Applications and Implementation ...................... 13
4 Revision History..................................................... 2 8.1 Applications Information.......................................... 13
8.2 Typical Application .................................................. 15
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4 9 Layout ................................................................... 17
9.1 Layout Guidelines ................................................... 17
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4 10 Device and Documentation Support ................. 18
6.3 Recommended Operating Conditions ...................... 4 10.1 Receiving Notification of Documentation Updates 18
6.4 Thermal Information ................................................. 4 10.2 Community Resources.......................................... 18
6.5 Electrical Characteristics........................................... 5 10.3 Trademarks ........................................................... 18
6.6 Typical Characteristics .............................................. 6 10.4 Electrostatic Discharge Caution ............................ 18
10.5 Glossary ................................................................ 18
7 Detailed Description .............................................. 9
7.1 Overview ................................................................... 9 11 Mechanical, Packaging, and Orderable
7.2 Functional Block Diagram ......................................... 9
Information ........................................................... 18

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision F (December 2009) to Revision G Page

• Changed layout of National Data Sheet to TI format ........................................................................................................... 16

Changes from Revision G (April 2013) to Revision H Page

• Added Application and Implementation section, Device Information table, Pin Configuration and Functions section,
ESD Ratings table, Thermal Information table, Feature Description section, Device Functional Modes, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section....................................... 1
• Deleted Simple Switcher from Title ........................................................................................................................................ 1

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5 Pin Configuration and Functions

PWP Package
20-Pin HTSSOP
Top View

1 20
N/C N/C
2 19
SW N/C
3 18
SW PGND
4 17
VIN PGND
5 16
VIN VCC
6 LM3100 15
BST RON
7 14
GND EN
8 13
SS FB
9 12
N/C EP N/C
10 11
N/C TST

Pin Functions
PIN DESCRIPTION
NO. NAME
No Connection
1,9,10,12,19,20 N/C
These pins must be left unconnected.
Switching Node
2, 3 SW
Internally connected to the buck switch source. Connect to output inductor.
Input supply voltage
4, 5 VIN
Supply pin to the device. Nominal input range is 4.5 V to 36 V.
Connection for bootstrap capacitor
6 BST Connect a 0.033 µF capacitor from SW pin to this pin. An internal diode charges the capacitor during
the high-side switch off-time.
Analog Ground
7 GND
Ground for all internal circuitry other than the synchronous switches.
Soft-start
8 SS
An internal 8 µA current source charges an external capacitor to provide the soft- start function.
Test mode enable pin
11 TST
Force the device into test mode. Must be connected to ground for normal operation.
Feedback
13 FB Internally connected to the regulation and over-voltage comparators. The regulation setting is 0.8 V at
this pin. Connect to feedback divider.
Enable pin
14 EN
Connect a voltage higher than 1.26 V to enable the regulator.
On-time Control
15 RON
An external resistor from VIN to this pin sets the high-side switch on-time.
Start-up regulator Output
16 VCC Nominally regulated to 6 V. Connect a capacitor of not less than 680 nF between VCC and GND for
stable operation.
Power Ground
17, 18 PGND
Synchronous rectifier MOSFET source connection. Tie to power ground plane.
Exposed Pad
DAP EP
Thermal connection pad, connect to GND.

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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN MAX UNIT
VIN, RON to GND –0.3 40 V
SW to GND –0.3 40 V
SW to GND (Transient) –2 (< 100 ns) V
VIN to SW –0.3 40 V
BST to SW –0.3 7 V
All Other Inputs to GND –0.3 7 V
Junction Temperature, TJ –65 150 °C
Storage temperature, Tstg 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) (2) ±2 kV

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply Voltage Range VIN 4.5 36 V
Junction Temperature Range TJ –40 125 °C

6.4 Thermal Information

LM3100
THERMAL METRIC (1) PWP (HTSSOP) UNIT
20 PINS
RθJC Junction-to-case thermal resistance 6.5 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

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6.5 Electrical Characteristics

at TJ = 25°C, and VIN = 18 V, VOUT = 3.3 V (unless otherwise noted). (1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
START-UP REGULATOR, VCC
VCC Output voltage CCC = 680 nF, no load TJ = –40°C to 125°C 5.0 6.0 7.2 V
ICC = 2 mA TJ = –40°C to 125°C 50 140
VIN - VCC Dropout voltage mV
ICC = 20 mA TJ = –40°C to 125°C 350 570
IVCCL Current limit (1) VCC = 0 V TJ = –40°C to 125°C 40 65 mA
Under-voltage lockout
VCC-UVLO VIN increasing TJ = –40°C to 125°C 3.6 3.75 3.85 V
threshold
VCC-UVLO-HYS UVLO hysteresis VIN decreasing 130 mV
tVCC-UVLO-D UVLO filter delay 3 µs
IIN Operating current No switching, VFB = 1 V TJ = –40°C to 125°C 0.7 1 mA
Operating current,
IIN-SD VEN = 0 V TJ = –40°C to 125°C 17 30 µA
Device shutdown
SWITCHING CHARACTERISTICS
Main MOSFET
RDS-UP-ON TJ = –40°C to 125°C 0.18 0.35 Ω
Rds(on)
Syn. MOSFET
RDS- DN-ON TJ = –40°C to 125°C 0.11 0.2 Ω
Rds(on)
Gate drive voltage
VG-UVLO VBST - VSW increasing TJ = –40°C to 125°C 3.3 4 V
UVLO
SOFT-START
ISS SS pin source current VSS = 0.5 V TJ = –40°C to 125°C 6 8 9.8 µA
CURRENT LIMIT
Syn. MOSFET current
ICL 1.9 A
limit threshold
ON/OFF TIMER
VIN = 10 V, RON = 100 kΩ 1.38
tON ON timer pulse width µs
VIN = 30 V, RON = 100 kΩ 0.47
ON timer minimum
tON-MIN 200 ns
pulse width
tOFF OFF timer pulse width 260 ns
ENABLE INPUT
VEN EN Pin input threshold VEN rising TJ = –40°C to 125°C 1.236 1.26 1.285 V
Enable threshold
VEN-HYS VEN falling 90 mV
hysteresis
REGULATION and OVER-VOLTAGE COMPARATOR
In-regulation feedback
VFB VSS ≥ 0.8 V TJ = –40°C to 125°C 0.784 0.8 0.816 V
voltage
VSS ≥ 0.8 V TJ = –40°C to 125°C 0.788 0.812
Feedback over-
VFB-OV TJ = –40°C to 125°C 0.894 0.920 0.940 V
voltage threshold
IFB TJ = –40°C to 125°C 5 100 nA
THERMAL SHUTDOWN
Thermal shutdown
TSD TJ rising 165 °C
temperature
Thermal shutdown
TSD-HYS temperature TJ falling 20 °C
hysteresis

(1) VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.

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6.6 Typical Characteristics

All curves taken at VIN = 18 V with configuration in typical application circuit for VOUT = 3.3 V shown in this datasheet. TA =
25°C, unless otherwise specified.

1000 7
-40oC VIN = 36V
6
800
25oC VIN = 7V
5
o
125 C
600 VIN = 18V
VEN = 2V ; VFB = 1V
IIN (PA)

VCC (V)
4
Active mode, no switching

400 VEN = 0V 3
Shut-down mode
2
125oC -40oC VCC Externally Loaded
200 25oC
1 CVCC = 680 nF
VFB = 1V, no switching
0 0
0 10 20 30 40 0 20 40 60 80
VIN (V) ICC (mA)

Figure 1. Quiescent Current, IIN vs VIN Figure 2. VCC vs ICC

7
4000

6.5 RON = 100 k:

RON = 100 k:
3000
6 RON = 50 k:
VCC (V)

TON (ns)

5.5 RON = 20 k: RON = 25 k:

2000
RON = 10 k:
5 RON = 50 k:

1000
4.5 VCC not loaded externally
ILOAD = 700 mA
4 0
4.5 6 7.5 9 10.5 0 5 10 15 20 25 30 35 40
VIN (V)
VIN (V)

Figure 3. VCC vs VIN Figure 4. TON vs VIN

1000 RON = 25 k: 0.85
SWITCHING FREQUENCY, FSW (kHz)

L = 3.8 PH ILOAD = 1.5A

VOUT = 3.3V
800 RON = 50 k:
ILOAD = 0.5A
0.825 L = 4.7 PH
ILOAD = 0.4A
600 RON = 50 k:
VIN = 36V
ILOAD = 1.5A
VFB (V)

L = 8.2 PH
0.8
400 ILOAD = 0.5A
RON = 100 k:
ILOAD = 1.5A VIN = 4.5V
L = 14 PH
VIN = 18V
200 0.775
ILOAD = 0.5A
VOUT = 3.3A
0
0.75
0 10 20 30 40
-50 -20 10 40 70 100 130
VIN (V)
TEMPERATURE (ºC)

Figure 6. VFB vs Temperature

Figure 5. Switching Frequency, FSW vs VIN

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Typical Characteristics (continued)

All curves taken at VIN = 18 V with configuration in typical application circuit for VOUT = 3.3 V shown in this datasheet. TA =
25°C, unless otherwise specified.
0.4 100
VIN = 8V
90

0.3

EFFICIENCY (%)
80
Main MOSFET
RDS(ON) (:)

VIN = 36V VIN = 18V

0.2 70

60

0.1
Syn. MOSFET 50

40
0
0 0.3 0.6 0.9 1.2 1.5
-50 -20 10 40 70 100 130
LOAD CURRENT (A)
TEMPERATURE (ºC)
VOUT = 3.3 V

Figure 7. RDS(ON) vs Temperature

Figure 8. Efficiency vs Load Current
3 100

2 90
VIN = 4.5V
VIN = 8V
EFFICIENCY (%)
1 80
VIN = 18V
'VOUT (%)

0 70

-1 60 VIN = 12V

VIN = 36V VIN = 24V VOUT = 0.8V

-2 50
RON = 30 k:
VOUT = 3.3V
L = 6.8 PH
-3 40
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5

LOAD CURRENT (A) LOAD CURRENT (A)

VOUT = 3.3 V VOUT = 0.8 V

Figure 9. VOUT Regulation vs Load Current Figure 10. Efficiency vs Load Current
3

1 VIN = 12V
'VOUT (%)

VIN = 24V
0

-1

VOUT = 0.8V VIN = 4.5V

-2
RON = 30 k:
L = 6.8 PH
-3
0 0.3 0.6 0.9 1.2 1.5

LOAD CURRENT (A)

VOUT = 3.3 V, 1.5 A Loaded

VOUT = 0.8 V
Figure 12. Power Up
Figure 11. VOUT Regulation vs Load Current

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Typical Characteristics (continued)

All curves taken at VIN = 18 V with configuration in typical application circuit for VOUT = 3.3 V shown in this datasheet. TA =
25°C, unless otherwise specified.

VOUT = 3.3 V, 1.5 A Loaded

VOUT = 3.3 V, 1.5 A Loaded
Figure 13. Enable Transient
Figure 14. Shutdown Transient

VOUT = 3.3 V, 1.5 A Loaded VOUT = 3.3 V, 0.15 A Loaded

Figure 15. Continuous Mode Operation Figure 16. Discontinuous Mode Operation

VOUT = 3.3 V, 0.15 A - 1.5 A Load VOUT = 3.3 V, 0.15 A - 1.5 A Load Current slew-rate: 2.5 A/µs

Figure 17. CCM to DCM Transition Figure 18. Load Transient

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7 Detailed Description

7.1 Overview
The LM3100 Step Down Switching Regulator features all functions needed to implement a cost effective, efficient
buck power converter capable of supplying 1.5 A to a load. This voltage regulator contains Dual 40-V N-Channel
buck synchronous switches and is available in a thermally enhanced HTSSOP-20 package. The Constant ON-
Time (COT) regulation scheme requires no loop compensation, results in fast load transient response, and
simplifies circuit implementation. It will work correctly even with an all ceramic output capacitor network and does
not rely on the output capacitor’s ESR for stability. The operating frequency remains constant with line and load
variations due to the inverse relationship between the input voltage and the on-time. The valley current limit
detection circuit, internally set at 1.9 A, inhibits the high-side switch until the inductor current level subsides.
Please refer to the functional block diagram with a typical application circuit.
The LM3100 can be applied in numerous applications and can operate efficiently from inputs as high as 36 V.
Protection features include: Thermal shutdown, VCC under-voltage lockout, gate drive under-voltage lockout.

7.2 Functional Block Diagram

LM 3100
EN
11 EN AVDD
1.26V
VREF 0.92V
VIN 6V LDO VDD
0.8V
4,5 VIN VCC 16
VCC THERMAL
CIN C VCC
UVLO SHUTDOWN

1.26V
GND
R ON
260 ns BST 6
ON TIMER
OFF TIMER
15 RON Ron
START START VIN
COMPLETE COMPLETE Gate Drive SD
UVLO
CBST
VDD

8 PA LEVEL DRIVER L
DrvH
8 SS SHIFT
LOGIC SW 2,3
CSS DrvL VCC Vout
REGULATION
DRIVER
COMPARATOR
Zero -
1200 CFB *
Coil
Current
0.8V PMOS Detect
PGND 1
input R FB1
13 FB 80
C OUT

R ILIM
RFB2
CURRENT LIMIT 200:
0.92V COMPARATOR 32 mV 0.26:
OVER-VOLTAGE PGND 17,18
COMPARATOR
7

*optional

7.3 Feature Description

7.3.1 Hysteretic Control Circuit Overview
The LM3100 buck DC-DC regulator employs a control scheme in which the high-side switch on-time varies
inversely with the line voltage (VIN). Control is based on a comparator and the one-shot on-timer, with the output
voltage feedback (FB) compared with an internal reference of 0.8 V. If the FB level is below the reference the
buck switch is turned on for a fixed time determined by the input voltage and a programming resistor (RON).
Following the on-time, the switch remains off for a minimum of 260 ns. If FB is below the reference at that time
the switch turns on again for another on-time period. The switching will continue until regulation is achieved.
The regulator will operate in discontinuous conduction mode at light load currents, and continuous conduction
mode with heavy load current. In discontinuous conduction mode (DCM), current through the output inductor
starts at zero and ramps up to a peak during the on-time, then ramps back to zero before the end of the off-time.
The next on-time period starts when the voltage at FB falls below the internal reference. Until then the inductor
current remains zero and the load is supplied entirely by the output capacitor. In this mode the operating
frequency is lower than in continuous conduction mode, and varies with load current. Conversion efficiency is
maintained since the switching losses are reduced with the reduction in load and switching frequency. The
discontinuous operating frequency can be calculated approximately as follows:
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Feature Description (continued)

VOUT (VIN - 1) x L x 1.18 x 1020 x IOUT
FSW =
(VIN ± VOUT) x RON2 (1)
In continuous conduction mode (CCM), current always flows through the inductor and never reaches zero during
the off-time. In this mode, the operating frequency remains relatively constant with load and line variations. The
CCM operating frequency can be calculated approximately as follows:
VOUT
FSW =
1.3 x 10-10 x RON (2)
The output voltage is set by two external resistors (RFB1, RFB2). The regulated output voltage is calculated as
follows:

VOUT = 0.8 V x (RFB1 + RFB2)/RFB2 (3)

7.4 Device Functional Modes

7.4.1 Start-up Regulator (VCC)
The start-up regulator is integrated within LM3100. The input pin (VIN) can be connected directly to line voltage
up to 36 V, with transient capability of 40 V. The VCC output regulates at 6 V, and is current limited to 65 mA.
Upon power up, the regulator sources current into the external capacitor at VCC (CVCC). CVCC must be at least
680 nF for stability. When the voltage on the VCC pin reaches the under-voltage lockout threshold of 3.75 V, the
buck switch is enabled and the Soft-start pin is released to allow the soft-start capacitor (CSS) to charge.
The minimum input voltage is determined by the dropout voltage of VCC regulator, and the VCC UVLO falling
threshold (≊3.7 V). If VIN is less than ≊4.0 V, the VCC UVLO activates to shut off the output.

7.4.2 Regulation Comparator

The feedback voltage at FB pin is compared to the internal reference voltage of 0.8 V. In normal operation (the
output voltage is regulated), an on-time period is initiated when the voltage at FB falls below 0.8 V. The buck
switch stays on for the on-time, causing the FB voltage to rise above 0.8 V. After the on-time period, the buck
switch stays off until the FB voltage falls below 0.8 V again. Bias current at the FB pin is nominally 100 nA.

7.4.3 Over-Voltage Comparator

The voltage at FB pin is compared to an internal 0.92 V reference. If the feedback voltage rises above 0.92 V the
on-time pulse is immediately terminated. This condition can occur if the input voltage, or the output load, changes
suddenly. Once the OVP is activated, the buck switch remains off until the voltage at FB pin falls below 0.92 V.
The low side switch will stay on to discharge the inductor energy until the inductor current decays to zero. The
low side switch will be turned off.

7.4.4 ON-Time Timer, Shutdown

The ON-Time of LM3100 main switch is determined by the RON resistor and the input voltage (VIN), and is
calculated from:
1.3 x 10-10 x RON
tON =
VIN (4)
The inverse relationship of tON and VIN results in a nearly constant switching frequency as VIN is varied. RON
should be selected for a minimum on-time (at maximum VIN) greater than 200 ns for proper current limit
operation. This requirement limits the maximum frequency for each application, depending on VIN and VOUT,
calculated from Equation 5:
VOUT
FSW(MAX) =
VIN(MAX) x 200 ns (5)
The LM3100 can be remotely shut down by taking the EN pin below 1.1 V. Refer to Figure 19. In this mode the
SS pin is internally grounded, the on-timer is disabled, and bias currents are reduced. Releasing the EN pin
allows normal operation to resume.
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Device Functional Modes (continued)

For normal operation, the voltage at the EN pin is set between 1.5 V and 3.0 V, depending on VIN and the
external pull-up resistor. For all cases, this voltage must be limited not to exceed 7 V.

VIN VIN

LM3100
EN
STOP
RUN

Figure 19. Shutdown Implementation

7.4.5 Current Limit

Current limit detection occurs during the off-time by monitoring the re-circulating current through the low-side
synchronous switch. Referring to Functional Block Diagram, when the buck switch is turned off, inductor current
flows through the load, into PGND, and through the internal low-side synchronous switch. If that current exceeds
1.9 A the current limit comparator toggles, forcing a delay to the start of the next on-time period. The next cycle
starts when the re-circulating current falls back below 1.9 A and the voltage at FB is below 0.8 V. The inductor
current is monitored during the low-side switch on-time. As long as the overload condition persists and the
inductor current exceeds 1.9 A, the high-side switch will remain inhibited. The operating frequency is lower during
an over-current due to longer than normal off-times.
Figure 20 illustrates an inductor current waveform, the average inductor current is equal to the output current,
IOUT in steady state. When an overload occurs, the inductor current will increase until it exceeds the current limit
threshold, 1.9 A. Then the control keeps the high-side switch off until the inductor current ramps down below 1.9
A. Within each on-time period, the current ramps up an amount equal to:
(VIN - VOUT) x tON
'I =
L (6)
During this time the LM3100 is in a constant current mode, with an average load current (IOCL) equal to 1.9 A
+ΔI/2.

Figure 20. Inductor Current - Current Limit Operation

7.4.6 N-Channel Buck Switch and Driver

The LM3100 integrates an N-Channel buck (high-side) switch and associated floating high voltage gate driver.
The gate drive circuit works in conjunction with an external bootstrap capacitor and an internal high voltage
diode. A 33 nF capacitor (CBST) connected between BST and SW pins provides voltage to the high-side driver
during the buck switch on-time. During each off-time, the SW pin falls to approximately –1 V and CBST charges
from the VCC supply through the internal diode. The minimum off-time of 260 ns ensures adequate time each
cycle to recharge the bootstrap capacitor.

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Applications Information (continued)

25.0

RON = 100 k:
20.0

INDUCTANCE (PH)
15.0

RON = 50 k:
10.0

5.0
RON = 25 k:

0.0
0 10 20 30 40

VIN (V)

Figure 22. Inductor Selector for VOUT = 3.3 V

25

RON = 100 k:
20
INDUCTANCE (PH)

15
RON = 50 k:

10
RON = 25 k:

0
0 10 20 30 40

VIN (V)

Figure 23. Inductor Selector for VOUT = 0.8 V

8.1.1.4 CVCC
The capacitor on the VCC output provides not only noise filtering and stability, but also prevents false triggering of
the VCC UVLO at the buck switch on/off transitions. For this reason, CVCC should be no smaller than 680 nF for
stability, and should be a good quality, low ESR, ceramic capacitor.

8.1.1.5 CO and CO3

CO should generally be no smaller than 10 µF. Experimentation is usually necessary to determine the minimum
value for CO, as the nature of the load may require a larger value. A load which creates significant transients
requires a larger value for CO than a fixed load.
CO3 is a small value ceramic capacitor to further suppress high frequency noise at VOUT. A 47 nF is
recommended, located close to the LM3100.

8.1.1.6 CIN and CIN3

CIN’s purpose is to supply most of the switch current during the on-time, and limit the voltage ripple at VIN,
assume the voltage source feeding VIN has an output impedance greater than zero. If the source’s dynamic
impedance is high (effectively a current source), CIN supplies the average input current, but not the ripple current.
At maximum load current, when the buck switch turns on, the current into VIN suddenly increases to the lower
peak of the inductor’s ripple current, ramps up to the peak value, then drop to zero at turn-off. The average
current during the on-time is the load current. For a worst case calculation, CIN must supply this average load
current during the maximum on-time. CIN is calculated from:

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Applications Information (continued)

IOUT x tON
CIN =
'V
(12)
where IOUT is the load current, tON is the maximum on-time, and ΔV is the allowable ripple voltage at VIN.
CIN3’s purpose is to help avoid transients and ringing due to long lead inductance at VIN. A low ESR, 0.1 µF
ceramic chip capacitor is recommended, located close to the LM3100.

8.1.1.7 CBST
The recommended value for CBST is 33 nF. A high quality ceramic capacitor with low ESR is recommended as
CBST supplies a surge current to charge the buck switch gate at turn-on. A low ESR also helps ensure a
complete recharge during each off-time.

8.1.1.8 CSS
The capacitor at the SS pin determines the soft-start time, i.e. the time for the reference voltage at the regulation
comparator, and the output voltage, to reach their final value. The time is determined from the following:
CSS x 0.8V
tSS =
8 PA (13)

8.1.1.9 CFB
If output voltage is higher than 1.6 V, this feedback capacitor is needed for Discontinuous Conduction Mode to
improve the output ripple performance, the recommended value for CFB is 10 nF.

8.2 Typical Application

CFB CO3
L 15 mH
10 nF 47 nF

RFB1 VOUT = 3.3V

6.8k IOUT = 1.5A
RON REN
100k 200k CO1, CO2
CBST N/C N/C RFB2
2 x 22 mF
33 nF SW N/C 2.2k
VIN = 8V – 36V SW PGND
VIN PGND
LM3100

CIN1, CIN2 VIN VCC

CIN3
2 x 10 mF BST RON
0.1 mF
GND EN
SS FB
CSS N/C N/C CVCC
10 nF N/C TST 680 nF

Figure 24. Typical Application Schematic for VOUT = 3.3 V

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Typical Application (continued)

L 6.8 mH

VOUT = 0.8V
I OUT = 1.5A
RON REN CO3
30k 200k 47 nF CO1, CO2
N/C N/C RFB2
CBST 2 x 22 mF
33 nF SW N/C 40k
VIN = 4.5V – 24V SW PGND
VIN PGND

LM3100
CIN1, CIN2 VIN VCC
CIN3
2 x 10 mF BST RON
0.1 mF
GND EN
SS FB
CSS N/C N/C CVCC
10 nF N/C TST 680 nF

Figure 25. Typical Application Schematic for VOUT = 0.8 V

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9 Layout

9.1 Layout Guidelines

9.1.1 PC Board Layout
The LM3100 regulation, over-voltage, and current limit comparators are very fast, and will respond to short
duration noise pulses. Layout considerations are therefore critical for optimum performance. The layout must be
as neat and compact as possible, and all external components must be as close as possible to their associated
pins. Refer to the functional block diagram, the loop formed by CIN, the high and low-side switches internal to the
IC, and the PGND pin should be as small as possible. The PGND connection to Cin should be as short and
direct as possible. There should be several vias connecting the Cin ground terminal to the ground plane placed
as close to the capacitor as possible. The boost capacitor should be connected as close to the SW and BST pins
as possible. The feedback divider resistors and the CFB capacitor should be located close to the FB pin. A long
trace run from the top of the divider to the output is generally acceptable since this is a low impedance node.
Ground the bottom of the divider directly to the GND (pin 7). The output capacitor, COUT, should be connected
close to the load and tied directly into the ground plane. The inductor should connect close to the SW pin with as
short a trace as possible to help reduce the potential for EMI (electro-magnetic interference) generation.
If it is expected that the internal dissipation of the LM3100 will produce excessive junction temperatures during
normal operation, good use of the PC board’s ground plane can help considerably to dissipate heat. The
exposed pad on the bottom of the IC package can be soldered to a ground plane and that plane should extend
out from beneath the IC to help dissipate the heat. The exposed pad is internally connected to the IC substrate.
Additionally the use of thick copper traces, where possible, can help conduct heat away from the IC. Using
numerous vias to connect the die attach pad to an internal ground plane is a good practice. Judicious positioning
of the PC board within the end product, along with the use of any available air flow (forced or natural convection)
can help reduce the junction temperature.

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10 Device and Documentation Support

10.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.

10.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.

10.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
10.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

10.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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 PACKAGE OPTION ADDENDUM

www.ti.com 30-Sep-2021

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

LM3100MH NRND HTSSOP PWP 20 73 Non-RoHS Call TI Level-1-260C-UNLIM -40 to 125 LM3100
& Green MH
LM3100MH/NOPB ACTIVE HTSSOP PWP 20 73 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LM3100
MH
LM3100MHX/NOPB ACTIVE HTSSOP PWP 20 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LM3100
MH

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 30-Sep-2021

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 5-Jan-2022

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM3100MHX/NOPB HTSSOP PWP 20 2500 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 5-Jan-2022

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM3100MHX/NOPB HTSSOP PWP 20 2500 367.0 367.0 35.0

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 5-Jan-2022

TUBE

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
LM3100MH PWP HTSSOP 20 73 495 8 2514.6 4.06
LM3100MH PWP HTSSOP 20 73 495 8 2514.6 4.06
LM3100MH/NOPB PWP HTSSOP 20 73 495 8 2514.6 4.06

Pack Materials-Page 3
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