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The document discusses a course on FPGA programming. It covers topics like FPGA hardware structure, design flow, VHDL programming, LUTs, CLBs, concurrent and sequential statements in VHDL. It also provides examples of combinational and sequential circuits that can be implemented on FPGAs.

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0% found this document useful (0 votes)

26 views19 pages

2.slide Logika Kombinasional Sederhana

Uploaded by

Bintang Al Rasyid

We take content rights seriously. If you suspect this is your content, claim it here.

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FILKOM | UB

CCE61206

Pemrograman FPGA
FILKOM | UB

MATAKULIAH : Pemrograman FPGA

KODE/ STATUS : CCE61206
SKS :3
Dosen : Dahnial Syauqy, S.T, M.T, M.Sc
Email : dahnial87@ub.ac.id
Agenda kuliah

• Introduction + Overview
• FPGA design dengan Xilinx
• Rangkaian kombinasional sederhana
• Rangkaian Encoder, Decoder, Multiplexer
• Rangkaian sekensial: Flip flop dalam VHDL
• -----------------------------------UTS-------------------------------------
• Rangkaian Counter dan FSM
• Materi pengayaan (interfacing LCD, VGA, keyboard)
• Desain project dan presentasi
• -----------------------------------UAS-------------------------------------

Slide 3
28 September
2020
Design flow

Slide 4
28 September
2020
FPGA Hardware structure

Slide 5
28 September
2020
CLB & IOB
Configurable Logic Blocks (CLBs)
• Contain flexible Look-Up Tables (LUTs) that implement logic plus storage
elements used as flip-flops or latches.

Input/Output Blocks (IOBs)

• Control the flow of data between the I/O pins and the internal
logic of the device.
• Each IOB supports bidirectional data flow.

Slide 6
28 September
2020
LUT
2 input LUT

4 input LUT

Slide 7
28 September
2020
CLB Array
• The CLBs are arranged in a regular array of rows and columns.
• Each density varies by the number of rows and columns of CLBs

Slide 8
28 September
2020
FPGA Programming (VHDL)

Slide 9
28 September
2020
VHDL

HDL= Hardware Description Language

Programming language for modeling of (digital) hardware

VHDL=VHSIC HDL
VHSIC=Very High Speed Integrated Circuit

• Modeling of digital system

• Concurrent and sequential specification
• Man and machine readable documentation

Slide 10
28 September
2020
Program Structure

Slide 11
28 September
2020
Program Structure

Slide 12
28 September
2020
Entity Statement

Architecture Body Statement

Slide 13
28 September
2020
Configuration statement:
For entity with multiple architecture

Slide 14
28 September
2020
VHDL Concepts
Execution of assignments: Begin
• Concurrent: X <= A and B;
Y <= C or D;
• Active continuously end
• The order of statements is not important
• Hardware parallelism
• Sequential:
• Executed in order, one after another
• Can override the effects of previous statements

Slide 15
28 September
2020
Concept of concurrency

Slide 16
28 September
2020
Example

Slide 17
28 September
2020
Example

Slide 18
28 September
2020
Alamat Site simulator

Slide 19
28 September
2020

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2.slide Logika Kombinasional Sederhana

Uploaded by

2.slide Logika Kombinasional Sederhana

Uploaded by

FILKOM | UB

MATAKULIAH : Pemrograman FPGA

Input/Output Blocks (IOBs)

HDL= Hardware Description Language

• Modeling of digital system

Architecture Body Statement

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