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Module1: Introduction to Computer Architecture

Introduction to computer systems - Overview of Organization and Architecture -Functional

components of a computer -Registers and register files-Interconnection of components-
Organization of the von Neumann machine and Harvard architecture-Performance of processor
Introduction to ISA (Instruction Set Architecture)-Instruction formats- Instruction types and
addressing modes- Instruction execution (Phases of instruction cycle)- Assembly language
programming-Subroutine call and return mechanisms-Single cycle a Data path design-Introduction
to multi cycle data path-Multi cycle Instruction execution.

Computer System
A computer is a combination of hardware and software resources which integrate together and
provides various functionalities to the user. It is a collection of interconnected devices that can
input, output, process, and store data and information

Overview of Organization and Architecture

 Computer Architecture refers to those attributes of a system that have a direct impact on
the logical execution of a program. Examples:
o the instruction set
o the number of bits used to represent various data types
o I/O mechanisms
o memory addressing techniques
 Computer Organization refers to the operational units and their interconnections that
realize the architectural specifications. Examples are things that are transparent to the
programmer:
o control signals
o interfaces between computer and peripherals
o the memory technology being used
 So, for example, the fact that a multiply instruction is available is a computer architecture
issue. How that multiply is implemented is a computer organization issue.

Computer Architecture VS Computer Organization

Computer Architecture Computer Organization

Computer Architecture is concerned with the way Computer Organization is concerned with the
hardware components are connected together to structure and behaviour of a computer system
form a computer system. as seen by the user.

It acts as the interface between hardware and It deals with the components of a connection in
software. a system.

Computer Architecture helps us to understand the Computer Organization tells us how exactly all
functionalities of a system. the units in the system are arranged and
interconnected.

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A programmer can view architecture in terms of Whereas Organization expresses the
instructions, addressing modes and registers. realization of architecture.

While designing a computer system architecture is An organization is done on the basis of

considered first. architecture.

Computer Architecture deals with high-level Computer Organization deals with low-level
design issues. design issues.

Architecture involves Logic (Instruction sets, Organization involves Physical Components

Addressing modes, Data types, Cache (Circuit design, Adders, Signals, Peripherals)
optimization)

Details of Functional Components of a Digital Computer

 Input Unit :The input unit consists of input devices that are attached to the computer.
These devices take input and convert it into binary language that the computer
understands. Some of the common input devices are keyboard, mouse, joystick,
scanner etc.
 Central Processing Unit (CPU) : Once the information is entered into the computer
by the input device, the processor processes it. The CPU is called the brain of the
computer because it is the control center of the computer. It first fetches instructions
from memory and then interprets them so as to know what is to be done. If required,
data is fetched from memory or input device. Thereafter CPU executes or performs the
required computation and then either stores the output or displays on the output
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device. The CPU has three main components which are responsible for different
functions – Arithmetic Logic Unit (ALU), Control Unit (CU) and Memory registers
 Arithmetic and Logic Unit (ALU) : The ALU, as its name suggests performs
mathematical calculations and takes logical decisions. Arithmetic calculations include
addition, subtraction, multiplication and division. Logical decisions involve
comparison of two data items to see which one is larger or smaller or equal.
 Control Unit : The Control unit coordinates and controls the data flow in and out of
CPU and also controls all the operations of ALU, memory registers and also
input/output units. It is also responsible for carrying out all the instructions stored in
the program. It decodes the fetched instruction, interprets it and sends control signals
to input/output devices until the required operation is done properly by ALU and
memory.
 Memory Registers : A register is a temporary unit of memory in the CPU. These are
used to store the data which is directly used by the processor. Registers can be of
different sizes(16 bit, 32 bit, 64 bit and so on) and each register inside the CPU has a
specific function like storing data, storing an instruction, storing address of a location
in memory etc. The user registers can be used by an assembly language programmer
for storing operands, intermediate results etc. Accumulator (ACC) is the main register
in the ALU and contains one of the operands of an operation to be performed in the
ALU.
 Memory : Memory attached to the CPU is used for storage of data and instructions
and is called internal memory The internal memory is divided into many storage
locations, each of which can store data or instructions. Each memory location is of the
same size and has an address. With the help of the address, the computer can read any
memory location easily without having to search the entire memory. when a program
is executed, it’s data is copied to the internal memory and is stored in the memory till
the end of the execution. The internal memory is also called the Primary memory or
Main memory. This memory is also called as RAM, i.e. Random Access Memory. The
time of access of data is independent of its location in memory, therefore this memory
is also called Random Access memory (RAM). Read this for different types of RAMs
 Output Unit : The output unit consists of output devices that are attached with the
computer. It converts the binary data coming from CPU to human understandable
form. The common output devices are monitor, printer, plotter etc.

Structure and Function

• Structure is the way in which components relate to each other
• Function is the operation of individual components as part of the structure
• All computer functions are:
o Data processing: Computer must be able to process data which may take a wide
variety of forms and the range of processing.
o Data storage: Computer stores data either temporarily or permanently.
o Data movement: Computer must be able to move data between itself and the
outside world.
o Control: There must be a control of the above three functions.

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Fig: Functional view of a computer

Fig: Data movement operation Fig: Storage Operation

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Fig: Processing from / to storage Fig: Processing from storage to i/o

• Four main structural components:

o Central processing unit (CPU)
o Main memory
o I/O
o System interconnections
• CPU structural components:
o Control unit
o Arithmetic and logic unit (ALU)
o Registers
o CPU interconnections

Peripherals Computer
Central
Main
Processing
Memory
Unit
Systems
Computer
Interconnection

Input

Communication lines Output

Fig: Computer: Top level structure

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CPU
Arithmetic
Computer
Registers and
I/O

System
CPU Login Unit
Bus Internal CPU
Memory
Interconnection

Control

Unit

Fig: The central processing unit

Control Unit

CPU
Sequencing
ALU

Internal Control Login

Bus Control Unit
Unit
Registers Registers and

Decoders

Control

Fig: The control unit Memory

Designing for performance

Some of the driving factors behind the need to design for performance:
• Microprocessor Speed
 Pipelining
 On board cache, on board L1 & L2 cache
 Branch prediction: The processor looks ahead in the instruction code fetched from
memory and predicts which branches, or group of instructions are likely to be
processed next.
 Data flow analysis: The processor analyzes which instructions are dependent on
each other’s results, or data, to create an optimized schedule of instructions to
prevent delay.
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 Speculative execution: Using branch prediction and data flow analysis, some
processors speculatively execute instructions ahead of their actual appearance in
the program execution, holding the results in temporary locations.
• Performance Mismatch
 Processor speed increased
 Memory capacity increased
 Memory speed lags behind processor speed

Below figure depicts the history; while processor speed and memory capacity have grown
rapidly, the speed with which data can be transferred between main memory and the processor
has lagged badly.

Fig: Evolution of DRAM and processor Characteristics

The effects of these trends are shown vividly in figure below. The amount of main memory
needed is going up, but DRAM density is going up faster (number of DRAM per system is going
down).

Fig: Trends in DRAM use

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Solutions
 Increase number of bits retrieved at one time
o Make DRAM “wider” rather than “deeper” to use wide bus data paths.
 Change DRAM interface
o Cache
 Reduce frequency of memory access
o More complex cache and cache on chip
 Increase interconnection bandwidth
o High speed buses
o Hierarchy of buses

Computer Components
• The Control Unit (CU) and the Arithmetic and Logic Unit (ALU) constitute the Central
Processing Unit (CPU)
• Data and instructions need to get into the system and results need to get out
o Input/output (I/O module)
• Temporary storage of code and results is needed
o Main memory (RAM)
• Program Concept
o Hardwired systems are inflexible
o General purpose hardware can do different tasks, given correct control signals
o Instead of re-wiring, supply a new set of control signals

Fig: Hardware and Software Approaches

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Fig: Computer Components; Top-Level

View
Interrupts:
• Mechanism by which other modules (e.g. I/O) may interrupt normal sequence of
processing
• Program
o e.g. overflow, division by zero
• Timer
o Generated by internal processor timer
o Used in pre-emptive multi-tasking
• I/O
o from I/O controller
• Hardware failure
o e.g. memory parity error

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Figure: Program flow of control without and with interrupts

• Instruction Cycle
o Added to instruction cycle
o Processor checks for interrupt
 Indicated by an interrupt signal
o If no interrupt, fetch next instruction
o If interrupt pending:
 Suspend execution of current program
 Save context
 Set PC to start address of interrupt handler routine
 Process interrupt
 Restore context and continue interrupted program

Fig: Transfer of control via interrupts

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Fig: Instruction Cycle with Interrupts

Fig: Instruction cycle state diagram, with interrupts

• Multiple Interrupts
o Disable interrupts (approach #1)
 Processor will ignore further interrupts whilst processing one interrupt
 Interrupts remain pending and are checked after first interrupt has been
processed
 Interrupts handled in sequence as they occur
o Define priorities (approach #2)
 Low priority interrupts can be interrupted by higher priority interrupts
 When higher priority interrupt has been processed, processor returns to
previous interrupt

Register is a very fast computer memory, used to store data/instruction in-execution.

A Register is a group of flip-flops with each flip-flop capable of storing one bit of information.
An n-bit register has a group of n flip-flops and is capable of storing binary information of n-bits.
If you are not familiar with logic gates concepts, you can learn it from here.

A register consists of a group of flip-flops and gates. The flip-flops hold the binary information and
gates control when and how new information is transferred into a register. Various types of
registers are available commercially. The simplest register is one that consists of only flip-flops
with no external gates.
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These days registers are also implemented as a register file.

Loading the Registers

The transfer of new information into a register is referred to as loading the register. If all the bits of
register are loaded simultaneously with a common clock pulse than the loading is said to be done in
parallel.

Register Transfer Language

The symbolic notation used to describe the micro-operation transfers amongst registers is
called Register transfer language.

The term register transfer means the availability of hardware logic circuits that can perform a
stated micro-operation and transfer the result of the operation to the same or another register.

The word language is borrowed from programmers who apply this term to programming
languages. This programming language is a procedure for writing symbols to specify a given
computational process.

Following are some commonly used registers:

1. Accumulator: This is the most common register, used to store data taken out from the
memory.

2. General Purpose Registers: This is used to store data intermediate results during program
execution. It can be accessed via assembly programming.

3. Special Purpose Registers: Users do not access these registers. These registers are for
Computer system,

o MAR: Memory Address Register are those registers that holds the address for
memory unit.

o MBR: Memory Buffer Register stores instruction and data received from the
memory and sent from the memory.

o PC: Program Counter points to the next instruction to be executed.

o IR: Instruction Register holds the instruction to be executed.

Here P is a control signal generated in the control section.

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Control Function

A control function is a Boolean variable that is equal to 1 or 0. The control function is shown as:

P: R2 ← R1

The control condition is terminated with a colon. It shows that transfer operation can be executed
only if P=1.

Micro-Operations

The operations executed on data stored in registers are called micro-operations. A micro-operation
is an elementary operation performed on the information stored in one or more registers.

Example: Shift, count, clear and load.

Types of Micro-Operations

The micro-operations in digital computers are of 4 types:

1. Register transfer micro-operations transfer binary information from one register to another.

2. Arithmetic micro-operations perform arithmetic operations on numeric data stored in

registers.

3. Logic micro-operations perform bit manipulation operation on non-numeric data stored in

registers.

4. Shift micro-operations perform shift micro-operations performed on data.

Arithmetic Micro-Operations

Some of the basic micro-operations are addition, subtraction, increment and decrement.

Add Micro-Operation
It is defined by the following statement:

R3 → R1 + R2

The above statement instructs the data or contents of register R1 to be added to data or content of
register R2 and the sum should be transferred to register R3.

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Subtract Micro-Operation
Let us again take an example:

R3 → R1 + R2' + 1

In subtract micro-operation, instead of using minus operator we take 1's compliment and add 1 to
the register which gets subtracted, i.e R1 - R2 is equivalent to R3 → R1 + R2' + 1

Increment/Decrement Micro-Operation
Increment and decrement micro-operations are generally performed by adding and subtracting 1 to
and from the register respectively.

R1 → R1 + 1

R1 → R1 – 1

Symbolic Designation Description

R3 ← R1 + R2 Contents of R1+R2 transferred to R3.
R3 ← R1 - R2 Contents of R1-R2 transferred to R3.
R2 ← (R2)' Compliment the contents of R2.
R2 ← (R2)' + 1 2's compliment the contents of R2.
R3 ← R1 + (R2)' + 1 R1 + the 2's compliment of R2 (subtraction).
R1 ← R1 + 1 Increment the contents of R1 by 1.
R1 ← R1 - 1 Decrement the contents of R1 by 1.
Logic Micro-Operations
These are binary micro-operations performed on the bits stored in the registers. These operations
consider each bit separately and treat them as binary variables.

Let us consider the X-OR micro-operation with the contents of two registers R1 and R2.

P: R1 ← R1 X-OR R2

In the above statement we have also included a Control Function.

Assume that each register has 3 bits. Let the content of R1 be 010 and R2 be 100. The X-OR micro-
operation will be:

Shift Micro-Operations
These are used for serial transfer of data. That means we can shift the contents of the register to the
left or right. In the shift left operation the serial input transfers a bit to the right most position and
in shift right operation the serial input transfers a bit to the left most position.
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There are three types of shifts as follows:

a) Logical Shift

It transfers 0 through the serial input. The symbol "shl" is used for logical shift left and "shr" is
used for logical shift right.

R1 ← she R1

R1 ← she R1

The register symbol must be same on both sides of arrows.

b) Circular Shift

This circulates or rotates the bits of register around the two ends without any loss of data or
contents. In this, the serial output of the shift register is connected to its serial
input. "cil" and "cir" is used for circular shift left and right respectively.

c) Arithmetic Shift

This shifts a signed binary number to left or right. An arithmetic shift left multiplies a signed
binary number by 2 and shift left divides the number by 2. Arithmetic shift micro-operation leaves
the sign bit unchanged because the signed number remains same when it is multiplied or divided by
2.

Arithmetic Logical Unit

Instead of having individual registers performing the micro-operations, computer system provides a
number of registers connected to a common unit called as Arithmetic Logical Unit (ALU). ALU is
the main and one of the most important unit inisde CPU of computer. All the logical and
mathematical operations of computer are performed here. The contents of specific register is placed
in the in the input of ALU. ALU performs the given operation and then transfer it to the destination
register.

Register Transfer

Information transferred from one register to another is designated in symbolic form by means of
replacement operator.

R2 ← R1

It denotes the transfer of the data from register R1 into R2.

Normally we want the transfer to occur only in predetermined control condition. This can be shown
by following if-then statement: if (P=1) then (R2 ← R1)
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Interconnection structures
The collection of paths connecting the various modules is called the interconnecting structure.
• All the units must be connected
• Different type of connection for different type of unit
o Memory
o Input/Output
o CPU

Memory Connection
o Receives and sends data
o Receives addresses (of locations)
o Receives control signals
 Read
 Write
 Timing

Fig: Memory Module

• I/O Connection
o Similar to memory from computer’s viewpoint
o Output
 Receive data from computer
 Send data to peripheral
o Input
 Receive data from peripheral
 Send data to computer
o Receive control signals from computer
o Send control signals to peripherals
 e.g. spin disk
o Receive addresses from computer
 e.g. port number to identify peripheral
o Send interrupt signals (control)

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Fig: I/O Module

The architecture of the microcomputers are of many types and the two of them are Von Neumann
and Harvard Architecture. The Von Neumann is the computer machine design used in old times.
Many simple computers still use the Von Neumann design to manufacture the computers which are
used for simplicity or to train others. The Older version of the program was very bulky and in case
of any bug, the whole system has to be rewired and has to go through the design again. This was
very time-consuming and expensive.
The Von Neumann Architecture is a computer that can not process the stored data and the
instruction at the same time. The reason behind this disadvantage was that the stored data and
instruction both have the same path of entering. This also slows down the speed of the computer is
architecture was referred to many bottlenecks.
The Von Neumann is simple as compared to the Harvard Architecture and has only one pathway to
fetch the information and instruction within the computer. An example of the Von Neumann
Architecture is a desk calculator which is used to do basic mathematics.

The Harvard architecture is the computer that requires two separate RAM and ROM processors. As the
RAM and ROM were separate the need for the hardware also increase in these types of architecture. The
programs are already installed in these systems and hence when there are taking input from the users. They
can access the instructions and input them at the same time. this hampers the speed of the system.

The Harvard Architecture CPU has been developed much time in the last few years. The usage of the main
memory needs to be monitored as it affects the performance of the computer. The higher the main memory
used the higher is the speed of the system. The memory can be accessed faster yet it can be useful for a small
amount only because of the signal routing. The Harvard architecture also stores the frequently used data in
cache.

The architecture has the advantage of storing cache and is also power friendly. The applications of this
architecture us that it is used in Digital Signal Processors. They are used to detect sound waves in audio and
video. The Harvard Architecture is also helpful in microcontrollers to process the data. The microcontroller
has the data memory and the flash memory.

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Comparison Table Between Vin Neumann and Harvard Architecture

Parameters of
Von Neumann Harvard Architecture
Comparison

The Von Neumann is the design of The Harvard Architecture is the modern-day
Definition the computers which is simple and design that comes with separate RAM and
uses a single memory connection. ROM.

The design is simple and uses the The design is complex as compared to the Von
Design same path to take instructions and Neumann as it has separate RAM and ROM
store data. connections.

The hardware requirement is less as Hardware is required more in Harvard

Hardware
compared to Harvard Architecture. Architecture as compared to Von Neumann.

The speed of the processors is less as The Harvard has more speed.
Speed compared to the Harvard More space is required by the computer
Architecture. designed on Harvard Architecture.

The physical space is required less

by the Von Neumann computers as The physical space is required more in Harvard
Physical space
compared to the Harvard Arhitecture.
Architecture computers.

The Internal Memory is not wasted The Internal Memory of Harvard is wasted
Internal
as the memory and programs share somewhere as the instruction memory and data
memory
the same space. memory can not use the same space.

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The Running instructions can either
The running instructions are complex and a bit
Running be taken from the program stored or
slow as the input and the program instructions
Instructions instructions given. Thus, both can
stored in the program are taken simultaneously.
not be taken together.

• CPU Connection
o Reads instruction and data
o Writes out data (after processing)
o Sends control signals to other units
o Receives (& acts on) interrupts

Fig: CPU Module

Bus interconnection
• A bus is a communication pathway connecting two or more devices
• Usually broadcast (all components see signal)
• Often grouped
o A number of channels in one bus
o e.g. 32 bit data bus is 32 separate single bit channels
• Power lines may not be shown
• There are a number of possible interconnection systems
• Single and multiple BUS structures are most common
• e.g. Control/Address/Data bus (PC)
• e.g. Unibus (DEC-PDP)
• Lots of devices on one bus leads to:
o Propagation delays
o Long data paths mean that co-ordination of bus use can adversely affect
performance
o If aggregate data transfer approaches bus capacity
• Most systems use multiple buses to overcome these problems

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Fig: Bus Interconnection Scheme
• Data Bus
o Carries data
 Remember that there is no difference between “data” and “instruction” at
this level
o Width is a key determinant of performance
 8, 16, 32, 64 bit
• Address Bus
o Identify the source or destination of data
o e.g. CPU needs to read an instruction (data) from a given location in memory
o Bus width determines maximum memory capacity of system
 e.g. 8080 has 16 bit address bus giving 64k address space
• Control Bus
o Control and timing information
 Memory read
 Memory write
 I/O read
 I/O write
 Transfer ACK
 Bus request
 Bus grant
 Interrupt request
 Interrupt ACK
 Clock
 Reset

Instruction Set Architecture (ISA)

An Instruction Set Architecture (ISA) is part of the abstract model of a computer that defines how
the CPU is controlled by the software. The ISA acts as an interface between the hardware and the
software, specifying both what the processor is capable of doing as well as how it gets done.

The ISA provides the only way through which a user is able to interact with the hardware. It can be
viewed as a programmer’s manual because it’s the portion of the machine that’s visible to the
assembly language programmer, the compiler writer, and the application programmer.

The ISA defines the supported data types, the registers, how the hardware manages main memory,
key features (such as virtual memory), which instructions a microprocessor can execute, and the
input/output model of multiple ISA implementations. The ISA can be extended by adding
instructions or other capabilities, or by adding support for larger addresses and data values.
The Instruction Set Architecture (ISA) defines the way in which a microprocessor is programmed at the
machine level

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ISAs differ based on the internal storage in a processor. Accordingly, the ISA can be
classified as follows, based on where the operands are stored and whether they are
named explicitly or implicitly, such as:

Operand Storage in the CPU

Where are the operands kept other than in memory?
Number of explicit named operands
How many operands are named in a typical instruction.
Operand location
Can any ALU instruction operand be located in memory? Or must all operands be
kept internaly in the CPU?
Operations
What operations are provided in the ISA.
Type and size of operands
What is the type and size of each operand and how is it specified?

The 3 most common types of ISAs are:

1. Stack - The operands are implicitly on top of the stack.

2. Accumulator - One operand is implicitly the accumulator.
3. General Purpose Register (GPR) - All operands are explicitely mentioned, they
are either registers or memory locations.

Lets look at the assembly code of

C = A + B;

in all 3 architectures:

Stack Accumulator GPR

PUSH A LOAD A LOAD R1,A
PUSH B ADD B ADD R1,B
ADD STORE C STORE R1,C
POP C - -

Not all processors can be neatly tagged into one of the above catagories. The i8086 has
many instructions that use implicit operands although it has a general register set. The
i8051 is another example, it has 4 banks of GPRs but most instructions must have the A
register as one of its operands.

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What are the advantages and disadvantages of each of these approachs?

Stack

Advantages: Simple Model of expression evaluation (reverse polish). Short instructions.

Disadvantages: A stack can't be randomly accessed This makes it hard to generate eficient code.
The stack itself is accessed every operation and becomes a bottleneck.

Accumulator

Advantages: Short instructions.

Disadvantages: The accumulator is only temporary storage so memory traffic is the highest for this
approach.

GPR

Advantages: Makes code generation easy. Data can be stored for long periods in registers.
Disadvantages: All operands must be named leading to longer instructions.

The different features that need to be considered when designing the instruction set
architecture. They are:

 Types of instructions (Operations in the Instruction set)

 Types and sizes of operands
 Addressing Modes
 Addressing Memory
 Encoding and Instruction Formats
 Compiler related issues

First of all, you have to decide on the types of instructions, i.e. what are the various
instructions that you want to support in the ISA. The tasks carried out by a computer
program consist of a sequence of small steps, such as multiplying two numbers, moving
a data from a register to a memory location, testing for a particular condition like zero,
reading a character from the input device or sending a character to be displayed to the
output device, etc.. A computer must have the following types of instructions:

 Data transfer instructions

 Data manipulation instructions
 Program sequencing and control instructions
 Input and output instructions

Data transfer instructions perform data transfer between the various storage places
in the computer system, viz. registers, memory and I/O. Since, both the instructions as
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well as data are stored in memory, the processor needs to read the instructions and data
from memory. After processing, the results must be stored in memory. Therefore, two
basic operations involving the memory are needed, namely, Load (or Read or Fetch)
and Store (or Write). The Load operation transfers a copy of the data from the memory
to the processor and the Store operation moves the data from the processor to memory.
Other data transfer instructions are needed to transfer data from one register to another
or from/to I/O devices and the processor.

Data manipulation instructions perform operations on data and indicate the

computational capabilities for the processor. These operations can be arithmetic
operations, logical operations or shift operations. Arithmetic operations include addition
(with and without carry), subtraction (with and without borrow), multiplication,
division, increment, decrement and finding the complement of a number. The logical
and bit manipulation instructions include AND, OR, XOR, Clear carry, set carry, etc.
Similarly, you can perform different types of shift and rotate operations.

Program sequencing and control instructions that help you change the flow of the
program. This is best explained with an example. Consider the task of adding a list
of n numbers. A possible sequence is given below.

Move DATA1, R0
Add DATA2, R0
Add DATA3, R0
Add DATAn, R0
Move R0, SUM

The addresses of the memory locations containing the n numbers are symbolically
given as DATA1, DATA2, . . , DATAn, and a separate Add instruction is used to add
each Databer to the contents of register R0. After all the numbers have been added, the
result is placed in memory location SUM. Instead of using a long list of Add
instructions, it is possible to place a single Add instruction in a program loop, as shown
below:

Move N, R1
Clear R0
LOOP Determine address of “Next” number and add “Next” number to R0
Decrement R1
Branch > 0, LOOP
Move R0, SUM

The loop is a straight-line sequence of instructions executed as many times as needed.

It starts at location LOOP and ends at the instruction Branch>0. During each pass
through this loop, the address of the next list entry is determined, and that entry is
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fetched and added to R0. The address of an operand can be specified in various ways, as
will be described in the next section. For now, you need to know how to create and
control a program loop. Assume that the number of entries in the list, n, is stored in
memory location N. Register R1 is used as a counter to determine the number of times
the loop is executed. Hence, the contents of location N are loaded into register R1 at the
beginning of the program. Then, within the body of the loop, the instruction, Decrement
R1 reduces the contents of R1 by 1 each time through the loop. The execution of the
loop is repeated as long as the result of the decrement operation is greater than zero.

You should now be able to understand branch instructions. This type of instruction
loads a new value into the program counter. As a result, the processor fetches and
executes the instruction at this new address, called the branch target, instead of the
instruction at the location that follows the branch instruction in sequential address order.
The branch instruction can be conditional or unconditional. An unconditional
branch instruction does a branch to the specified address irrespective of any condition.
A conditional branch instruction causes a branch only if a specified condition is
satisfied. If the condition is not satisfied, the PC is incremented in the normal way, and
the next instruction in sequential address order is fetched and executed. In the example
above, the instruction Branch>0 LOOP (branch if greater than 0) is a conditional branch
instruction that causes a branch to location LOOP if the result of the immediately
preceding instruction, which is the decremented value in register R1, is greater than
zero. This means that the loop is repeated as long as there are entries in the list that are
yet to be added to R0. At the end of the nth pass through the loop, the Decrement
instruction produces a value of zero, and, hence, branching does not occur. Instead, the
Move instruction is fetched and executed. It moves the final result from R0 into memory
location SUM. Some ISAs refer to such instructions as Jumps. The processor keeps
track of information about the results of various operations for use by subsequent
conditional branch instructions. This is accomplished by recording the required
information in individual bits, often called condition code flags. These flags are usually
grouped together in a special processor register called the condition code
register or status register.

Input and Output instructions are used for transferring information between the
registers, memory and the input / output devices. It is possible to use special instructions
that exclusively perform I/O transfers, or use memory – related instructions itself to do
I/O transfers.

Suppose you are designing an embedded processor which is meant to be performing a

particular application, then definitely you will have to bring instructions which are
specific to that particular application. When you’re designing a general-purpose
processor, you only look at including all general types of instructions. Examples of
specialized instructions may be media and signal processing related instructions, say
vector type of instructions which try to exploit the data level parallelism, where the
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same operation of addition or subtraction is going to be done on different data and then
you may have to look at saturating arithmetic operations, multiply and accumulator
instructions.

Instruction Formats

The previous sections have shown you that the processor can execute different types of
instructions and there are different ways of specifying the operands. Once all this is
decided, this information has to be presented to the processor in the form of an
instruction format. The number of bits in the instruction is divided into groups called
fields. based on the number of operands that are supported and the size of the various
fields, the length of the instructions will vary. Some processors fit all the instructions
into a single sized format, whereas others make use of formats of varying sizes.
Accordingly, you have a fixed format or a variable format.

An instruction is normally made up of a combination of an operation code and some

way of specifying an operand, most commonly by its location or address in memory
though non memory reference instructions can exist. Some operation codes deal with
more than one operand; the locations of these operands may be specified using any of
the many addressing schemes.

This instruction format includes four fields, such as opcode field, addressing mode field,
displacement field, and immediate field.

The opcode field has 1 or 2 bytes. The addressing mode field also includes 1 or 2 bytes. In the
addressing mode field, an instruction needs only one byte if it uses only one register to generate
the effective address of an operand.
The field that directly follows the addressing mode field is the displacement field. If an effective
address for a memory operand is computed using the displacement value, then it uses either one or
four bytes to encode. If an operand is an immediate value, then it is located in the immediate field
and it appears either one or four bytes.
Based on the number of address, instructions are classified as:
Note that we will use X = (A+B)*(C+D) expression to showcase the procedure.
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1. Zero Address Instructions –

A stack-based computer does not use the address field in the instruction. To evaluate an
expression first it is converted to reverse Polish Notation i.e. Postfix Notation.
Expression: X = (A+B)*(C+D)
Postfixed : X = AB+CD+*
TOP means top of stack
M[X] is any memory location

PUSH A TOP = A

PUSH B TOP = B

ADD TOP = A+B

PUSH C TOP = C

PUSH D TOP = D

ADD TOP = C+D

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MUL TOP = (C+D)*(A+B)

POP X M[X] = TOP

2 . One Address Instructions –

This uses an implied ACCUMULATOR register for data manipulation. One operand is in
the accumulator and the other is in the register or memory location. Implied means that
the CPU already knows that one operand is in the accumulator so there is no need to
specify
it.

Expression: X = (A+B)*(C+D)
AC is accumulator
M[] is any memory location
M[T] is temporary location

LOAD A AC = M[A]

ADD B AC = AC + M[B]

STORE T M[T] = AC

LOAD C AC = M[C]

ADD D AC = AC + M[D]

MUL T AC = AC * M[T]

STORE X M[X] = AC

3.Two Address Instructions –

This is common in commercial computers. Here two addresses can be specified in the
instruction. Unlike earlier in one address instruction, the result was stored in the
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accumulator, here the result can be stored at different locations rather than just
accumulators, but require more number of bit to represent address.

Here destination address can also contain operand.

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

MOV R1, A R1 = M[A]

ADD R1, B R1 = R1 + M[B]

MOV R2, C R2 = C

ADD R2, D R2 = R2 + D

MUL R1, R2 R1 = R1 * R2

MOV X, R1 M[X] = R1

4.Three Address Instructions –

This has three address field to specify a register or a memory location. Program created
are much short in size but number of bits per instruction increase. These instructions make
creation of program much easier but it does not mean that program will run much faster
because now instruction only contain more information but each micro operation
(changing content of register, loading address in address bus etc.) will be performed in
one cycle only.

Expression: X = (A+B)*(C+D)
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R1, R2 are registers
M[] is any memory location

ADD R1, A, B R1 = M[A] + M[B]

ADD R2, C, D R2 = M[C] + M[D]

MUL X, R1, R2 M[X] = R1 * R2

Addressing Modes– The term addressing modes refers to the way in which the operand
of an instruction is specified. The addressing mode specifies a rule for interpreting or
modifying the address field of the instruction before the operand is actually executed.

Addressing modes used by 8086 microprocessor are discussed below:

 Implied mode:: In implied addressing the operand is specified in the
instruction itself. In this mode the data is 8 bits or 16 bits long and data is the
part of instruction.Zero address instruction are designed with implied
addressing mode.

Example: CLC (used to reset Carry flag to 0)

 Immediate addressing mode (symbol #):In this mode data is present in
address field of instruction .Designed like one address instruction format.
Note:Limitation in the immediate mode is that the range of constants are
restricted by size of address field.

Example: MOV AL, 35H (move the data 35H into AL register)
 Register mode: In register addressing the operand is placed in one of 8 bit or
16 bit general purpose registers. The data is in the register that is specified by
the instruction.

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Here one register reference is required to access the data.

Example: MOV AX,CX (move the contents of CX register to AX register)

 Register Indirect mode: In this addressing the operand’s offset is placed in any
one of the registers BX,BP,SI,DI as specified in the instruction. The effective
address of the data is in the base register or an index register that is specified by
the instruction.
Here two register reference is required to access the data.

The 8086 CPUs let you access memory indirectly through a register using the
register indirect addressing modes.
MOV AX, [BX](move the contents of memory location s
addressed by the register BX to the register AX)
 Auto Indexed (increment mode): Effective address of the operand is the
contents of a register specified in the instruction. After accessing the operand,
the contents of this register are automatically incremented to point to the next
consecutive memory location.(R1)+.
Here one register reference,one memory reference and one ALU operation is
required to access the data.
Example:
Add R1, (R2)+ // OR
 R1 = R1 +M[R2]
R2 = R2 + d
Useful for stepping through arrays in a loop. R2 – start of array d – size of an
element
 Auto indexed ( decrement mode): Effective address of the operand is the
contents of a register specified in the instruction. Before accessing the operand,
the contents of this register are automatically decremented to point to the
previous consecutive memory location. –(R1)
Here one register reference,one memory reference and one ALU operation is
required to access the data.
Example:
Add R1,-(R2) //OR
R2 = R2-d
R1 = R1 + M[R2]
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Auto decrement mode is same as auto increment mode. Both can also be used to
implement a stack as push and pop . Auto increment and Auto decrement modes
are useful for implementing “Last-In-First-Out” data structures.
 Direct addressing/ Absolute addressing Mode (symbol [ ]): The operand’s
offset is given in the instruction as an 8 bit or 16 bit displacement element. In
this addressing mode the 16 bit effective address of the data is the part of the
instruction.
Here only one memory reference operation is required to access the data.

Example:ADD AL,[0301] //add the contents of offset address 0301 to AL

 Indirect addressing Mode (symbol @ or () ):In this mode address field of
instruction contains the address of effective address.Here two references are
required.
1st reference to get effective address.
2nd reference to access the data.
Based on the availability of Effective address, Indirect mode is of two kind:
1. Register Indirect:In this mode effective address is in the register, and
corresponding register name will be maintained in the address field of
an instruction.
Here one register reference,one memory reference is required to
access the data.
2. Memory Indirect:In this mode effective address is in the memory, and
corresponding memory address will be maintained in the address field
of an instruction.
Here two memory reference is required to access the data.
Advantages of Addressing Modes
1.To give programmers to facilities such as Pointers, counters for loop
controls, indexing of data and program relocation.
2.To reduce the number bits in the addressing field of the Instruction.

Instruction execution
The basic function performed by a computer is execution of a program, which consists of a set of
instructions stored in memory.
• Two steps of Instructions Cycle:
o Fetch
o Execute

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Fig: Basic Instruction Cycle

• Fetch Cycle
o Program Counter (PC) holds address of next instruction to fetch
o Processor fetches instruction from memory location pointed to by PC
o Increment PC
 Unless told otherwise
o Instruction loaded into Instruction Register (IR)

• Execute Cycle
o Processor interprets instruction and performs required actions, such as:
 Processor - memory
o data transfer between CPU and main memory
 Processor - I/O
o Data transfer between CPU and I/O module
 Data processing
o Some arithmetic or logical operation on data
 Control
o Alteration of sequence of operations
o e.g. jump
 Combination of above

Example of program execution.

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Fig: Example of program execution (consists of memory and registers in hexadecimal)

• The PC contains 300, the address of the first instruction. The instruction (the value 1940
in hex) is loaded into IR and PC is incremented. This process involves the use of MAR
and MBR.
• The first hexadecimal digit in IR indicates that the AC is to be loaded. The remaining
three hexadecimal digits specify the address (940) from which data are to be loaded.
• The next instruction (5941) is fetched from location 301 and PC is incremented.

• The old contents of AC and the contents of location 941 are added and the result is stored
in the AC.
• The next instruction (2941) is fetched from location 302 and the PC is incremented.
• The contents of the AC are stored in location 941.

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Fig: Instruction cycle state diagram

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