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8.memory Reference Instructions

The document discusses memory reference instructions in a computer. It describes 7 memory reference instructions - AND, ADD, LDA, STA, BUN, BSA, and ISZ. It explains what each instruction does by describing the microoperations executed and how they manipulate the memory, accumulator, program counter, and other registers. The instructions perform logical, arithmetic, and control operations on memory and allow for branching, subroutines, and incrementing memory values.

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155 views12 pages

8.memory Reference Instructions

The document discusses memory reference instructions in a computer. It describes 7 memory reference instructions - AND, ADD, LDA, STA, BUN, BSA, and ISZ. It explains what each instruction does by describing the microoperations executed and how they manipulate the memory, accumulator, program counter, and other registers. The instructions perform logical, arithmetic, and control operations on memory and allow for branching, subroutines, and incrementing memory values.

Uploaded by

ahul34408
Copyright
© © All Rights Reserved
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Memory

Reference
Instructions

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Welcome To
Computer Science Hub
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Basic Computer Organization and Design

Memory Reference
Instructions

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Memory Reference Instructions
➢Memory reference instructions performs operations with memory
operand 15I 14Opcode12 11 Address 0
Opcode =000 through 110

➢Execution of memory reference instructions starts with timing


signal T4
➢There are 7 Memory reference instructions
Operation
Symbol Symbolic Description
Decoder

AND D0 AC  AC  M[AR]
ADD D1 AC  AC + M[AR], E  Cout
LDA D2 AC  M[AR]
STA D3 M[AR]  AC
BUN D4 PC  AR
BSA D5 M[AR]  PC, PC  AR + 1
ISZ D6 M[AR]  M[AR] + 1, if M[AR] + 1 = 0 then PC  PC+1

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AND to AC

➢Performs AND logic operation on pairs of bits in AC and the


memory word specified by effective address.
➢The result of operation is transferred to AC
➢Microoperations that execute this instructions are
D0T4: DR ←M[AR]
D0T5: AC← AC ˄ DR,SC← 0

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Add to AC

➢Adds the content of the memory word specified by the effective


address to the value of AC
➢Sum is transferred to AC and output carry Cout is transferred into
E(Extended accumulator flipflop)
D1T4:DR← M[AR]
D1T5: AC ←AC+DR,E← Cout,SC← 0

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LDA :Load to AC

➢Instruction transfers the memory word specified by the effective


address to AC
D2T4: DR←M[AR]
D2T5: AC←DR,SC←0

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STA : Store AC

➢Stores the content of AC into the memory word specified by the


effective address
➢D3T4::M[AR]←AC,SC←0
BUN: Branch Unconditionally
➢ Transfers the program to the instruction specified by the
effective address
➢ D3T4:PC←AR,SC←0

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BSA: Branch and save return address
➢Used for branching a portion of
program called subroutine or procedure.
Memory, PC, AR at time T4 Memory, PC after execution
➢It stores next instruction in sequence 20 0 BSA 135 20 0 BSA 135

in to memory location specified by Return address: PC = 21 Next instruction 21 Next instruction

effective address.
➢Effective address plus one is AR = 135 135 21
136 Subroutine Subroutine
transferred to PC serve as address of PC = 136

first instruction in the subroutine


D5T4:M[AR]← PC,AR ←AR+1 1 BUN 135 1 BUN 135
Memory Memory

D5T5:PC← AR,SC← 0

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ISZ: Increment and Skip if Zero

➢Increment the word specified by the effective address and if the


incremented value is zero PC is incremented by 1 in order to skip
the next instruction in the program.
D6T4:DR← M[AR]
D6T5:DR← DR+1
D6T6:M[AR] ←DR, if(DR=0) then (PC← PC+1),SC← 0

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