THEME ARTICLE: MICROPROCESSOR AT 50

From Mainframes to Microprocessors

G. Glenn Henry , Carmel, CA, 93923, USA

BEGINNINGS assembly language for 7044. After a year and a half,

B
eing a 16-year-old kid going to UC Berkeley now with a strong career interest, I returned to school
right before the 1960s was not conducive to at the local state college. I completed a B.S. degree in
academic success. That was my situation: a year and an M.S. degree in another year (mathemat-
Having graduated from high school early with no ics major). During my graduate year, I had a research
strong academic motivation, being immature, and grant from UCLA to write a software management sys-
with the distractions of Cal, I dropped out after one tem for our school’s IBM 1620 while also working a
year of classes and two more years of goofing off. In part-time job for a paper manufacturer trying to use
retrospect, this disaster (my parent’s words) led to a computers to solve a problem with “exploding” milk
57-year (and still counting) successful career in the cartons. The school gave me the key to the computer
computer industry where I participated in and contrib- room so I could work at night, and I programmed for
uted to the evolution from a few large computers to hours every day in 1620 assembly language (which I
billions of personal computing devices. also taught at the school).
As we celebrate the 50th anniversary of the first
microprocessor, I would like to share my perspective
from a career that spans the entire timeframe, starting
SO, IN EARLY 1964 AT SHELL, I FINALLY
before microprocessors existed. In this article, I will
HAD THE OPPORTUNITY THAT
briefly mention how I got started in computing and my
21 years at IBM, ending as an IBM Fellow. My focus will WOULD CHANGE MY LIFE. OFF TO
be on the last 33 years dealing with PC technology. THE GLASSHOUSE OF THE
After a year working as a commercial helicopter MAINFRAME, I WENT. . . AND IT
pilot and instructor, in 1963, I ended up taking a job as WAS LOVE AT FIRST CODE!
a lab technician at Shell Development. Soon my boss
said that Shell was getting a new IBM 7044 mainframe
and that my job was now to write programs for the Upon graduation with an M.S. degree in 1967, IBM
department’s chemists. I had always been interested in San Jose offered me a job working on either the
in computers. When I was about 12, I tried to build a new System/360 operating systems or on software for
relay-based computer that would play the game of tic- the lower-end scientific and process-control com-
tac-toe. Later, during my junior year in high school, we puters (the IBM 1130 and 1800). I instinctively chose
went on a field trip to Cal to visit the engineering the small “low-end” group over the huge System/360
school’s computer center, which had a new IBM 650 group, and this choice ended up being a major factor
computer. The concept of computers really appealed in my success at IBM. Thus, I started the second phase
to me, but when I had started to take classes at Cal in of my computer career (and inspired my continuing
1958, I found no easy way to pursue this interest. love for small development teams).
So, in early 1964 at Shell, I finally had the opportu-
nity that would change my life. Off to the glasshouse ONE OF THE THREE MOST
of the mainframe, I went. . . and it was love at first SIGNIFICANT EVENTS IN
code! COMPUTER HISTORY
In this first phase of my computer career, I wrote At IBM, I first learned to program one of the many
scientific application programs in Fortran IV and models of the System/360. In my opinion, the launch
of this family in the mid-1960s was one of the three
most significant events in computer history. In addi-
tion to having a uniform ISA across a wide range of
U.S. Government work not protected by U.S. copyright. models and performance, by 1971, IBM had shipped
Digital Object Identifier 10.1109/MM.2021.3112877 systems containing most of the modern features that
Date of current version 19 November 2021. would eventually be adopted by microprocessors:

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 MICROPROCESSOR AT 50

with tagged pointers, and many other innovative fea-

tures. My technical efforts were primarily related to
the high-level ISA. This architecture carried over into
two more IBM families, starting with the very success-
ful AS/400.
While IBM processors of this 1970s era were pow-
erful, they were large (many components), power-hun-
gry, and “hidden” within larger IBM systems. In order
to grow computer usage significantly, two major inno-
vations were needed: 1) an inexpensive high-density
silicon technology; and 2) an ecosystem with commer-
cial chip suppliers that would make a “processor”
available for anyone to buy and use in their systems.

SECOND OF THREE MOST

SIGNIFICANT EVENTS IN
COMPUTER HISTORY
FIGURE 1. 1970 “Personal Computer” logic. This leads us to the second most influential event in
the history of computing, which we are celebrating
today: the development of a high-density “silicon-
virtual memory, virtual machine emulation, multipro- gate” MOS microprocessor in 1971 (the Intel 4004).
cessing, cache memory, pipelining, out-of-order execu- The silicon-gate technology was “proven” by the inven-
tion, and many others. tions and impressive efforts of Federico Faggin,
After learning the System/360, my next job was enabling thousands of gates to be placed on one die.
working on a new IBM 1800 real-time operating sys- Plus, the Intel microprocessor was available for any-
tem. Then, in 1969 (in Boca Raton, FL, USA), I managed one to buy (as opposed to processors from IBM and
the software for a desk-sized “personal computer” other vertically integrated computer companies). The
that had a built-in keyboard, printer, optional CRT, 4004 led to the 8008, which led to the 8080, an influen-
hard drive, removable disk, and ran an interactive tial design that spawned a host of other microproces-
BASIC software system (the IBM System/3 Model 6 sors, in particular, the Zilog Z80 (a company founded
BASIC shipped in 1970). I wrote the code that provided by Federico Faggin) and the 6502—all of which anyone
64 kB of virtual memory on a machine that had only could buy and use to build their own computer. This
8 kB physically. led directly to the “personal computer” revolution,
Figure 1 shows the discrete logic of the processor, starting in the second half of the 1970s with systems
I/O control, and 16-kB memory for this 1970 “personal from Apple, Radio Shack, Atari, and many more.
computer.” In winter 1979, I bought an Apple II, and my experi-
In 1972 (in Rochester, MN, USA), I managed the ence convinced me that the future would expand com-
software development of what became the IBM Sys- puter usage from a few thousand computer centers to
tem/32, which shipped in 1975. It sold more than any the millions of homes of personal users.
IBM computer other than the IBM PC. I also wrote Having finally finished directing the huge and diffi-
“microcode” for its processor that had all the charac- cult System/38 project, IBM offered to move me to
teristics of what would later be called RISC: a simple wherever I wanted. I chose IBM Austin, TX, USA, as a
instruction set using many general-purpose registers, location. We moved in summer 1980 for me to be the
a load/store architecture, instructions all executed in “advanced technology” manager for the lab.
one clock, and so forth.
And later in the 1970s, I led the architecture and
managed microcode and software development of the Third on the Top-3 List
IBM System/38, which shipped in 1980, and contained At about the same time, the third on my list of most
many advances in computer architecture. The proces- influential events occurred: the shipment of the first
sor had a high-level object-oriented instruction set IBM PC. It was wildly successful for three reasons: 1) It
architecture (ISA), single-level storage with 48-bit was a good technical design; 2) it was from IBM, at that
hardware addressing, including capability addressing time, the recognized leader in computing; and 3) it was

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 MICROPROCESSOR AT 50

an “open” design using non-IBM and nonexclusive com- Since I was interested in the potential of personal
ponents, including software. computers, and it was obvious to me that x86 proces-
The lack of exclusivity was the most influential fac- sor compatibility would be dominant in personal com-
tor, as it enabled other companies to make a PC puter markets, I “moved” myself into the PC division
“clone,” and a large personal computer industry quickly as the only IBM Fellow involved with the PC.
arose (Compaq, Tandy, HP, Dell, and many others). This My old workstation group had grown and was
large and competitive industry had the effect of rapidly working on extending the RISC architecture into what
increasing the number of personal computers installed, became the IBM Power architecture. Since I felt it was
as it drove prices down, developed manufacturing a mistake to ignore the rapidly increasing amount of
capacity, and pioneered technical enhancements. software written for the x86 ISA, I proposed adding
In my new job at IBM Austin, I inherited a group technical features to the Power architecture to allow
designing a RISC processor called ROMP that had it to emulate x86 machine code at the same perfor-
started as a joint project of IBM Research and the pre- mance as native RISC code. The idea was an “inter-
vious Austin management. I decided to use it as the cept and replace” strategy be able to run old code
basis for an “engineering and scientific” workstation with good performance but provide a path to better
and assembled a team to design the workstation and performance using native capability.
the software. The idea was to offer a “personal use” IBM was also implementing (under license from
system with performance and function above the IBM Intel) a version of the 80386 in Burlington. I hired the
PC while also using proprietary IBM technology. lead designer, Terry Parks, from that group for my Fel-
However, every time I presented a status report on low project. Terry was—and is—a great engineer and
our progress, I was questioned about our high cost microprocessor expert. I also became the IBM repre-
and small performance gain over the latest IBM PC, sentative to Intel on the x86 architecture and had
and “where are the applications?” This caused an many conversations with Patrick Gelsinger and John
epiphany in me. In the PC world, what mattered was Crawford, authors of the best book on the 80386
the low cost and existence of useful non-IBM code. instruction set.
Plus, in early IBM, the instruction set had a large effect At the time IBM management looked at the PC as
on the cost and performance of the hardware. With sil- a toy, and their focus was on IBM-exclusive technol-
icon technology and Moore’s law, however, it was just ogy. Thus, my x86 intercept idea was rejected by the
a matter of time until differences in instruction set IBM establishment, but as a Fellow, I was able to con-
had no effect on the hardware cost. tinue and finally got about 50 people working on my
This furthered my interest in moving from high- proposal for the “L86” (“last x86”) derivative of the
tech, IBM-exclusive designs to the PC world. The fact Power processor.
that the upcoming PC’s 80286 instruction set was I was also disturbed by the IBM management
“ugly” compared to our RISC instruction set blinded approach of pushing IBM-unique features that were not
many at IBM to what was going to happen: that the really needed (the “micro channel”) and ignoring the
PC—and its x86 architecture—would end up being benefits of virtual memory. IBM could have shipped the
the dominant architecture. Especially, once it added Intel 386 (with virtual memory) in a PC in 1986 when
virtual memory capability and got a better operating Compaq did, but it consciously chose not to. Worse was
system, which I knew was inevitable. that the new OS/2 software for the PC was not going to
Skipping over some frustrating IBM directions and support virtual memory for years to come. These and
challenging years, my group finally shipped its work- other IBM decisions were an attempt to force people to
station in 1985 as IBM RT/PC. It contained the first the IBM brand, but upper management seemed
nonhidden IBM RISC processor, and the first IBM ver- completely unaware of the PC revolution taking place.
sion of UNIX (IBM AIX). For example, I went to see a high-level executive in New
York to explain why IBM needed to address the PC mar-
ket better, and he suggested that the main use for a PC
Becoming IBM Fellow and Joining would be as a terminal for an IBM mainframe.
x86 Club Finally, after 21 good years at what had been a
Sometime before RT/PC shipped, I was appointed an great company and having the best job I could have
IBM Fellow. This promotion was unusual, since I had imagined—IBM Fellow—I decided to stop fighting for
spent my entire career in product development, as IBM against the PC revolution and, instead, join it. So,
opposed to most Fellows who at that time were from with a mixture of sadness and excitement, in July
IBM Research. 1988, I quit IBM and went to work for Michael Dell. The

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 MICROPROCESSOR AT 50

best technical person in my Fellow project—Terry So, at the end of 1993, I quit Dell, and Tom hired
Parks—quit IBM the next week and also joined Dell. me as a consultant. I soon convinced him to hire
Terry Parks and two others from Dell, also as con-
sultants. Darius Gaskins was an engineer who was
BOOMING YEARS AT DELL, BUT I very knowledgeable and experienced with I/O and
STILL WANTED TO BUILD AN x86 bus hardware in a PC. Al Sato was an experienced
MICROPROCESSOR x86 and BIOS programmer.
My five-plus years at Dell consisted of high-level man- We four worked out of our homes in Austin and
agement. I was a Senior VP working directly for commuted to MIPS when needed. I personally had to
Michael, primarily in charge of product development, spend a lot of time at MIPS, maybe 50%. Initially, we
but also managing manufacturing, procurement, tech- proposed my old L86 approach: Create new MIPS
nical support, and IS at various times. I learned a lot instructions supporting high-performance emulation
about those “other” areas, PC technology, and the PC of x86 such that an MIPS processor could run both old
market, but also relearned that I did not want to be a PC code and new MIPS code. Silicon Graphics, how-
high-level manager; I missed the technical content I ever, which then owned MIPS, was clearly not inter-
had at IBM. ested in x86 or PCs, so as time progressed, our
I began to think a lot about microprocessors. At proposals gradually morphed from an emulated x86 to
the time, around 1992, AMD had not shipped its own a hybrid MIPS-x86 and maybe even to a “native” x86,
x86 design (the “K5”), and Cyrix was just starting, so depending on who was asking.
Intel had an effective monopoly on the rapidly expand-
ing PC market. I knew what Dell was paying Intel, and I
began to think that a small team of talented designers IDT’s Visionary CEO Helps Us Change
could make a “good” x86 processor fairly easily for a Microprocessor History
lot less. I visited all the MIPS licensees (including in Japan), try-
As my thoughts progressed, I saw three reasons to ing to interest them in our hybrid x86-MIPS technology
start a new company to make low-cost x86 process- and our request for funding to start a company. My
ors. First, the opportunity outside the U.S. was huge. story was basically “there’s four of us working out of
Ultimately, everybody in the world would want a PC. our homes, we’d like $11 million to start a company to
At that time, 50% of the PC business was in the U.S., make a hybrid MIPS-x86 processor, we want to do it
which had only 5% of the world’s population. So, the our way and be left alone, and, trust me, we’ll ship a pro-
potential for sales outside the United States was huge, cessor in two years.” They all laughed—except the CEO
but that market did not have the disposable income of of Integrated Device Technology (IDT), Len Perham.
the United States, so the low cost was the key. Len was one of two industry visionaries and great
Second, I had specific ideas about a better way to managers that we were lucky to meet on our journey.
run a highly technical company. I had always been IDT had funded a small company, QED, to make an
interested in how small teams could be most efficient, MIPS processor, the R4600. I proposed using it as a
and my time at Dell had shown that this could work. base for our processor design. Len sent one of his VPs
The resulting low development cost would be critical (Al Huggins) to “vet” our proposal. Al was very smart
to achieving a low product cost. but cynical, and months of negotiation, arguing,
And third, “Because it was there.” Terry Parks and I inventing, convincing, etc., passed. At some point, I
would often talk about the challenge of x86. Intel had presented my idea to the IDT Board of Directors,
done a good job convincing people that it took “spe- which included Federico Faggin. I got no direct feed-
cial sauce” to make an x86 and only they had the skills back from that board meeting, but the questions
to climb that mountain. We personally wanted to try clearly indicated skepticism. Later I learned that IDT
the challenge. was having success with its MIPS-based processor
My initial ideas about how to design an x86 proces- business, and those business units thought an x86
sor were based on my old L86 project. Thus, the obvi- processor would compete for corporate resources.
ous place to start was at a company making RISC There was also the question of whether IDT would
processors. Fortunately, I knew the President of MIPS, draw unwelcome attention from Intel’s lawyers. But
Tom Whiteside. I had hired Tom into IBM many years Len clearly supported the idea and seemed persuasive
ago, and he had worked on the ROMP processor proj- in his arguments.
ect. I gave Tom my arguments for why MIPS needed to Finally, it was the end of March 1995, and there was
worry about Intel and x86, and he seemed interested. an IDT board meeting late at night. Len said this was

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 MICROPROCESSOR AT 50

the final yes/no meeting. I had traveled to IDT in order The RISC integer ALU needed many, but straightfor-
to be available for questions, but I was not called into ward, changes. Major changes were needed to the
the meeting. Finally, Len came out and said, “let’s do it!” front-end: decoding variable-length instructions, trans-
“It” meant start a subsidiary company in Austin to lation of x86 instructions into internal “micro-ops,” and
make a native x86 processor. Unfortunately, due to ROM-based microcode. Changes were needed to the
the background of the MIPS relationship, there was semantics of the cache protocols, virtual-memory
confusion in the press as to whether it was a pure x86 translation, and other areas. And, of course, an entirely
or a hybrid x86-MIPS processor. This confusion was new bus structure was needed to be compatible with
aggravated by our new company name: Centaur Tech- Intel “Socket 7” parts (done by Darius). Terry developed
nology, Inc. We originally chose it because a Centaur the new front-end, and I wrote much of the microcode
was a mythical beast that was half human and half for that initial part.
monster. Many assumed that the human was the
MIPS architecture, and the monster was the ugly x86
architecture. Len and I, however, were committed to
SINCE WE WERE A NEW, UNKNOWN
being a pure monster.
COMPANY, WE FELT THAT OUR
PROCESSORS HAD TO BE PERFECTLY
EARLY DAYS OF CENTAUR COMPATIBLE WITH INTEL’S. THUS, WE
TECHNOLOGY SPENT A LOT OF EFFORT
So, on April 1, 1995, with only our home-based work DEVELOPING OUR OWN x86
areas and no equipment except our personal PCs, but VERIFICATION METHODOLOGY.
with a new bank account with money in it, and with
access to the R4600 design, we started the process of
making a company and making a low-cost x86
processor. Our largest effort was developing from scratch an
Initially, we got “rent-an-office” space just down x86 reference model and associated verification test-
the street from a joint IBM and Motorola processor- ing tools. Today, there are several x86 simulators avail-
design group called Somerset, which was designing able, but in those days, there were none. It was
“PowerPC” processors for Apple. There seemed to be perceived (rightfully) that the x86 architecture was full
a level of unhappiness among Somerset engineers, of strange undocumented behaviors. Since we were a
and I knew many of them, so we had a steady stream new, unknown company, we felt that our processors
of Somerset people wandering down to visit and talk. had to be perfectly compatible with Intel’s. Thus, we
We had four or five offices. I interviewed people in spent a lot of effort developing our own x86 verifica-
one that had only a folding table and chairs. I would tion methodology.
try to convince desired people to join a tiny startup
that was going to make what was considered the It Is Alive! Centaur’s First x86 Silicon
hardest processor type (x86), and then face off against Runs DOS
the industry’s most ruthless competitor (Intel). The Finally, after 13 months in existence, we taped out C1
amazing thing is that my spiel actually worked on to IDTs fab. I vividly remember sitting in our lab on the
some really talented people, most of whom have 4th of July, 1996, working to boot DOS and making
stayed for the 26 years we have existed. microcode fixes (the C1 part had ROM modeled as
The first engineer to join us was Jim Donahue, a loadable RAM). The part soon ran DOS, but we discov-
circuit designer from IBM. By the end of 1995, we had ered some issues with Windows 95 that restricted the
a total of about 20 experienced engineers. Fifteen of use of some Windows applications. But, in general, the
that early group are still with Centaur. C1 part met its objectives, and we were very excited. . .
The IDT Board wanted a tape out of a chip capable and the Board said, “keep going.”
of running DOS within a year, and we soon developed We taped out a “complete” version, called C2A, in
a plan for our first tape out (cleverly called the “C1”). spring 1997. It was good enough that we announced
While the official target was running DOS, we inter- our product (for a 3Q1997 shipment) at the Micropro-
nally set a goal of running Windows, except for code cessor Forum and got a positive review article in the
using floating-point instructions. (The entire MIPS Microprocessor Report (MPR) issue of June 2, 1997.
floating-point design had to be redone to handle x86’s The shipped version later in 1997 was a minor hard-
80-bit floating-point format.) ware revision called C2B.

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 MICROPROCESSOR AT 50

I told the employees but said that I was confident that

we would be bought because we produced something
valuable and were very efficient. I was very gratified
that only one employee quit in the almost six months it
took to get a sale. We focused on developing a new
design—the C5A—for the new (assumed) owner.

Via Technologies Visionary CEO Buys

Centaur
Several potential buyers came to perform their due dil-
igence, usually with one technical person and about
six lawyers and accountants. There were no firm
offers, however. One day I got a call from Wen-Chi
Chen, founder, and CEO of VIA. Wen-Chi Chen was a
visionary: He understood the market and technolo-
gies, and he saw the potential of the PC while under-
FIGURE 2. Die plot of Cenatur C3B. standing that the microprocessor was key to
controlling the platform. He also shared my philosophy
about how to get things done with very small teams.
IDT “WinChip” Ships Worldwide He asked if I was interested in being bought by VIA,
This first part was named “IDT WinChip C6” and had and I said, “sure.” Three days later, he arrived with only
sped up to 200 MHz. It was very compatible with the one additional person to check us out.
Intel P55C. The pipeline was simple: fetch, decode and I had prepared a full day of presentations covering
generate micro-ops, access register file and calculate our people, technology, patents, assets, and so forth. I
memory address, execute (could be multiple clocks), started with my philosophy of how to run a small,
and writeback. The silicon technology was 0.36 mm highly talented technical group. After about 30 min,
with four levels of metal and comprised 5.4 million Wen-Chi stopped me and said he totally agreed, and
transistors, mostly from two relatively large L1 caches he wanted to buy us. Two days later, he and IDT
(32 kB each, as compared to the original Intel P5, agreed to terms.
which had two 8-kB caches). It turns out that VIA was also buying Cyrix, ano-
Our major strength was low cost (as planned). The ther maker of x86 processors. Cyrix had started in
silicon technology was simple: no local interconnect 1988 and had been bought by National Semiconduc-
and no trench. We used wire bonding, not C4 pads. tor in 1997. Wen-Chi asked me to compare Centaur
And the die size was only 88 mm2, as compared to and Cyrix, and I pointed out that Centaur had 60
Cyrix M2 (196 mm2), AMD K6 (162 mm2), and Intel employees, Cyrix had about 350, we had one manager
P55C (128 mm2). Floating-point performance and top- (me), and they had many managers and several VPs.
end megahertz were weaknesses, but the biggest The next parts we were both designing, however, had
problem was IDT manufacturing technology. We could similar capabilities.
not meet original demand, and our competitors were Both company sales were consummated in Sep-
already using 0.25-mm technology. tember 1999, and Cyrix soon disappeared. In fact, the
Figure 2 shows the die plot of C2B showing that first x86 part VIA shipped used the Cyrix name but
even this “simple” x86 microarchitecture is a complex was actually the Centaur C5A that we had been devel-
design with many components. oping during the sale period.
We quickly moved to an improved “C3” design, In 2001, the long-expected patent suit with Intel
which was shipped in early 1999. It was called WinChip occurred. VIA had chipset patent issues with Intel
2. It was built in 0.28-mm technology, which had imp- and, thus, in September, VIA and Centaur sued Intel
roved performance, and added new SIMD instructions using some of Centaur’s patents. The next day (Sep-
licensed from AMD, called 3DNow! (our subsequent tember 10, 2001), Intel sued back using its x86 patents.
processors would use Intel MMX instructions). As the inventor on our patents, as well as being recog-
In spring 1999, Len called and said he was stepping nized by the court as an expert witness, I was con-
down from being CEO, and the new CEO did not want sumed with legal issues for the following 18 months.
to pursue the x86 business. IDT would try to sell Terry Parks was an experienced patent expert, and he
Centaur, but they would only wait six months for a sale. also was consumed by this suit (including going to

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 MICROPROCESSOR AT 50

hardware random number generation, encryption (AES),

and hashing (SHA) instructions in 2003, long before Intel
introduced AES-NI ISA extension in 2008. The Centaur
cryptographic hardware (marketed as “Padlock”) was
validated by NIST for FIPS 140 compliance.

Predicting the Future of the

Microprocessor
This focus on extending x86 with domain-specific archi-
tectures is directly aligned with some of the predictions
from a recent panel discussion at the International
Symposium on Computer Architecture (ISCA 2021).
I was part of the eight-person panel to discuss the 50th
anniversary of the microprocessor, revisiting important
inflection points and making predictions about the
future of the microprocessor. My view (not shared by
many) is that processor microarchitecture may actually
FIGURE 3. Die plot of Centaur CHA.
get simpler. Microprocessors now incorporate very
advanced concepts, and new features are providing
diminishing performance returns at the expense of
England to fight the Intel suit there). The end result, power consumption, cost, and security. The real barrier
announced on April 7, 2003 (the day the jury trial was to performance these days is the memory hierarchy,
supposed to start), was a patent cross-license agree- not the processor design. Consider a die with n complex
ment between Intel and VIA. While achieving this was processors versus one with 2n simpler processors,
very painful, it had significant marketing benefit. where the simpler processor performance is 50% that
of the complex one. With the same memory struc-
ture, performance could be the same, but the 2n ver-
DEVELOPING MODERN x86 SOCS sion will be smaller and have lower power (due to
AND INTEGRATING DOMAIN- the power/size inefficiency of complex designs).
SPECIFIC ACCELERATION Most important, however, simpler processors can be
We continued developing in-order processors, but more secure, due to less side-channel leakage and
Intel and AMD switched to out-of-order processors in fewer exploitable bugs.
the late 1990s. I gave several talks at conferences on
why out-of-order was inefficient: The performance
gain is less than the size and power increase (and
today, I would also mention increased information MY VIEW (NOT SHARED BY MANY) IS
leakage). In 2008, we finally gave up on trying to influ- THAT PROCESSOR
ence the market and shipped our first out-of-order MICROARCHITECTURE MAY
part, which was also our first 64-bit design. ACTUALLY GET SIMPLER.
Centaur and VIA have continued our focus on low MICROPROCESSORS NOW
cost and low power while moving to a system-on-a- INCORPORATE VERY ADVANCED
chip design approach. Our latest Centaur SoC has CONCEPTS, AND NEW FEATURES ARE
eight x86 cores (with AVX-512), 16 MB of L3, 44 PCI-e PROVIDING DIMINISHING
lanes, and a unique AI coprocessor (AIC) to accelerate
PERFORMANCE RETURNS AT THE
deep learning. Microprocessor Report pointed out
EXPENSE OF POWER CONSUMPTION,
that Centaur is the first in the industry to integrate an
AI coprocessor into an x86 processor. Figure 3 shows
COST, AND SECURITY.
the die plot of this chip with its approximately five bil-
lion transistors (interestingly, about 1000x the transis-
tors in our first design). In addition to my list of the most important com-
The unique AI coprocessor continues our history of puter innovations (the IBM System/360, the Intel
adding new and useful features to the ISA for domain- 4004, and the IBM PC), I would consider adding two
specific applications. For example, we first shipped more innovations if (when) they occur. One would be

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 MICROPROCESSOR AT 50

the development of a viable replacement for SRAM/ G. GLENN HENRY started the career in
DRAM, and the other would be the design of a truly 1964 as a mainframe application pro-
secure, networked computer.
grammer. In 1967, he joined IBM, and for
It has been a long and winding path from my early
the next 21 years, he led architecture
days at Berkeley trying to figure out what I wanted to
and implementation of some of IBMs
do as a career. I have been extremely lucky in being
in the “right place at the right time” and meeting most innovative products including Sys-
many of the “right people” at the perfect time in my tem/38, RT/PC, and AIX. In 1985, he was
life. This has allowed me to have a front-row seat to appointed as an IBM Fellow. In 1988, he left IBM and went to
watch the evolution of computers from mainframes work for Michael Dell as a Senior VP. In 1994, he left Dell with
to smartwatches. Watching many microprocessor three others with the goal of starting a company to develop low-
companies rise and fall over the years, I am proud cost x86 processors. In early 1995, Centaur Technology launched
that the microprocessor company I helped found has
with him as the President. In 2019, he retired as the president but
lasted 26 years in such a dynamic and competitive
continues to work for Centaur as a developer. His career is
industry.
reflected in an oral history at the Computer History Museum,
and in a documentary about Centaur (The Rise of the Centaur).
Contact him at glennh@centtech.com.

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