MEL 5351
Data Communication Techniques and Digital Signal Processing
Digital Signal Processing
Dr. Indika L Wanniarachchi
Analogue to digital conversion; linear and non-linear systems, signal
superposition and decomposition, convolution and impulse response;
correlation; discrete Fourier transform and its applications; Fast Fourier
Transform, continuous signal processing; Digital filters–recursive filters,
Chebyshev filters etc.; Applications in audio processing and data compression.
What is a DSP?
Digital Signal Processors (DSP) take real-world signals
like voice, audio, video, temperature, pressure, or position
that have been digitized and then mathematically
manipulate them. A DSP is designed for performing
mathematical functions like "add", "subtract", "multiply"
and "divide" very quickly.
Signals need to be processed so that the information that they contain can be displayed, analyzed, or converted to
another type of signal that may be of use. In the real-world, analog products detect signals such as sound, light,
temperature or pressure and manipulate them. Converters such as an Analog-to-Digital converter then take the
real-world signal and turn it into the digital format of 1's and 0's. From here, the DSP takes over by capturing the
digitized information and processing it. It then feeds the digitized information back for use in the real world. It does
this in one of two ways, either digitally or in an analog format by going through a Digital-to-Analog converter. All of
this occurs at very high speeds.
Data Acquisition and Signal Processing
Data acquisition is the process of sampling signals that measure real world physical conditions and
converting the resulting samples into digital numeric values that can be manipulated by a computer.
Data acquisition systems, abbreviated by the acronyms DAS or DAQ, typically convert analog
waveforms into digital values for processing. The components of data acquisition systems include:
•Sensors, to convert physical parameters to electrical signals.
•Signal conditioning circuitry, to convert sensor signals into a form that can be converted to digital
values.
•Analog-to-digital converters, to convert conditioned sensor signals to digital values.
ADC and DAC
Analog-to-Digital Conversion (ADC) and Digital-to-Analog Conversion (DAC)
are the processes that allow digital computers to interact with physical signals.
Digital information is different from its continuous counterpart in two important
respects:
it is sampled, and it is quantized.
Both of these restrict how much information a digital signal can contain.
An analog-to-digital converter (ADC, A/D or A to D) is a device that converts a continuous
signal to a digital number that represents the quantity's amplitude
The inverse operation is performed by a digital-to-analog converter (DAC)
Analog to Digital Conversion
Analog
Input Sample
& ADC
Hold Digital Output
Sampled Signal
What is ADC
◼ An electronic integrated circuit which transforms a signal
from analog (continuous) to digital (discrete) form.
◼ Analog signals are directly measurable quantities.
◼ Digital signals only have two states. For digital
computer, we refer to binary states, 0 and 1.
Why ADC is needed
◼ Microprocessors can only perform complex
processing on digitized signals.
◼ When signals are in digital form, they are less
susceptible to the deleterious effects of additive
noise.
◼ ADC Provides a link between the analog world of
transducers and the digital world of signal
processing and data handling.
ADC process
Two main steps
Sampling
Quantization
ADC Parameters
Range
Conversion Time
Resolution
Conversion Time
Time Required to complete a conversion by an ADC
Resolution of ADC
The resolution of the converter indicates the number of
discrete values it can produce over the range of analog
values
resolution is usually expressed in bits
For example, an ADC with a resolution of 8 bits can
encode an analog input to one in 256 different levels,
since 28 = 256.
The minimum change in voltage
required to guarantee a change in the
output code level is called the least
significant bit (LSB) voltage. The
resolution Q of the ADC is equal to the where M is the ADC's resolution in bits and EFSR is
LSB voltage. The voltage resolution of the full scale voltage range . EFSR is given by
an ADC is equal to its overall voltage
measurement range divided by the
number of discrete values
Lets Learn about ADC and DAC circuits
DAC page 58
ADC page 75
Analog to Digital Conversion
original analog signal
Analog to Digital Conversion
Sampling
Analog to Digital Conversion
sampled signal
If we assume that voltages from 0 to 4.095 are digitized by a 12-bit ADC, each
step would be 1 mV.
Any voltage variations less than 1 mV will be lost during digitization.
Eg; 2.0001 and 2.0007 will both be assigned the number 2000 after digitization
This produces an error, which can be at most ±1/2 LSB
Analog to Digital Conversion
quantization
Any one sample can have a maximum error of ±1/2 LSB
Analog to Digital Conversion
quantized signal
Analog to Digital Conversion
Quantization error
Quantization error appears like a random noise
Quantization Noise
Any value of the error is equally likely,
so it has a uniform distribution ranging
from –Q/2 to +Q/2. Then, this error can
be considered a quantization noise with
RMS
Quantization Noise
This noise is uniformly distributed between ±½ LSB,
has a mean of 0 and a standard deviation of
Quantization Noise
Example:
If a signal is digitized with an 8-bit ADC, it adds an rms
noise of
times the full scale voltage.
Since quantization error is a random noise,
For a 12 bit ADC?
the number of bits determines the precision
of the data. For example, you might make
For a 16 bit ADC? the statement: "We increased the precision
of the measurement from 8 to 12 bits."
Quantization Noise
In deciding the number of bits, one must ask:
How much noise is already present in the system?
How much noise can be tolerated in the digitized
output?
because the random noise generated by quantization will
simply add to whatever noise is already present in the
analog signal
Quantization Noise
Example:
Consider a signal digitized with an 8-bit ADC and 5 V
range.
The added rms noise will be
If the signal already had 5 mV noise,
the total rms noise would be
Quantization Noise
If the same signal is digitized with an 12-bit ADC and
5 V range, what would be the added noise?
Will a 16 bit ADC improve the signal to noise ratio?
Sampling Theorem
How can we decide a proper sampling rate for a given signal?
Sampling Theorem
(Nyquist Theorem)
A signal that contains frequencies up to a maximum of f0 can be
adequately represented by samples taken at a rate greater than or
equal to 2f0
.
Sampling Theorem
A continuous signal can be properly sampled only if it does not contain
frequency components above one-half of the sampling rate.
If frequency components above one-half of the sampling rate are present,
aliasing will result.
In order to avoid aliasing, frequencies above the Nyquist frequency
must be filtered using a low pass filter.
Such a filter is called an anti-aliasing filter.
Problem:
What are the suitable sample rates for digitizing human speech?
music?
What should be the cut-off frequencies of the antialiasing filters used in
the above cases?
Humans can here from 20 Hz to about 20000 Hz. Therefore, when music is
digitized, sampling time must be greater than 1/40,000 seconds.
i.e. more than 40000 samples per second.
In CDs, 44100 is used.
Sampling Theorem
Demonstration with Python and Arduino
Here we sampled the signal with sampling rate fs = 13*fmax (>= 2fmax).
Hence, we could properly reconstruct the signal.
fs = 0.8 f
Aliasing is an effect that occurs when a signal is sampled at too low a frequency. What happens is that the higher
frequency components of the signal cannot be captured because of the low sampling frequency, which results in
overlap in the spectrum. In the above example, reconstructing signal is a low frequency signal respect to the
original signal.
Here we can reconstruct the signal with sampling rate fs1 = 6* fmax (>= 2*fmax). When we
sampled the signal with sampling rate fs2 = 1100/s, f2 and f3 frequency components appear
as low frequency components in the reconstructed signal. In case if we only concern the
signals in the range [0-550 Hz] then before sampling the signal we must apply a anti aliasing
low pass filter in order to remove frequencies above 550 Hz and then sample the signal with
sampling rate 1100/s.
Anti aliasing filter
In order to remove frequency
components above the Nyquist
frequency (fs/2)
Ex : cut off frequency (Nyquist
frequency ) =550 Hz
Which mean sampling rate fs = 1100 /s
f1 = 500 Hz f1 = 500 Hz
f2 = 1000 Hz Sampling rate fs
Analog to Digital
f3 = 750 Hz = 1100/s
Conversion
Before learning about filters, we will
first learn Fourier Series, Fourier
Transform, Discrete Fourier transform
and Frequency domain analysis in
coming lecturers what to do with these data?
DSP
Why?
What is the need of digital signal processing?
Digital signal processing is important because it provides the *flexibility* of using the same
digital hardware (e.g. DSP chips such as TI TMS 320 series) for many different applications.
Before DSP, different analog electronics would be required for every different application.
Now, for example, your smartphone is everything from a cell phone, radio, camera,
navigational tool, music player, video player, etc. all using the same hardware as a result of
DSP. Increasingly, everything is being “software-defined” and DSP is really at the heart of
that trend which has been evolving for the past several decades.
Digital signal processing (DSP) is the process of analyzing and modifying a signal to optimize
or improve its efficiency or performance. It involves applying various mathematical and
computational algorithms to analog and digital signals to produce a signal that's of higher
quality than the original signal.
Digital to Analog Conversion
Microcontroller 8-bit R-2R ladder Analog out
Arduino
𝑦 = sin(2𝜋𝑓𝑡)
Here we can understand how sampling rate
change the output of DAC.
Arduino + 8 bit R-2R ladder
Digital to Analogue Conversion Circuits
A digital-to-analog converter (DAC, D/A, D2A or D-to-A) is a circuit that converts
digital data (usually binary) into an analog signal (current or voltage).
One important specification of a DAC is its resolution. It can be defined by the
numbers of bits or its step size.
(R/2nR DAC)
The Summing Amplifier
The Summing Amplifier is another type
of operational amplifier circuit
configuration that is used to combine
the voltages present on two or more
inputs into a single output voltage.
•The inputs can be thought of as a
binary number, one that can run from
0 to 7.
•V2 is the MSB (most significant bit)
and V0 is the LSB (least signifcant
bit).
•The output is a voltage that is
proportional to the binary number
input.
•The resolution of this DAC is 3 (the
number of bits) or -0.25V (the step
size).
•To have more bits, add an additional
resistor for each additional bit. Note
the relationship between adjacent
resistor values.
𝐵3 𝐵2 𝐵1 𝐵0
𝑉𝑜𝑢𝑡 = 𝑉𝑟𝑒𝑓 ( + + + )
1 2 4 8
Electronic Simulation – R-2nR DAC
R4
1k
U1(V+)
U1
7
3
6
SW3(NO) 2
SW1
4
1
5
R1 741
+88.8
SW-SPDT 1k Volts
SW2 R2
2k
R3
SW-SPDT
SW3 4k
SW-SPDT
R- 2R Ladder DAC
The R-2R Digital to Analog Converter uses only two resistance values R and 2R
regardless of the number of bits of the converter compared to the summing amplifier
implementation where each bit resistor has a different value.
LSB MSB
Thevenin’s Theorem
Any combination of batteries and resistances with two terminals can be replaced by
a single voltage source e and a single series resistor r. The value of e is the open
circuit voltage at the terminals, and the value of r is e divided by the current with
the terminals short circuited.
B 0 B1 B 2 B 3
Vo = ( + + + )Vref
16 8 4 2
V 0 = (0.3125 + 0.625 + 1.25 + 2.5)V
B 3 B 2 B1B 0 → 1011 → 2.5 + 0.625 + 0.3125 = 3.4375V
Depending on the state of bit B2, B1 or B0, the respective
current I2, I1 or I0 is switched either to ground or to V- of
the op amp. Thus
𝐼𝑜𝑢𝑡 = 𝐵2 𝐼2 + 𝐵1 𝐼1 + 𝐵0 𝐼0
To analyse this circuit, first we observe that since the output is
connected to V- through Rf, the opamp is in a negative
feedback configuration. Thus
𝑉− = 𝑉+ = 0
Due to the nature of the resistance network and values,
we can obtain the current values by inspection.
From ohms law,
𝐼0 = 𝐼𝑐
𝐼1 = 2𝐼0
𝐼𝑎 = 𝐼𝑏 + 𝐼1 = 2𝐼1
𝐼0 = 𝐼𝑐 𝑉𝑟𝑒𝑓 = 𝐼𝑎 𝑅 + 𝐼1 2𝑅 = 4𝐼1 𝑅
𝑉𝑟𝑒𝑓
𝐼𝑏 = 𝐼0 + 𝐼𝑐 = 2𝐼0 𝐼2 = 2𝐼1 = 4𝐼0 =
2𝑅
𝑉1 = 𝐼𝑏 𝑅 + 𝐼0 2𝑅 𝑉𝑟𝑒𝑓
𝐼𝑜𝑢𝑡 = (4𝐵2 + 2𝐵1 + 𝐵0 )
8𝑅
𝑉1 = 4𝐼0 𝑅
𝑉𝑟𝑒𝑓 𝑅𝑓
𝑉1 = 𝐼1 2𝑅 = 4𝐼0 𝑅 𝑉𝑜𝑢𝑡 = (4𝐵2 + 2𝐵1 + 𝐵0 )
8𝑅
Letting Vref = 1 and Rf = 2R, we obtain the following output table
Electronic Simulation - R- 2R Ladder DAC
VCC
R6
U1 1k
7
3
6
R2 R3 R4 R5 2
1k 1k 1k 1k
4
1
5
741
R1 LSB_B0 B1 B2 B3-MSB
1k 2k 2k 2k 2k
+88.8
Volts
SW1 SW2 SW3 SW4
SW-SPDT SW-SPDT SW-SPDT SW-SPDT
Vref
Analogue to digital conversion circuits
Almost every environmental measurable parameter is in analog form like
temperature, sound, pressure, light, etc. Consider a temperature monitoring system
wherein acquiring, analyzing and processing temperature data from sensors is not
possible with digital computers and processors. Therefore, this system needs an
intermediate device to convert the analog temperature data into digital data in order
to communicate with the digital processors like microcontrollers and
microprocessors.
Counter ADC
Counter ADC
Counter ADC
Counter ADC
Successive Approximation ADC
The counter is replaced by a Successive Approximation Register (SAR)
• Uses a n-bit DAC to compare DAC and original analog results.
• Uses Successive Approximation Register (SAR) supplies an approximate digital
code to DAC of Vin.
• Comparison changes digital output to bring it closer to the input value.
Successive Approximation ADC
VDAC
+8 V DAC
23 22 21 20
-
Vin 5.1V +
1 LOW
D 23 22 21 20
SAR
C 1 0 0 0
Reset
Process
1. MSB initialized as 1
2. Convert digital value to analog using DAC
3. Compares guess to analog input
4. Is Vin>VDAC
• Set bit 1
• If no, bit is 0 and test next bit
Successive Approximation ADC
+4 V DAC
23 22 21 20
-
5.1V +
2 HIGH
D 23 22 21 20
SAR
C 0 1 0 0
Process Keep
1. MSB initialized as 1
2. Convert digital value to analog using DAC
3. Compares guess to analog input
4. Is Vin>VDAC
• Set bit 1
• If no, bit is 0 and test next bit
Successive Approximation ADC
+6 V DAC
23 22 21 20
-
5.1V +
3 LOW
D 23 22 21 20
SAR
C 0 1 1 0
Process Reset
1. MSB initialized as 1
2. Convert digital value to analog using DAC
3. Compares guess to analog input
4. Is Vin>VDAC
• Set bit 1
• If no, bit is 0 and test next bit
Successive Approximation ADC
+5 V DAC
23 22 21 20
-
5.1V +
4 LOW
D 23 22 21 20
SAR
C 0 1 0 1
Process Keep
1. MSB initialized as 1
2. Convert digital value to analog using DAC
3. Compares guess to analog input
4. Is Vin>VDAC
• Set bit 1
• If no, bit is 0 and test next bit
Flash ADC
When input voltage exceeds the 2N – 1 comparators
reference voltage for a given
comparator a high is generated.
Fundamental Components (For N bit Flash A/D)
◼ 2N-1 Comparators
N
◼ 2 Resistors
◼ Control Logic
74LS148 8 to 3-bit priority encoder
Vref = 8V
Vin = 4.5 V 0
1 100
1
1
Single Slope Integration
Single Slope Integration
At the beginning of conversion, the control unit sets the output of the integrator and binary counter to zero.
Then –Vref is connected to the integrator by closing switch S1 and the counter is allowed to count at a constant
rate.
Therefore, Vint increases from zero at a constant rate.
When Vint exceeds the input voltage Vin, the comparator output changes its output level, as shown below.
Detecting this change, the control unit
stops counter and the integration.
Because the counter has been counting
from the beginning of conversion until Vint
exceeds the input Vin, the count at this
time is proportional to Vin.
Dual Slope Integration
Dual Slope Integration
Dual Slope Integration
Dual Slope Integration
ADC0804
CMOS 8-bit successive approximation A/D converter
Features
• Compatible with 8080 µP derivatives —no interfacing logic needed - access time - 135 ns
• Easy interface to all microprocessors, or operates “stand alone”
• Differential analog voltage inputs
• Logic inputs and outputs meet both MOS and TTL voltage level specifications
• Works with 2.5V (LM336) voltage reference
• On-chip clock generator
• 0V to 5V analog input voltage range with single 5V supply
• No zero adjust required
• 0.3" standard width 20-pin DIP package
• 20-pin molded chip carrier or small outline package
•Operates ratiometrically or with 5 VDC, 2.5 VDC, or analog span adjusted voltage
reference
Key Specifications
• Resolution 8 bits
• Total error ±1⁄4LSB, ±1⁄2LSB and ±1 LSB
• Conversion time 100 µs
http://www.circuitstoday.com/interfacing-adc-to-8051
The voltage at Vref/2 (pin9) of ADC0804 can be externally
adjusted to convert smaller input voltage spans to full 8 bit
resolution. Vref/2 (pin9) left open means input voltage span is 0-
5V and step size is 5/255=19.6 mV. Have a look at the table
below for different Vref/2 voltages and corresponding
analogue input voltage spans.
Steps for converting the analogue input and reading
the output from ADC0804
Make chip select (CS) signal low.
Make write (WR) signal low.
Make chip select (CS) high.
Wait for INTR pin to go low (means conversion ends).
Now keep checking the INTR pin. INTR will be 1 if conversion is not
finished and INTR will be 0 if conversion is finished.
If conversion is not finished (INTR=1) , poll until it is finished.
If conversion is finished (INTR=0), go to the next step.
Make CS=0 and send a high to low pulse to RD pin to read the data
from the ADC.
Once the conversion in ADC is done, the data is available in the output latch of
the ADC.
Below are the steps to read output from the ADC0804.
Make chip select (CS) pin low.
Make read (RD) signal low.
Read the data from port where ADC is connected.
Make read (RD) signal high.
Make chip select (CS) high.
Interfacing ADC to 8051
8051 C program for ADC0804
Relating ADC Value to Voltage