1) Explain any two bitcell figure of merits?
Soln.
Cell current:
Cell current is a deciding factor for how fast a memory can be accessed.
Current value depends on the size of PG (past-gate) and PD (pull-down) devices of the
side which is storing ‘0’.
Bitline leakage:
It delays the process of accessing the memory, by limiting the speed of differential
creation for sense amplifier.
It depends on the PG of side storing ‘0’. PG devices should be resistive when off.
2) Explain the read operation in 6T SRAM cell?
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State the figure of merits of an SRAM Cell and describe in one- or two-sentences. What
changes are seen in the cell if PG, PU and PD sizes are varied?
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12) Why is the thickness of the metal line used as Wordline more in a bit cell layout?
Ans. Worldline travels the farthest in a rectangular Bitcell layout. Therefore, to reduce the RC
delay
due to the word line, we increase the width of the word line as by increasing width resistance
will
reduce.
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Compare the SRAM with Flash Memory as write two main advantages, two limitations, main
application and mechanism for both memories.
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