CA3028A, CA3028B,

S E M I C O N D U C T O R
CA3053
Differential/Cascode Amplifiers for Commercial
November 1996 and Industrial Equipment from DC to 120MHz

Features Description
• Controlled for Input Offset Voltage, Input Offset The CA3028A and CA3028B are differential/cascode
Current and Input Bias Current (CA3028 Series Only) amplifiers designed for use in communications and industrial
equipment operating at frequencies from DC to 120MHz.
• Balanced Differential Amplifier Configuration with
Controlled Constant Current Source The CA3028B is like the CA3028A but is capable of pre-
mium performance particularly in critical DC and differential
• Single-Ended and Dual-Ended Operation
amplifier applications requiring tight controls for input offset
voltage, input offset current, and input bias current.
Applications
The CA3053 is similar to the CA3028A and CA3028B but is
• RF and IF Amplifiers (Differential or Cascode) recommended for IF amplifier applications.
• DC, Audio and Sense Amplifiers Ordering Information
• Converter in the Commercial FM Band
PART NUMBER TEMP. PKG.
• Oscillator (BRAND) RANGE (oC) PACKAGE NO.

• Mixer CA3028A -55 to 125 8 Pin Metal Can T8.C

CA3028AE -55 to 125 8 Ld PDIP E8.3
• Limiter
CA3028AM -55 to 125 8 Ld SOIC M8.15
• Related Literature (3028A)
- Application Note AN5337 “Application of the CA3028AM96 -55 to 125 8 Ld SOIC Tape M8.15
CA3028 Integrated Circuit Amplifier in the HF and (3028A) and Reel
VHF Ranges.” This note covers characteristics of CA3028B -55 to 125 8 Pin Metal Can T8.C
different operating modes, noise performance,
CA3028BE -55 to 125 8 Ld PDIP E8.3
mixer, limiter, and amplifier design considerations
CA3028BM -55 to 125 8 Ld SOIC M8.15
(3028B)
CA3053 -55 to 125 8 Pin Metal Can T8.C
CA3053E -55 to 125 8 Ld PDIP E8.3

Pinouts Schematic Diagram

CA3028A/B, CA3053 CA3028A/B, (PDIP, SOIC) (Terminal Numbers Apply to All Packages)
(METAL CAN) CA3053 (PDIP)
TOP VIEW TOP VIEW 8 6

8 1 Q1 Q2 5
1 8
1 7 R1
2 7 7
5kΩ
2 – 6 3 6
2
+ Q3
4 5
3 5 4
R2
4 2.8kΩ R3
500Ω

3
SUBSTRATE
AND CASE

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. File Number 382.3
Copyright © Harris Corporation 1996
7-6
 CA3028A, CA3028B, CA3053

Operating Conditions Thermal Information

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)
Metal Can Package . . . . . . . . . . . . . . . 225 140
PDIP Package . . . . . . . . . . . . . . . . . . . 155 N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 185 N/A
Maximum Junction Temperature (Metal Can Package) . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.

Absolute Maximum Voltage Ratings TA = 25oC

The following chart gives the range of voltages which can be applied to the terminals listed
horizontally with respect to the terminals listed vertically. For example, the voltage range of the Absolute Maximum
horizontal Terminal 4 with respect to Terminal 2 is -1V to +5V. Current Ratings
TERM TERM IIN IOUT
NO. 1 2 3 4 5 6 7 8 NO. mA mA
0 to -15 0 to -15 0 to -15 +5 to -5 Note 3 Note 3 +20 to 0
0.6 0.1
1 (Note 4) (Note 4) (Note 4) (Note 5) 1
+5 to -11 +5 to -1 +15 to 0 Note 3 +15 to 0 Note 3
4 0.1
2 (Note 6) (Note 6) 2
3 +10 to 0 +15 to 0 +30 to 0 +15 to 0 +30 to 0
0.1 23
(Note 2) (Note 6) (Note 7) (Note 6) (Note 7) 3
+15 to 0 Note 3 Note 3 Note 3
20 0.1
4 (Note 6) 4
+20 to 0 Note 3 Note 3
0.6 0.1
5 (Note 5) 5
6 Note 3 Note 3
20 0.1
6
7 Note 3
4 0.1
7
8
20 0.1
8
NOTES:
2. Terminal No. 3 is connected to the substrate and case.
3. Voltages are not normally applied between these terminals. Voltages appearing between these
terminals will be safe, if the specified voltage limits between all other terminals are not exceeded.
4. Limit is -12V for CA3053.
5. Limit is +15V for CA3053.
6. Limit is +12V for CA3053.
7. Limit is +24V for CA3028A and +18V for CA3053.

Electrical Specifications TA = 25oC

CA3028A CA3028B CA3053

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT
DC CHARACTERISTICS
Input Offset Voltage VIO VCC = 6V, VEE = -6V - - - - 0.98 5.0 - - - mV
(Figures 1, 14) VCC = 12V, VEE = -12V - - - - 0.89 5.0 - - - mV
Input Offset Current IIO VCC = 6V, VEE = -6V - - - - 0.56 5.0 - - - µA
(Figures 2, 14) VCC = 12V, VEE = -12V - - - - 1.06 6.0 - - - µA
Input Bias Current II VCC = 6V, VEE = -6V - 16.6 70 - 16.6 40 - - - µA
(Figures 2, 3, 15, 16) VCC = 12V, VEE = -12V - 36 106 - 36 80 - - - µA
VCC = 9V - - - - - - 29 85 µA
VCC = 12V - - - - - - - 36 125 µA

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 CA3028A, CA3028B, CA3053

Electrical Specifications TA = 25oC (Continued)

CA3028A CA3028B CA3053

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT
Quiescent Operating I6, I8 VCC = 6V, VEE = -6V 0.8 1.25 2.0 1.0 1.25 1.5 - - - mA
Current (Figures 2, 3, 17, VCC = 12V, VEE = -12V 2.0 3.3 5.0 2.5 3.3 4.0 - - - mA
18, 19)
VCC = 9V - - - - - - 1.2 2.2 3.5 mA
VCC = 12V - - - - - - 2.0 3.3 5.0 mA
AGC Bias Current I7 VCC = 12V, VAGC = 9V - 1.28 - - 1.28 - - - - mA
(Into Constant Current VCC = 12V, VAGC = 12V - 1.65 - - 1.65 - - - - mA
Source Terminal 7)
VCC = 9V - - - - - - - 1.15 - mA
(Figures 4, 20)
VCC = 12V - - - - - - - 1.55 - mA
Input Current I7 VCC = 6V, VEE = -6V 0.5 0.85 1.0 0.5 0.85 1.0 - - - mA
(Terminal 7) VCC = 12V, VEE = -12V 1.0 1.65 2.1 1.0 1.65 2.1 - - - mA
Power Dissipation PT VCC = 6V, VEE = -6V 24 36 54 24 36 42 - - - mW
(Figures 2, 3, 21) VCC = 12V, VEE = -12V 120 175 260 120 175 220 - - - mW
VCC = 9V - - - - - - - 50 80 mW
VCC = 12V - - - - - - - 100 150 mW
DYNAMIC CHARACTERISTICS
Power Gain (Figures 5, GP f = 100MHz Cascode 16 20 - 16 20 - - - - dB
6, 7, 22, 24, 26) VCC = 9V Diff. Amp. 14 17 - 14 17 - - - - dB
f = 10.7MHz Cascode 35 39 - 35 39 - 35 39 - dB
(Note 8)
VCC = 9V Diff. Amp. 28 32 - 28 32 - 28 32 - dB
(Note 8)
Noise Figure (Figures 5, NF f = 100MHz, Cascode - 7.2 9.0 - 7.2 9.0 - - - dB
6, 7, 23, 25, 26) VCC = 9V Diff. Amp. - 6.7 9.0 - 6.7 9.0 - - - dB
Input Admittance Y11 f = 10.7MHz, Cascode - 0.6 + - - 0.6 + - - 0.6 + - mS
(Figures 27, 28) VCC = 9V j1.6 j1.6 j1.6
Diff. Amp. - 0.5 + - - 0.5 + - - 0.5 + - mS
j0.5 j0.5 j0.5
Reverse Transfer Y12 f = 10.7MHz, Cascode - 0.0003 - - 0.0003 - - 0.0003 - mS
Admittance VCC = 9V - j0 - j0 - j0
(Figures 29, 30) Diff. Amp. - 0.01 - - - 0.01 - - - 0.01 - - mS
j0.0002 j0.0002 j0.0002
Forward Transfer Y21 f = 10.7MHz, Cascode - 99 - - - 99 - - - 99 - - mS
Admittance VCC = 9V j18 j18 j18
(Figures 31, 32) Diff. Amp. - -37 + - - -37 + - - -37 + - mS
j0.5 j0.5 j0.5
Output Admittance Y22 f = 10.7MHz, Cascode - 0+ - - 0+ - - 0+ - mS
(Figures 33, 34) VCC = 9V j0.08 j0.08 j0.08
Diff. Amp. - 0.04 + - - 0.04 + - - 0.04 + - mS
j0.23 j0.23 j0.23
Output Power (Untuned) PO f = 10.7MHz, Diff. Amp., - 5.7 - - 5.7 - - - - µW
(Figures 8, 35) VCC = 9V 50Ω Input-
Output
AGC Range (Maximum AGC f = 10.7MHz, Diff. Amp. - 62 - - 62 - - - - dB
Power Gain to Full Cut- VCC = 9V
off) (Figures 9, 36)
Voltage Gain A f = 10.7MHz, Cascode - 40 - - 40 - - 40 - dB
(Figures 10, 11, 37, 38) VCC = 9V, Diff. Amp. - 30 - - 30 - - 30 - dB
RL = 1kΩ
Differential Voltage Gain A VCC = 6V, VEE = -6V, - - - 35 38 42 - - - dB
at f = 1kHz (Figure 12) RL = 2kΩ
VCC = 12V, VEE = -12V, - - - 40 42.5 45 - - - dB
RL = 1.6kΩ

7-8
 CA3028A, CA3028B, CA3053

Electrical Specifications TA = 25oC (Continued)

CA3028A CA3028B CA3053

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT
Max Peak-to-Peak VO(P-P) VCC = 6V, VEE = -6V, - - - 7.0 11.5 - - - - VP-P
Output Voltage at f = 1kHz RL = 2kΩ
(Figure 12) VCC = 12V, VEE = -12V, - - - 15 23 - - - - VP-P
RL = 1.6kΩ
Bandwidth at -3dB Point BW VCC = 6V, VEE = -6V, - - - - 7.3 - - - - MHz
(Figure 12) RL = 2kΩ
VCC = 12V, VEE = -12V, - - - - 8.0 - - - - MHz
RL = 1.6kΩ
Common Mode Input VCMR VCC = 6V, VEE = -6V - - - -2.5 -3.2 to 4 - - - V
Voltage Range -4.5
(Figure 13) VCC = 12V, VEE = -12V - - - -5.0 -7 to 7 - - - V
-9
Common Mode Rejec- CMRR VCC = 6V, VEE = -6V - - - 60 110 - - - - dB
tion Ratio (Figure 13) VCC = 12V, VEE = -12V - - - 60 90 - - - - dB
Input Impedance at ZIN VCC = 6V, VEE = -6V - - - - 5.5 - - - - kΩ
f = 1kHz VCC = 12V, VEE = -12V - - - - 3.0 - - - - kΩ
Peak-to-Peak Output IP-P f = 10.7MHz, VCC = 9V 2.0 4.0 7.0 2.5 4.0 6.0 2.0 4.0 7.0 mA
Current eIN = VCC = 12V 3.5 6.0 10 4.5 6.0 8.0 3.5 6.0 10 mA
400mV,
Diff. Amp.
NOTE:
8. Does not apply to CA3053.

Test Circuits
VCC VCC

3µF 1kΩ 1kΩ 3µF

+ +
I6 I8
DC DIFF.
VOLTMETER - -
270Ω VOUT FLUKE TYPE
6 80 OR EQUIV. 6
2.7Ω 8 8
2.7Ω
-
3V 1 1
+ R1 ICUT ICUT
2.7Ω 2.7Ω -
10Ω
I1
3
3 +
270Ω NOTE 9 7 +
7
5
5 - I3
VIO DC -
VTVM -
NOTE 10 3µF + I7
+ I5 3µF
VEE
VEE

NOTES: NOTE: Power Dissipation = I3 V EE + ( I 6 + I 8 )V CC .

9. Adjust R1 for VOUT = 0V ±0.1V.
10. Record Input Offset Voltage.
FIGURE 1. INPUT OFFSET VOLTAGE TEST CIRCUIT FOR FIGURE 2. INPUT OFFSET CURRENT, INPUT BIAS CURRENT,
CA3028B POWER DISSIPATION, AND QUIESCENT
OPERATING CURRENT TEST CIRCUIT FOR
CA3028A AND CA3028B

7-9
 CA3028A, CA3028B, CA3053

Test Circuits (Continued)

VCC

I7
1kΩ

7 I8

I1 8
5 1kΩ
1
VCC
CA3053 6 1
ICUT 2kΩ
5
8 3
I5 6
7
3 I6
2kΩ
I7
I3

5kΩ
VCC

NOTE: Power Dissipation = VCCI3.

FIGURE 3. INPUT BIAS CURRENT, POWER DISSIPATION AND FIGURE 4. AGC BIAS CURRENT TEST CIRCUIT (DIFFERENTIAL
QUIESCENT OPERATING CURRENT TEST CIRCUIT AMPLIFIER CONFIGURATION) FOR CA3028A AND
FOR CA3053 CA3028B

VCC VCC
0.001
7 1kΩ µF 8 1kΩ
L2 L2
7
470pF 5 C1
2 6 1 6
C1 C2 C2
ICUT 8 ICUT
L1
L1 1 50Ω RF 3 5 50Ω RF
VOLTMETER VOLTMETER
4 (NOTE 11) OR (NOTE 14 OR
3 NOISE AMP 50Ω SIGNAL NOISE AMP
50Ω SIGNAL 0.001µF
2kΩ (NOTE 12) SOURCE (NOTE 15)
SOURCE 0.001µF (NOTE 14) OR
(NOTE 11) OR
NOISE DIODE
NOISE DIODE (NOTE 15)
(NOTE 12) 0.001µF 2kΩ

f C1 C2 L1 L2 f C1 C2 L1 L2
(MHz) (pF) (pF) (µH) (µH) (MHz) (pF) (pF) (µH) (µH)

10.7 20 - 60 20 - 60 3-5 3-5 10.7 30 - 60 20 - 50 3-6 3-6

100 3 - 30 3 - 30 0.1 - 0.25 0.15 - 0.3 100 2 - 15 2 - 15 0.2 - 0.5 0.2 - 0.5

NOTES: NOTES:
11. For Power Gain Test. 14. For Power Gain Test.
12. For Noise Figure Test. 15. For Noise Figure Test.
13. 10.7MHz Power Gain Test Only. 16. 10.7MHz Power Gain Test Only.
FIGURE 5. POWER GAIN AND NOISE FIGURE TEST CIRCUIT FIGURE 6. POWER GAIN AND NOISE FIGURE TEST CIRCUIT
(CASCODE CONFIGURATION) FOR CA3028A, (DIFFERENTIAL AMPLIFIER CONFIGURATION
CA3028B AND CA3053 (NOTE 3) AND TERMINAL 7 CONNECTED TO VCC) FOR
CA3028A, CA3028B AND CA3053 (NOTE 3)

7-10
 CA3028A, CA3028B, CA3053

Test Circuits (Continued)

5kΩ
VCC

7 1kΩ
L2
8
C1
1 6
C2
ICUT
L1
3 5
50Ω RF
VOLTMETER
(NOTE 17) OR
NOISE AMP
50Ω SIGNAL (NOTE 18)
SOURCE
(NOTE 17) OR
NOISE DIODE VCC
(NOTE 18) 0.001µF 2kΩ VCC

1kΩ

f C1 C2 L1 L2 5 7
(MHz) (pF) (pF) (µH) (µH) 0.01 2kΩ 50Ω 8
µF
ICUT 0.01
10.7 30 - 60 20 - 50 3-6 3-6 1 µF
6
100 2 - 15 2 - 15 0.2 - 0.5 0.2 - 0.5 3
INPUT 0.01µF
NOTES: 50Ω
OUTPUT
17. For Power Gain Test.
18. For Noise Figure Test. 0.01µF

FIGURE 7. POWER GAIN AND NOISE FIGURE TEST CIRCUIT FIGURE 8. OUTPUT POWER TEST CIRCUIT FOR CA3028A
(DIFFERENTIAL AMPLIFIER CONFIGURATION) AND CA3028B
FOR CA3028A AND CA3028B

5kΩ
VCC VCC

7 1kΩ
L2 10Ω
8
C1 C2
1 6
50Ω 50Ω RF 1kΩ LOAD
SIGNAL ICUT VOLTMETER
SOURCE L1
3 5 8

7
OUTPUT
1 6
0.001µF 2kΩ INPUT
2 ICUT 5
50Ω 0.01µF 1kΩ
3
f C1 C2 L1 L2
0.01µF 0.01µF
(MHz) (pF) (pF) (µH) (µH) 4
2kΩ
10.7 30 - 60 20 - 50 3-6 3-6
0.01µF
100 2 - 15 2 - 15 0.2 - 0.5 0.2 - 0.5

FIGURE 9. AGC RANGE TEST CIRCUIT (DIFFERENTIAL FIGURE 10. TRANSFER CHARACTERISTIC (VOLTAGE GAIN) TEST
AMPLIFIER) FOR CA3028A AND CA3028B CIRCUIT (10.7MHz) CASCODE CONFIGURATION FOR
CA3028A, CA3028B AND CA3053

7-11
 CA3028A, CA3028B, CA3053

Test Circuits (Continued)

VCC

VCC R OSCILLOSCOPE
(NOTE) WITH HIGH
3µF GAIN DIFF. INPUT
R
(NOTE) (TEKTRONIX TYPE
10Ω VDIFF 530, 540, OR 580
WITH TYPE D
(RMS) PLUG-IN
TEKTRONIX
TYPE 502 OR
1kΩ LOAD 6 EQUIVALENT)
5µF
8
8 1

7
0.01µF OUTPUT 50Ω ICUT
INPUT VIN = 10mV
1 6
(RMS)
50Ω 3
ICUT 5 INPUT
SIGNAL 7
1kΩ
3 f = 1kHz 5
0.01µF 3µF
10µH
2kΩ
VEE
0.001µF
NOTE: For R = 1.6kΩ: VCC = 12V, VEE = -12V
For R = 2.0kΩ: VCC = 6V, VEE = -6V.
FIGURE 11. TRANSFER CHARACTERISTIC (VOLTAGE GAIN) FIGURE 12. DIFFERENTIAL VOLTAGE GAIN, MAXIMUM PEAK-
TEST CIRCUIT (10.7MHz) DIFFERENTIAL TO-PEAK OUTPUT VOLTAGE AND BANDWIDTH
AMPLIFIER CONFIGURATION FOR CA3028A, TEST CIRCUIT FOR CA3028B
CA3028B AND CA3053

VCC

3µF OSCILLOSCOPE
1kΩ 1kΩ WITH HIGH
GAIN DIFF. INPUT
(TEKTRONIX TYPE
530, 540, OR 580
VDIFF WITH TYPE D
6 (RMS) PLUG-IN
5µF TEKTRONIX
8 TYPE 502 OR
1 EQUIVALENT)
500Ω
INPUT 5 ICUT
SIGNAL S1
f = 1kHz
7
3

VIN = 0.3V
3µF
(RMS)
VEE

VX RANGE
OF COMMON
MODE REJECTION
NOTES:
19. For CMR test: S1 to GND.
20. For Input Common Mode Voltage Range Test: S1 to VX.

( A ) ( 2 ) ( 0.3 )
21. Common Mode Rejection Ratio = 20log 10 -------------------------------------
V DIFF ( RMS )
A = Single-Ended Voltage Gain.

FIGURE 13. COMMON MODE REJECTION RATIO AND COMMON MODE INPUT VOLTAGE RANGE TEST CIRCUIT FOR CA3028B

7-12
 CA3028A, CA3028B, CA3053

Typical Performance Curves

POSITIVE DC SUPPLY VOLTS (VCC) POSITIVE DC SUPPLY VOLTS (VCC)

NEGATIVE DC SUPPLY VOLTS (VEE) NEGATIVE DC SUPPLY VOLTS (VEE)
75.0
INPUT OFFSET VOLTAGE (mV),
INPUT OFFSET CURRENT (µA)

INPUT BIAS CURRENT (µA)

62.5

2.0 OFFSET CURRENT 50.0

VCC = +12V
VEE = -12V
1.5 VCC = +12V 37.5
VCC = +6V VEE = -12V
VEE = -6V
1.0 25.0
VCC = +6V
VEE = -6V
0.5 12.5

0 0
-75 -50 -25 0 25 50 75 100 125 -75 -50 -25 0 25 50 75 100 125
TEMPERATURE (oC) TEMPERATURE (oC)

FIGURE 14. INPUT OFFSET VOLTAGE AND INPUT OFFSET FIGURE 15. INPUT BIAS CURRENT vs TEMPERATURE FOR
CURRENT FOR CA3028B vs TEMPERATURE CA3028A AND CA3028B

POSITIVE DC SUPPLY VOLTS (VCC ) DIFFERENTIAL AMPLIFIER CONFIGURATION

QUIESCENT OPERATING CURRENT (mA)
75.0
INPUT BIAS CURRENT (µA)

62.5

50.0 3.5 VEE = -12V

VCC = +12V
37.5
VCC = +9V
25.0 2.5 VEE = -9V

12.5

0 1.5
-75 -50 -25 0 25 50 75 100 125
-75 -50 -25 0 25 50 75 100 125
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE 16. INPUT BIAS CURRENT vs TEMPERATURE FOR FIGURE 17. QUIESCENT OPERATING CURRENT vs
CA3053 TEMPERATURE FOR CA3028A AND CA3028B

3.5
DIFFERENTIAL AMPLIFIER CONFIGURATION VCC = 6V
OPERATING CURRENT, I6 OR I8 (mA)
QUIESCENT OPERATING CURRENT (mA)

3.0

2.5

3.5 VCC = +12V 2.0

1.5

2.5 1.0
VCC = +9V

0.5

1.5 0
-75 -50 -25 0 25 50 75 100 125 0 -5 -10 -15 -20
TEMPERATURE (oC) DC EMITTER SUPPLY (V)
FIGURE 18. QUIESCENT OPERATING CURRENT vs FIGURE 19. OPERATING CURRENT vs VEE VOLTAGE FOR
TEMPERATURE FOR CA3053 CA3028A AND CA3028B

7-13
 CA3028A, CA3028B, CA3053

Typical Performance Curves (Continued)

DIFFERENTIAL AMPLIFIER CONFIGURATION

TOTAL POWER DISSIPATION, ±6V (mW)

TA = 25oC

TOTAL POWER DISSIPATION, ±12V (mW)

180 40
VCC = +12V
VEE = -12V

2
AGC BIAS CURRENT (mA)

170 35
VCC = +6V
VEE = -6V

1
160 30

150 25
0 -50 -25 0 25 50 75 100 125
0 2 4 6 8 10 12
AGC BIAS, TERMINAL NO. 7 (V) TEMPERATURE (oC)

FIGURE 20. AGC BIAS CURRENT vs BIAS VOLTAGE FIGURE 21. POWER DISSIPATION vs TEMPERATURE FOR
(TERMINAL 7) FOR CA3028A AND CA3028B CA3028A AND CA3028B

CASCODE CONFIGURATION CASCODE CONFIGURATION

45 TA = 25oC TA = 25oC, f = 100MHz

40
VCC = +12V
35
POWER GAIN (dB)

30 9
NOISE FIGURE (dB)

25 VCC = +9V
8
20

15 7

10
6
5
0 5
10 20 30 40 50 60 70 80 90 100 9 10 11 12
FREQUENCY (MHz) DC COLLECTOR SUPPLY VOLTAGE (V)

FIGURE 22. POWER GAIN vs FREQUENCY (CASCODE FIGURE 23. 100MHz NOISE FIGURE vs COLLECTOR SUPPLY
CONFIGURATION) FOR CA3028A AND CA3028B VOLTAGE (CASCODE CONFIGURATION)
FOR CA3028A AND CA3028B

DIFFERENTIAL
DIFFERENTIAL AMPLIFIER
AMPLIFIER CONFIGURATION
CONFIGURATION DIFFERENTIAL AMPLIFIER CONFIGURATION
40 TA = 25oC TA = 25oC, f = 100MHz

35

30 VCC = +12V
POWER GAIN (dB)

25 9
NOISE FIGURE (dB)

20 VCC = +9V 8
15
7
10
6
5

0 5
10 20 30 40 50 60 70 80 90 100 9 10 11 12
FREQUENCY (MHz) DC COLLECTOR SUPPLY VOLTAGE (V)

FIGURE 24. POWER GAIN vs FREQUENCY (DIFFERENTIAL FIGURE 25. 100MHz NOISE FIGURE vs COLLECTOR SUPPLY
AMPLIFIER CONFIGURATION) FOR CA3028A AND VOLTAGE (DIFFERENTIAL AMPLIFIER
CA3028B CONFIGURATION) FOR CA3028A AND CA3028B

7-14
 CA3028A, CA3028B, CA3053

Typical Performance Curves (Continued)

CASCODE CONFIGURATION, TA = 25oC

NOISE FIGURE (dB) OR POWER GAIN (dB)

DIFFERENTIAL AMPLIFIER CONFIGURATION

TA = 25oC, VCC = +9V, f = 100MHz IC(STAGE) = 4.5mA, VCC = +9V
7

INPUT CONDUCTANCE (g11) OR

SUSCEPTANCE (b11) (mS)
6
20
POWER GAIN 5
15
4
b11
10 3

NOISE FIGURE 2
5 g11
1

0 0
9 8 7 6 5 4 3 2 1 10 100
POSITIVE DC BIAS VOLTAGE (V) FREQUENCY (MHz)

FIGURE 26. 100MHz NOISE FIGURE AND POWER GAIN vs FIGURE 27. INPUT ADMITTANCE (Y11) vs FREQUENCY
BASE-TO-EMITTER BIAS VOLTAGE (TERMINAL 7) (CASCODE CONFIGURATION)
FOR CA3028A AND CA3028B

DIFFERENTIAL AMPLIFIER CONFIGURATION REVERSE TRANSFER CONDUCTANCE (g12) CASCODE CONFIGURATION, TA = 25oC
TA = 25oC, VCC = +9V IC(STAGE) = 4.5mA, VCC = +9V
3 IC OF EACH TRANSISTOR = 2.2mA 20
OR SUSCEPTANCE (b12) (µS)
INPUT CONDUCTANCE (g11) OR

15
SUSCEPTANCE (b11) (mS)

10
2 g12
5

b11 0
b12
-5
1 g11
-10

-15

0 -20
1 10 100 1 10 100
FREQUENCY (MHz) FREQUENCY (MHz)

FIGURE 28. INPUT ADMITTANCE (Y11) vs FREQUENCY FIGURE 29. REVERSE TRANSADMITTANCE (Y12) vs
(DIFFERENTIAL AMPLIFIER CONFIGURATION) FREQUENCY (CASCODE CONFIGURATION)
FORWARD TRANSFER CONDUCTANCE (g21)
REVERSE TRANSFER CONDUCTANCE (g12)

DIFFERENTIAL AMPLIFIER CONFIGURATION CASCODE CONFIGURATION, TA = 25oC

TA = 25oC, VCC = +9V IC(STAGE) = 4.5mA, VCC = +9V
OR SUSCEPTANCE (b21) (mS)
OR SUSCEPTANCE (b12) (mS)

0.3 IC OF EACH TRANSISTOR = 2.2mA 100

0.2 80
g12 g21
60
0.1 40
20
0
0
b12
-0.1 -20 b21
-40
-0.2
-60
-0.3 -80
10 20 30 40 50 60 80 100 200 300 1 2 3 4 5 6 7 8 910 100
FREQUENCY (MHz) FREQUENCY (MHz)

FIGURE 30. REVERSE TRANSADMITTANCE (Y12) vs FIGURE 31. FORWARD TRANSADMITTANCE (Y21) vs
FREQUENCY (DIFFERENTIAL AMPLIFIER FREQUENCY (CASCODE CONFIGURATION)
CONFIGURATION)

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 CA3028A, CA3028B, CA3053

Typical Performance Curves

FORWARD TRANSFER CONDUCTANCE (g21) (Continued)

DIFFERENTIAL AMPLIFIER CONFIGURATION CASCODE CONFIGURATION, TA = 25oC

TA = 25oC, VCC = +9V IC(STAGE) = 4.5mA, VCC = +9V

OUTPUT CONDUCTANCE (g22) (mS)

OUTPUT SUSCEPTANCE (b22) (mS)

IC OF EACH TRANSISTOR = 2.2mA 3
OR SUSCEPTANCE (b21) (mS)

30
b22 2
20
b21 1
10
0 0
0
-0.02
g22
-10
-0.04
-20 g21 -0.06
-30 -0.08

-40
1 10 100 1 10 100
FREQUENCY (MHz) FREQUENCY (MHz)

FIGURE 32. FORWARD TRANSADMITTANCE (Y21) vs FIGURE 33. OUTPUT ADMITTANCE (Y22) vs FREQUENCY
FREQUENCY (DIFFERENTIAL AMPLIFIER (CASCODE CONFIGURATION)
CONFIGURATION)

DIFFERENTIAL AMPLIFIER CONFIGURATION, DIFFERENTIAL AMPLIFIER CONFIGURATION

TA = 25oC 10 TA = 25oC, CONSTANT POWER INPUT = 2µW
IC OF EACH TRANSISTOR = 2.2mA, VCC = +9V
OUTPUT CONDUCTANCE (g22) (mS)

2
OUTPUT SUSCEPTANCE (b22) (mS)

OUTPUT POWER (µW)

VCC = +12V
0.6 1.5
b22
0.5
0.4 1.0
VCC = +9V
0.3
0.2 g22 0.5

0.1
0 0 1
1 10 100 10 100
FREQUENCY (MHz) FREQUENCY (MHz)

FIGURE 34. OUTPUT ADMITTANCE (Y22) vs FREQUENCY FIGURE 35. OUTPUT POWER vs FREQUENCY - 50Ω INPUT
(DIFFERENTIAL AMPLIFIER CONFIGURATION) AND 50Ω OUTPUT (DIFFERENTIAL AMPLIFIER
CONFIGURATION) FOR CA3028A AND CA3028B

DIFFERENTIAL AMPLIFIER CONFIGURATION CASCODE CONFIGURATION

TA = 25oC, VCC = +9V TA = 25oC, f = 10.7MHz
5

40 4 VCC = +12V
OUTPUT VOLTAGE (V)

f = 10.7MHz
VCC = +9V
POWER GAIN (dB)

20 3

100MHz
0 2

-20 1

-40 0
9 8 7 6 5 4 3 2 1 0 0 0.05 0.1 0.15
DC BIAS VOLTAGE ON TERMINAL NO. 7 (V) INPUT VOLTAGE (V)

FIGURE 36. AGC CHARACTERISTICS FOR CA3028A AND FIGURE 37. TRANSFER CHARACTERISTICS (CASCODE
CA3028B CONFIGURATION)

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 CA3028A, CA3028B, CA3053

Typical Performance Curves (Continued)

3.0
DIFFERENTIAL AMPLIFIER CONFIGURATION
TA = 25oC, f = 10.7MHz
2.5

OUTPUT VOLTAGE (V)

2.0 VCC = +12V

1.5
VCC = +9V
1.0

0.5

0 0.05 0.1 0.15

INPUT VOLTAGE (V)

FIGURE 38. TRANSFER CHARACTERISTICS (DIFFERENTIAL AMPLIFIER CONFIGURATION)

Glossary of Terms
AGC Bias Current Input Offset Voltage
The current drawn by the device from the AGC voltage The difference in the DC voltages which must be applied to
source, at maximum AGC voltage. the input terminals to obtain equal quiescent operating
voltages (zero output offset voltage) at the output terminals.
AGC Range
Noise Figure
The total change in voltage gain (from maximum gain to
complete cutoff) which may be achieved by application of the The ratio of the total noise power of the device and a
specified range of dc voltage to the AGC input terminal of resistive signal source to the noise power of the signal
the device. source alone, the signal source representing a generator of
zero impedance in series with the source resistance.
Common Mode Rejection Ratio
Power Gain
The ratio of the full differential voltage gain to the common
mode voltage gain. The ratio of the signal power developed at the output of the
device to the signal power applied to the input, expressed in
Power Dissipation
dB.
The total power drain of the device with no signal applied
Quiescent Operating Current
and no external load current.
The average (DC) value of the current in either output
Input Bias Current
terminal.
The average value (one half the sum) of the currents at the
Voltage Gain
two input terminals when the quiescent operating voltages at
the two output terminals are equal. The ratio of the change in output voltage at either output
terminal with respect to ground, to a change in input voltage
Input Offset Current
at either input terminal with respect to ground, with the other
The difference in the currents at the two input terminals input terminal at AC ground.
when the quiescent operating voltages at the two output ter-
minals are equal.

7-17