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Paging: Conversion of Logical Address Into Physical Address

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0% found this document useful (0 votes)
333 views2 pages

Paging: Conversion of Logical Address Into Physical Address

Uploaded by

kamaulinet77
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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PAGING

 The paging technique divides the physical memory(main memory) into fixed-size blocks
that are known as Frames and also divide the logical memory(secondary memory)
into blocks of the same size that are known as Pages.

 It enables Operating System to transfer data between physical memory(frames) and


secondary memory(pages)

 It reduces memory wastage and removes external fragmentation but the problem of
internal fragmentation persists due to partially filled pages.

Conversion of Logical Address into Physical Address


The mapping from virtual to physical address is done by the Memory Management Unit
(MMU) which is a hardware device and this mapping is known as the paging technique.

The address generated by the CPU is divided into

1. Page number(p): It represents the address in the the Physical memory. Index to the
page table

2. Page offset(d): specify the specific word on the page that the CPU wants to read.

The Physical Address also consists of two parts:

1. Frame number(f): - It is the number of bits required to represent a frame in the Physical
Address Space. It is the location of the required page inside the Main Memory.

2. Frame offset(d): - It is the page size or the number of bits required to represent a word
in a frame. It is equal to the Page Offset.

Page Table
It is an array that maps from virtual page number to physical page number eg: VP0-PF3.
Advantages of Paging

Protection and sharing of memory-protection bits

Paging helps in storing a process at non-contagious locations in the main memory.

Paging removes the problem of External Fragmentation.

Disadvantages of Paging

It may cause Internal Fragmentation.

More Memory is consumed by the Page Tables.

It faces a longer memory lookup time.

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