1.

Design a 3-bit synchronous down counter using JK Flip-Flop

A 3-bit synchronous down counter counts from 7 to 0 in binary. For a down counter, the JK
Flip-Flop should be configured in a way that it decrements the count every clock pulse.

JK Flip-Flop Truth Table for Down Counting:

• For counting down, the J and K inputs should be configured such that the flip-flops
toggle on every clock pulse, except when the counter reaches zero.

Steps:

1. We need 3 JK flip-flops for a 3-bit counter. The output of each flip-flop represents a
bit in the binary number (Q2, Q1, Q0).
2. The Q output from each flip-flop determines the current state of the counter.
3. The JK inputs for the flip-flops are connected to the logic gates (AND, OR, NOT) to
ensure the correct counting sequence.

Logic Diagram:

1. Flip-flop 1 (least significant bit, Q0) toggles with every clock pulse, so set J0 = K0 =
1.
2. Flip-flop 2 (middle bit, Q1) toggles when Q0 is high, so connect the output Q0 to the
clock of Q1.
3. Flip-flop 3 (most significant bit, Q2) toggles when both Q0 and Q1 are high, so
connect both Q0 and Q1 to the clock of Q2.

Final Counter Logic:

• J0 = K0 = 1 for the first flip-flop.

• J1 = K1 = Q0 for the second flip-flop.
• J2 = K2 = Q0 AND Q1 for the third flip-flop.

2. Describe in detail the different encoders with neat diagram

Encoders are devices used to convert data from one format to another, often from a higher
number of bits to a lower number of bits.

Types of Encoders:

1. Binary Encoder:
o Converts 2^n inputs into an n-bit binary code.
o For example, a 4-to-2 binary encoder converts 4 input lines into 2 output lines.

Diagram:

Input Output
I0 I1 I2 I3 O1 O0
 0 0 0 1 1 1 (I3 is active)
0 0 1 0 1 0 (I2 is active)
0 1 0 0 0 1 (I1 is active)
1 0 0 0 0 0 (I0 is active)

2. Priority Encoder:
o Similar to binary encoder, but it also handles multiple active inputs. It gives
priority to the highest numbered input.

Diagram:

Input Output (3-bit)

I0 I1 I2 I3 O2 O1 O0
0 0 0 1 0 0 1 (I3 is active)
0 0 1 0 0 1 0 (I2 is active)
0 1 0 0 1 0 0 (I1 is active)
1 0 0 0 1 0 1 (I0 is active)

3. Decimal to BCD Encoder:

o Converts decimal input into a Binary Coded Decimal (BCD) output.
o It outputs a 4-bit binary code for decimal digits (0-9).
4. ASCII Encoder:
o Converts characters into their corresponding ASCII code.

3. Describe in detail about the SR flip-flop with neat diagram and truth table

An SR Flip-Flop (Set-Reset Flip-Flop) has two inputs: S (Set) and R (Reset), and two
outputs: Q and Q' (complement of Q).

Truth Table:

S R Q (Next State) Q' (Complement)

0 0 No Change No Change
01 0 1
10 1 0
1 1 Invalid Invalid

Diagram:

• The SR flip-flop consists of cross-coupled NOR gates or NAND gates.

SR NOR Flip-Flop:

S ->| NOR |-> Q

| |
| |-> Q'
R ->| NOR |-> Q'
| |
4. Elaborate with neat sketch SISO, SIPO shift register

SISO (Serial In, Serial Out) Shift Register:

• Data enters serially at the input and is shifted out serially at the output.

Diagram:

----[ FF1 ]----[ FF2 ]----[ FF3 ]----[ FF4 ]----

| S1 | S2 | S3 | S4 |
----[ Q1 ]----[ Q2 ]----[ Q3 ]----[ Q4 ]----

• SISO Shift Register shifts data from one flip-flop to the next on each clock pulse.

SIPO (Serial In, Parallel Out) Shift Register:

• Data enters serially at the input and is shifted out parallelly from each flip-flop.

Diagram:

----[ FF1 ]----[ FF2 ]----[ FF3 ]----[ FF4 ]----

| S1 | S2 | S3 | S4 |
----[ Q1 ]----[ Q2 ]----[ Q3 ]----[ Q4 ]----
| | | |
Q1 Q2 Q3 Q4

• In a SIPO register, data is read simultaneously from each flip-flop.

5. Describe in detail the various blocks involved in a basic functional

organisation of a computer system

A basic computer system includes the following main components:

1. Central Processing Unit (CPU):

o ALU (Arithmetic Logic Unit): Performs arithmetic and logical operations.
o Control Unit: Coordinates the activities of the computer and controls the flow
of data.
2. Memory Unit:
o Primary Memory (RAM): Stores data and instructions currently in use.
o Secondary Memory: Stores large amounts of data persistently (e.g., hard
drives).
3. Input Devices:
o Allow the user to interact with the system (e.g., keyboard, mouse).
4. Output Devices:
o Present data to the user (e.g., monitor, printer).
5. Bus System:
o Data Bus: Carries data between components.
o Address Bus: Carries addresses from CPU to memory.
o Control Bus: Carries control signals.
6. Analyse the different addressing modes used by the processor with an
example for each

Addressing Modes:

1. Immediate Addressing:
o Operand is directly specified in the instruction.
o Example: MOV R1, #5 (move the value 5 to register R1).
2. Register Addressing:
o Operand is in a register.
o Example: ADD R1, R2 (add the value in R2 to R1).
3. Direct Addressing:
o The address of the operand is given explicitly.
o Example: MOV R1, [1000] (move the value at memory address 1000 to R1).
4. Indirect Addressing:
o The address of the operand is specified by a register.
o Example: MOV R1, [R2] (move the value at the memory address in R2 to
R1).
5. Indexed Addressing:
o The effective address is the sum of a base address and an offset.
o Example: MOV R1, [R2 + 10].

7. Compare the process of a Hardwired Control Unit and Micro-Programmed

Control Unit

Hardwired Control Unit:

• Uses combinational logic circuits to produce control signals.

• Faster, but less flexible and harder to modify.
• Fixed control paths for each instruction.

Micro-Programmed Control Unit:

• Uses a set of stored instructions (micro-operations) to produce control signals.

• Slower but more flexible and easier to modify.

8. Elucidate the working principle of Micro-programmed Control unit and

Hardwired Control unit. Analyse the merits and demerits

• Hardwired Control:
o Fixed logic circuits control the operation.
o Merits: Faster, more efficient for specific tasks.
o Demerits: Less flexible and difficult to modify.
 • Micro-programmed Control:
o Uses a control memory (ROM) to store control words.
o Merits: Easier to design and modify, more flexible.
o Demerits: Slower due to additional memory access.

9. Discuss in detail the types of Addressing modes in a Computer Network

Addressing modes in a network can refer to how data is routed and how devices are
addressed:

1. MAC Addressing: Uses physical addresses assigned to network interfaces.

2. IP Addressing: Logical addresses used in networking (IPv4, IPv6).
3. Port Addressing: Used to identify specific services on a device in TCP/IP
communications.

10. Determine a Synchronous decade counter using D Flip-Flop with the help
of its excitation table

A synchronous decade counter counts from 0 to 9. Use D flip-flops and the excitation table
to design it. The excitation table maps the current state to the required input for the D flip-
flop.

11. Explain MOD 6 synchronous counter with its logic diagram

A MOD-6 counter counts from 0 to 5. You can implement this using flip-flops and
combinational logic to reset the counter after reaching 5.

12. Determine a Synchronous decade counter using T Flip-Flop with the help
of its excitation table

Similar to the design with D flip-flops, but for a T flip-flop, you need to derive the required
toggle behavior from the excitation table.

13. Explain MOD 6 RIPPLE counter with its logic diagram

A MOD-6 ripple counter counts from 0 to 5, where the output of each flip-flop is used to
trigger the next flip-flop in a ripple fashion. This is typically slower due to the propagation
delay between flip-flops.