Edc Lab Manual
Edc Lab Manual
CIRCUITS LABORATORY
REGULATION : 2021
ECE
LIST OF EXPERIMENTS
CIRCUIT DIAGRAM:
FORWARD BIAS
REVERSE BIAS
EXPERIMENT NO: 1
To plot the Volt Ampere characteristics of PN junction diode under forward and
reverse bias condition and to find the cut-in voltage, static resistance, dynamic
resistance under forward and reverse bias.
APPARATUS REQUIRED:
Sl.N
COMPONENTS / EQUIPMENTS SPECIFICATIONS QUANTITY
o
1. Diode-PN IN4007 1
2. Resistors 1KΩ 1
3. Dual Regulated Power Supply (0-30)V 1
MC(0-1)V 1
4. Voltmeters
MC(0-15)V 1
MC(0-500)µA 1
5. Ammeters
MC(0-20)mA 1
6. Bread board 1
7. Connecting Wires Few
THEORY:
The semi conductor diode / PN junction diode is created by simply joining an n-type and a p-
type material together nothing more just the joining of one material with a majority carrier of
electrons to one with a majority carrier of holes.
The P-N junction supports uni-directional current flow. If +ve terminal of the input supply is
connected to anode (P-side) and –ve terminal of the input supply is connected to cathode
(N- side), then diode is said to be forward biased.
TABULATION
FORWARD BIAS REVERSE BIAS
VF IF (mA) VR IR
(Volts) (Volts) (µA)
MODEL GRAPH
In this condition the height of the potential barrier at the junction is lowered by an amount
equal to given forward biasing voltage. Both the holes from p-side and electrons from n-side
cross the junction simultaneously and constitute a forward current( injected minority
current – due to holes crossing the junction and entering N-side of the diode, due to
electrons crossing the junction and entering P-side of the diode). Assuming current flowing
through the diode to be very large, the diode can be approximated as short-circuited switch.
If –ve terminal of the input supply is connected to anode (p-side) and +ve terminal of the
input supply is connected to cathode (n-side) then the diode is said to be reverse biased.
In this condition an amount equal to reverse biasing voltage increases the height of the
potential barrier at the junction. Both the holes on p-side and electrons on n-side tend to move
away from the junction thereby increasing the depleted region. However the process cannot
continue indefinitely, thus a small current called reverse saturation current continues to
flow in the diode. This small current is due to thermally generated carriers. Assuming current
flowing through the diode to be negligible, the diode can be approximated as an open
circuited switch.
𝐼 = 𝐼0(𝑒 ƞ𝑉
𝑇 − 1)
I – Current flowing in the diode
I0 – Reverse saturation current
V – Voltage applied to the
𝐾𝑇
diode
0
𝑞
T
Ƞ =1 (for Ge)
Ƞ = 2( for Si)
1. Static Resistance: To find the forward static resistance locate a point on characteristic
curve obtained from the forward bias characteristics which is called operating point Q
and draw a line onto the X-axis and Y-axis to obtain V F and IF Calculate static forward
resistance using the formulae
𝑉𝐹
= Ω at Q point
𝑅𝑆
Static forward resistance
𝐼𝐹
𝑉𝐷
= Ω at Q point
𝑅𝐷
Dynamic Resistance
𝐼𝐷
PRECAUTIONS:
1. While doing the experiment do not exceed the ratings of the diode. This may lead to
damage of the diode.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit connections as
per the circuit diagram.
PROCEDURE
FORWARD
BIAS
REVERSE BIAS
RESULT
FORWARD BIAS
REVERSE BIAS
EXPERIMENT NO: 2
To plot the Volt-Ampere characteristics of Zener Diode in reverse bias condition and
to find the Breakdown voltage in reverse bias condition.
APPARATUS REQUIRED:
1. Diode-Zener FZ3.2 1
2. Resistors 1KΩ 1
3. Dual Regulated Power Supply (0-30)V 1
MC(0-1)V 1
4. Voltmeters
MC(0-10)V 1
5. Ammeters MC(0-20)mA 1
MC(0-20)µA
6. Bread board 1
7. Connecting Wires Few
THEORY:
Zener diodes have many of the same basic properties of ordinary semiconductor
diodes. When forward biased, they conduct in the forward direction and have the same turn
on voltage as ordinary diodes. For silicon this is about 0.6 volts.
In the reverse direction, the operation of a Zener diode is quite different to an ordinary diode.
For low voltages the diodes do not conduct as would be expected. However, once a certain
voltage is reached the diode "breaks down" and current flows. Looking at the curves for a
Zener diode, it can be seen that the voltage is almost constant regardless of the current
carried. This means that a Zener diode provides a stable and known reference voltage.
TABULATION
FORWARD BIAS REVERSE BIAS
VF IF VR IR
(Volts) (mA) (Volts) (mA)
MODEL GRAPH
PRECAUTIONS:
1. While doing the experiment do not exceed the ratings of the diode. This may lead to
damage of the diode.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit connections as
per the circuit diagram.
PROCEDURE:
FORWARD BIAS:
REVERSE BIAS:
1. The connections are made as per the circuit diagram.
2. The positive terminal of power supply is connected to cathode of the diode
and negative terminal to anode of the diode.
3. Reverse voltage VR across the diode is increased in small steps and the Reverse
current is noted.
4. The readings are tabulated. A graph is drawn between VR and IR.
RESULT:
Thus the characteristics of Zener diode were plotted and the Zener breakdown voltage
was determined and is given as V.
FULL WAVE RECTIFIER WITH OUT FILTER
APPARATUS REQUIRED:
COMPONENTS /
Sl.No SPECIFICATIONS QUANTITY
EQUIPMENTS
1. Transformer 230V/(12-0-12)V 1
2. Diode 1N4007 2
1000µF, 16V 1
3. Capacitors
470µF/25V 1
4. Resistor 10KΩ 1
5. Decade resistance box - 1
6. Dual Trace CRO 20MHz 1
7. Multimeter 1
8. Breadboard 1
9. Connecting Wires Few
THEORY
FULL WAVE RECTIFIER
Full wave rectifier utilizes both the cycle of input AC voltage. Two or four diodes are
used in full wave rectifier. If full wave rectifier is designed using four diodes it is known as
full wave bridge rectifier. Full wave rectifier using two diodes without capacitor is shown in
the figure. Center tapped transformer is used in this full wave rectifier. During the positive
cycle diode D1 conducts and it is available at the output. During negative cycle diode D1
remains OFF but diode D2 is in forward bias hence it conducts and negative cycle is available
as a positive cycle at the output. Note that direction of current in the load resistance is same
during both the cycles hence output is only positive cycles.
MODEL GRAPH
Ripple Factor
𝑽
O/P Voltage (Vo)
Load Resistance
RL (Ω) = 𝑽𝒂𝒄
Vac (V) Vdc (V) 𝒅𝒄
Advantages of full wave rectifier over half wave rectifier:
Disadvantages:
PROCEDURE
FULL WAVE RECTIFIER
WITHOUT FILTER:
1. Connecting the circuit on bread board as per the circuit diagram.
2. Connect the primary of the transformer to main supply i.e. 230V, 50Hz
3. Connect the decade resistance box and set the RL value to 100Ω
4. Connect the Multimeter at output terminals and vary the load resistance (DRB) from
100Ω to 1KΩ and note down the Vac and Vdc as per given tabular form
5. Disconnect load resistance ( DRB) and note down no load voltage Vdc (V no load)
6. Connect load resistance at 1kΩ and connect Channel – II of CRO at output terminals
and CH – I of CRO at Secondary Input terminals observe and note down the Input
𝑉𝑛𝑜 𝑙𝑜𝑎𝑑
8. x 100 %
Ripple Factor
𝑽
O/P Voltage (Vo)
Load
Resistance Vac (V) Vdc (V) = 𝑽𝒂𝒄
𝒅𝒄
RL (Ω)
CALCULATIONS:
FULL WAVE RECTIFIER
With out filter
RF=Forward resistance of diode =30Ω
𝑉𝑚𝑅𝐿
RL= Load Resistance
𝑉𝑑𝑐 =
𝜋(𝑅 + 𝑅 )
𝐹 𝐿
𝑉𝑚𝑅𝐿
𝑉𝑟𝑚𝑠 = + 𝑅𝐿)
𝐹
2(𝑅
1
2 2 /2
Ripple factor, 𝑟 =
(𝑉𝑟𝑚𝑠 −𝑉𝑑𝑐
)
𝑉𝑑𝑐
=
𝑉𝑚
Average load voltage at no load
𝜋
2(𝑅𝐹 +𝑅𝐿)
With filter
F= 50Hz
𝑉𝑚 𝑅𝐿
𝑉
𝑑𝑐 =
(4𝑓𝑐 + 𝐿)
1
𝑅
1 𝑉𝑚
𝑉𝑟𝑚𝑠 = ( )( )
1
2√3𝑓𝑐 + 𝑅𝐿
𝑉𝑟𝑚𝑠 4𝑓𝑐
𝑅𝑖𝑝𝑝𝑙𝑒 𝑓𝑎𝑐𝑡𝑜𝑟 = 𝑟 =
𝑉𝑎𝑐
(𝑜𝑟) =
𝑉𝑑𝑐
𝑉𝑑𝑐
𝑉𝑛𝑜 𝑙𝑜𝑎𝑑
To calculate the percentage of Regulation
− 𝑉𝑓𝑢𝑙𝑙 𝑙𝑜𝑎𝑑
%ƞ = 𝑥 100%
𝑉𝑛𝑜 𝑙𝑜𝑎𝑑
EC3361 ELECTRONIC DEVICES AND CIRCUITS LAB
RESULT:
Thus the full wave rectifier with capacitive filter is designed and the corresponding
Ripple factor and percentage of Regulation are measured and verified with theoretical values.
TABULATION:
A zener diode is heavily doped p-n junction diode, specially made to operate
in the break down region. A p-n junction diode normally does not conduct when
reverse biased. But if the reverse bias is increased, at a particular voltage it starts
conducting heavily. This voltage is called Break down Voltage. High current
through the diode can permanently damage the device.
To avoid high current, we connect a resistor in series with zener diode. Once
the diode starts conducting it maintains almost constant voltage across the terminals
whatever may be the current through it, i.e., it has very low dynamic resistance. It is
used in voltage regulators.
PROCEDURE:
PRECAUTIONS:
1. The terminals of the zener diode should be properly identified
2. While determined the load regulation, load should not be immediately shorted.
3. Should be ensured that the applied voltages & currents do not exceed
the ratings ofthe diode.
RESULT:
MODEL GRAPH
EXPERIMENT NO: 4
MC(0-2)V 1
4. Voltmeters
MC(0-10)V 1
MC(0-25)mA, 1
5. Ammeters
MC(0-100)µA 1
6. Bread board 1
7. Connecting Wires Few
THEORY:
A Bipolar Junction Transistor or BJT is a three terminal device having two PN-
junctions connected together in series. Each terminal is given a name to identify it and these
are known as the Emitter (E), Base (B) and Collector (C).
There are two basic types of bipolar transistor construction, NPN and PNP, which basically
describes the physical arrangement of the P-type and N-type semiconductor materials from
which they are made.
TABULATION
INPUT CHARACTERISTICS
VCE = 1 V VCE = 2 V
OUTPUT CHARACTERISTICS
IB= µA IB= µA
The principle of operation of the two transistors types NPN and PNP, is exactly the same the
only difference being in the biasing (base current) and the polarity of the power supply for
each type.
In CE configuration, Emitter is common to both the input and output as shown in figure. The
direction of the arrow in the symbol shows current flow between the base and emitter
terminal, pointing from the positive P-type region to the negative N-type region, exactly the
same as for the standard diode symbol. For normal operation, the emitter-base junction is
forward-biased and the collector-base junction is reverse-biased.
DESCRIPTION:
Input Characteristics: The variation of the base current IB with the base-emitter voltage VBE
keeping the collector-emitter voltage VCE fixed, gives the input characteristic in CE mode.
Input Dynamic Resistance (ri): This is defined as the ratio of change in base emitter voltage
(ΔVBE) to the resulting change in base current (ΔI B) at constant collector-emitter voltage
(VCE). This is dynamic and it can be seen from the input characteristic, its value varies with
the operating current in the transistor:
𝑟𝑖 𝛥𝑉𝐵𝐸
= 𝛥𝐼 |
𝐵 𝑉
𝐶𝐸
The value of ri can be anything from a few hundreds to a few thousand ohms.
Output Characteristics: The variation of the collector current I C with the collector-emitter
voltage VCE is called the output characteristic. The plot of I C versus VCE for different fixed
values of IB gives one output characteristic. Since the collector current changes with the base
current, there will be different output characteristics corresponding to different values of I B.
Output Dynamic Resistance (ro): This is defined as the ratio of change in collector-emitter
voltage (ΔVCE) to the change in collector current (ΔIC) at a constant base current IB.
𝛥𝑉𝐶𝐸
𝑟𝑜 =
𝛥𝐼|𝐶
𝐼𝐵
The High magnitude of the output resistance (of order of 100kW) is due to the reverse biased
state of this diode.
Current amplification factor (β)
This is defined as the ratio of the change in collector current to the change in base current at a
constant collector-emitter voltage (VCE) when the transistor is in active state.
𝛽𝑎𝑐 𝛥𝐼𝐶
= 𝛥𝐼 |
𝐵 𝑉
𝐶𝐸
This is also known as small signal current gain and its value us very large. The ratio of IC and
𝐼𝐶
IB we get what is called dc of the transistor. Hence,
𝛽𝑑𝑐 = |
𝐼𝐵 𝑉𝐶𝐸
Since IC increases with IB almost linearly, the values of both dc and ac are nearly equal.
PROCEDURE
To find the input Characteristics
1. Connect the circuit as in the circuit diagram.
2. Keep VBB and VCC in zero volts before giving the supply.
3. Set VCE= 1Volt by varying VCC and vary the VBB smoothly with fine control such
that base current IB varies in steps of 5µA from zero up to 100µA, and note down the
corresponding voltage VBE for each step in the tabular form.
4. Repeat the experiment for VCE 1 volt and 2 volts.
5. Draw a graph between VBE vs. IB against VCE=Constant
To find the output characteristics
1. Start VEE and VCC from zero volts.
2. Set the IB=20µA by using VBB such that, VCE changes in steps of 0.2 volts from
zero up to 10 volts, note down the corresponding collector current I C for each step in
the tabular form.
3. Repeat the experiment for IE=20µA and IE=40µA, tabulate the readings
4. Draw a graph between VCE vs IC against IB = Constant.
RESULT:
Thus the input and output Characteristic of BJT in Common Emitter Configuration were
plotted and the dynamic resistance and amplification factor were obtained.
CIRCUIT DIAGRAM:
EXPERIMENT 5:
N-CHANNEL MOSFET DRAIN AND TRANSFER CHARACTERISTICS
AIM:
To study transfer and output characteristics of an n-channel Metal Oxide Semiconductor field
effect Transistor (MOSFET) in Common-source configuration.
APPARATUS:
MOSFET (2N7000),
Bread board, resistor (1KΩ, 100KΩ),
connecting wires,
Ammeters (0‐10mA/ 0‐25mA),
DC power supply (0‐30V)
multimeter.
THEORY:
The MOSFET is actually a four-terminal device, whose substrate, or body terminal must be
always held at one of the extreme voltage in the circuit, either the most positive for the PMOS or
the most negative for the NMOS. One unique property of the MOSFET is that the gate draws no
measurable current.
PROCEDURE:
OUTPUT/DRAIN CHARACTERISTICS:
1. Connect the circuit as per given diagram properly.
2. Keep VGS constant at some value say 1.1 V by varying VGG
3. Vary VDS in step of 1V up to 10 volts and measure the drain current ID. Tabulate all the readings.
4. Repeat the above procedure for VGS as 1.2V, 1.3V, 1.4V, 1.5V etc
TRANSFER CHARACTERISTICS:
1. Connect the circuit as per given diagram properly.
2. Set the voltage VDS constant at 10 V.
3. Vary VGS by varying VGG in the step of 0.1 up to 1.55V and note down value of drain current
ID. Tabulate all the readings.
4. Plot the output characteristics VDS vs ID and transfer characteristics VGS vs ID.
5. Calculate VT, gm, rd or ro from the graphs and verify it from the data sheet
OBSERVATION TABLE:
OUTPUT / DRAIN CHARACTERISTICS
VGS = 1.1 V VGS = 1.2 V VGS = 1.3 V VGS = 1.4 V VGS = 1.5 V
VDS (V) ID (mA) VDS (V) ID (mA) VDS (V) ID (mA) VDS (V) ID (mA) VDS (V) ID (mA)
0 0 0 0 0
1 1 1 1 1
2 2 2 2 2
. . . . .
. . . . .
. . . . .
TRANSFER CHARACTERISTICS
VDS = 10 V
0.1
1.1
1.2
1.3
1.4
1.5
1.55
CALCULATION:
1.
Threshold voltage VT : Gate to source voltage at which, drain current starts flowing.
2.
Transconductance gm : Ratio of small change in drain current (Δ ID) to the
corresponding change in gate to source voltage (ΔVGS) for a constant VDS.
RESULTS:
1. VT :
2. gm :
3. ro :
PIN DIAGRAM
To design and construct BJT CE amplifier using voltage divider bias and to obtain
its frequency response.
APPARATUS REQUIRED:
COMPONENTS
Sl.No SPECIFICATIONS QUANTITY
/
EQUIPMENTS
56KΩ 1
12KΩ 1
2. Resistor 2.2KΩ 1
10KΩ 1
560Ω 1
0.1µF 1
3. Capacitor
22µF 1
4. Dual Regulated Power Supply (0-30)V 1
5. CRO (0-30)MHz 1
6. Function Generator (0 – 1) MHz 1
7. Bread board 1
8. Connecting Wires Few
THEORY:
Common Emitter amplifier has the emitter terminal as the common terminal between
input and output terminals. The emitter base junction is forward biased and collector base
junction is reverse biased, so that transistor remains in active region throughout the operation.
When a sinusoidal AC signal is applied at input terminals of circuit during positive half cycle
the forward bias of base emitter junction VBE is increased resulting in an increase in IB, The
cEoLlEleCcTtRoOr NcuI CrreDnEtVIIcCiEsSinAcNr DeaCseI Rd CbUyI TβStiLmAeBs the increase in
IB, VCE is correspondingly
TABULATION
Vi = 1V
𝐺𝑎𝑖𝑛 = 20log( 𝑉𝑂
/𝑉𝑖 )
Frequency (Hz) VO(V)
MODEL GRAPH
decreased. i.e. output voltage gets decreased. Thus in a CE amplifier a positive going signal is
converted into a negative going output signal i.e. 180° phase shift is introduced between
output and input signal and it is an amplified version of input signal.
PROCEDURE:
RESULT:
Thus a BJT CE amplifier with voltage divider bias was designed and plotted the frequency
response curve
,
CIRCUIT DIAGRAM
MODEL GRAPH
INPUT WAVEFORM
B) OUTPUT WAVEFORM
,
EXPERIMENT NO: 6
AIM:
APPARATUS:
TABULATION
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. A signal of 1 KHz frequency and 20mV peak-to-peak is applied at
the Input of amplifier.
3. Output is taken at drain and gain is calculated by using the expression,
Av=V0/Vi
4. Voltage gain in dB is calculated by using the expression,
Av=20log 10(V0/Vi)
5. Repeat the above steps for various input voltages.
6. Plot Av in dB Versus Frequency
7. The Bandwidth of the amplifier is calculated from the graph using
the Expression,
Bandwidth BW=f2-f1
PRECAUTIONS:
1. All the connections should be tight.
2. Transistor terminals must be identified properly
RESULT:
Thus the frequency response of the common source FETAmplifier was drawn and
Bandwidth was calculated.
Bandwidth =
EXPERIMENT:7
DESIGN OF COMMON BASE AMPLIFIER CIRCUIT
AIM:
To design and construct a Common Base amplifier circuit using and to calculate its
bandwidth
and cut off frequency.
EQUIPMENTS REQUIRED:
1 Transistor BC 547 1
2 RPS (0-30)V 1
3 Resistor 22 K 1
4 Resistor 4.7 K 1
5 Resistor 330 Ω 1
6 Resistor 1.2 K 1
7 Capacitor 1 uf 3
8 Bread Board - 1
9 Single strand Wires - -
10 CRO 30 MHz 1
11 CRO Probes - 3
12 Function Generator (0 - 3) MHz 1
THEORY
An amplifier is used to increase the signal level; the amplifier is use to get a larger
signal output from a small signal input The transistor can be used as a amplifier, if it is biased to
operate in the active region, i.e. base-emitter junction is to be forward biased, while the base –
collector junction to be reverse biased. Common-Base amplifier is constructed using self-bias
circuit. The resistors R1, R2 and RE are biasing resistors. Acts as a potential divider. Due to the
change in the temperature or β, the base current increases so this makes to increase the collector
current IC, therefore a Reverse Leakage Current ICO increases hence this affects the stability of
transistor. By providing an emitter resistor RE, it creates a voltage drop across RE therefore the
increased emitter current due to IC starts to flow through RE toground and this makes in the
reduction of Base Emitter Voltage VBE. Due to reduction in VBE, base current IB reduces and
hence collector Current IC also reduces and the output remains constant.
For the common base amplifier the AC Input resistance is typically low from 10 to100Ω.The
output
TABULATION
Vin =
PROCEDURE
RESULT
Hence designed and constructed the Common Base Amplifier and calculated the
band width and cut-off frequency.
CIRCUIT DIAGRAM:
INPUT WAVWFORM
OUTPUT WAVEFORM
EXPERIMENT NO: 8
AIM:
APPARATUS REQUIRED:
THEORY:
In common-collector amplifier the input is given at the base and the output is taken at the
emitter. In this amplifier, there is no phase inversion between input and output. The input
impedance of the CC amplifier is very high and output impedance is low. The voltage gain is
less than unity. Here the collector is at ac ground and the capacitors used must have a negligible
reactance at the frequency of operation.
This amplifier is used for impedance matching and as a buffer amplifier. This circuit is also
known as emitter follower.
The most common use of the emitter follower is as a circuit, which performs the function of
impedance transformation over a wide range of frequencies.
TABULATION :
Av=20log 10(V0/Vi)
6. A graph is drawn by taking frequency on X-axis and gain in dB on y-axis on semi-
loggraph sheet.
7. The Bandwidth of the amplifier is calculated from the graph using
the Expression,
Bandwidth BW=f2-f1
Where f1 is lower cut-off frequency of CE amplifierf2 is upper cut-off
frequency of CE amplifier
PRECAUTIONS:
1. The input voltage must be kept constant while taking frequency response.
2. Proper biasing voltages should be applied.
RESULT:
Thus the voltage gain of a CC amplifier was measured and the frequency response of the CC amplifier
was drawn.
CIRCUIT DIAGRAM:
MODEL CALCULATIONS
𝐺𝑎𝑖𝑛 𝐴𝐶 = 𝑉𝑂
((𝑉 + 𝑉2)/2)
1
AC =
𝐺𝑎𝑖𝑛 𝐴𝑑 =
(𝑉 𝑉𝑂
1 − 𝑉2)
Ad =
EXPERIMENT NO: 9
AIM:
Differential amplifier using FET
To construct the Differential Amplifier in Differential mode and to find the common
mode rejection ratio (CMRR).
APPARATUS REQUIRED:
COMPONENTS /
Sl.No SPECIFICATIONS QUANTITY
EQUIPMENTS
1. FET BFW10 2
2. Resistor 1KΩ 3
3. Dual trace CRO 20MHz 1
4. Dual Regulated Power Supply (0-30)V 1
5. Breadboard 1
6. Connecting Wires Few
THEORY
CMRR = | Ad/Ac|
Where
RESULT
Thus constructed a differential amplifier circuit for single input balanced output in the common
mode and differential mode configuration and studied the output waveform, also its CMRR has been
determined and verified practically.
Differential mode :
Common mode :
CMRR :
CASCODE AMPLIFIER CIRCUIT DIAGRAM
EXPERIMENT NO :9
CASCODE AMPLIFIERS
AIM:
To design and construct a cascode amplifier circuit and to draw its frequency response graph.
EQUIPMENTS REQUIRED
1 Transistor BC 547 2
2 RPS (0-30)V 1
3 Resistor 1.2K, 33 K,22K, 12K 1
4 Resistor 680Ω 1
5 Capacitor 1 uf, 2.2uf 2
6 Bread Board - 1
7 Single strand Wires - -
8 CRO (0 - 30) MHz 1
9 CRO Probes - 3
10 Function Generator (0 - 3) MHz 1
THEORY
A cascode amplifier comprises of a common emitter amplifier and a common base amplifier
stages in cascade. In the circuit diagram Q1 common base configuration and Q2 is common emitter
configuration. Principal advantage of this circuit is its low internal capacitance which is a limiting factor
gain at high frequencies. Cascode amplifier can able to amplify wide range of frequencies than that is
possible with CE amplifier. This is because no high frequency feedback occurs from the output back to
input through the miller capacitance as it occurs in transistor CE configuration. Cascode amplifier
provides same voltage gain of CE amplifier but in wide range of frequencies. The advantage of CE and
CB stages are put together in cascode connection.
TABULATION
Vin =
Frequency Output Voltage Gain = 20 log (Vo /
SL.NO
(Hz) (Vo) Vi) (db)
PROCEDURE
RESULT
Hence designed and constructed Cascode amplifier and plotted its frequency response.
CIRCUIT DIAGRAM:
GRAPH:
INPUT WAVEFORM
OUTPUT WAVEFORM
EQUIPMENT REQUIRED:
THEORY:
The amplifier is said to be class A power amplifier if the q point and the input
signal are selected such that the output signal is obtained for a full input cycle . For this
class the position of q point is approximately y at the mid point of the load line.
For all the values of input signal the transistor remains in the active region and
never entire into the cutoff or saturation region. The collector current flows for 3600
(life cycle) of the input signal in other words the angle of the collector current flow
is 3600 the claa a amplifiers or furthers classified as directly coupled and transformer
coupled and transformer coupled amplifiers in directly coupled type .The load is
directly connected in the collector circuit while in the transformer coupled type,
the load is coupled to the collector using the transformer.
Advantages:
2. It amplifies audio frequency signals faithfully hence they are called as audio
amplifiers Disadvantages:
RESULT: