Electronic Circuit Design (ECE-213)
Lecture 02
Introduction to MOSFETs
ECE-213 Electronic Circuit Design Lecture 2-1
What is MOSFET?
❑ MOSFET stands for Metal Oxide Semiconductor
Field Effect Transistor
❑ Conductivity of the semiconductor is altered
by an external field, hence, field effect
❑ It has a metal, oxide, and semiconductor
structure, hence, MOS
❑ Other field effect transistors include pn
Junction FET (JFET) and Metal Semiconductor
FET (MESFET)
ECE-213 Electronic Circuit Design Lecture 2-2
Why MOSFET?
❑ MOSFET can be made extremely small as
compared to the BJT
❑ Very Large-Scale Integration (VLSI) of
MOSFET led to the electronics revolution of
1970s and 1980s
❑ Microprocessor made possible: power desktop
computers, laptops, handheld calculators,
iPods, and other electronic systems
❑ Due to its extensive use in digital electronics,
we use it for analog applications i.e. System-
on-a Chip (SoC)
ECE-213 Electronic Circuit Design Lecture 2-3
In this chapter, we will:
❑ Study and understand the operation and characteristics of
the various types of MOSFETs.
❑ Understand and become familiar with the dc analysis and
design techniques of MOSFET circuits.
❑ Examine three applications of MOSFET circuits.
❑ Investigate current source biasing of MOSFET circuits, such
as those used in integrated circuits.
❑ Analyze the dc biasing of multistage or multitransistor
circuits.
ECE-213 Electronic Circuit Design Lecture 2-4
Two-Terminal MOS Structure
❑ Metal may be Aluminum or any
other highly conductive material
e.g. polysilicon (Gate)
❑ Semiconductor material can be n
or p type (Substrate or Body)
❑ It’s like a parallel-plate capacitor
➢ C=Aεoεr/d
❑ d=tox oxide thickness and
❑ εr = εox oxide relative permittivity
❑ A= area of gate (WL)
ECE-213 Electronic Circuit Design Lecture 2-5
ECE-213 Electronic Circuit Design Lecture 2-6
MOS Capacitor Under Bias:
Electric Field and Charge
❑ With negative gate bias, accumulation layer of holes is
formed on the bottom plate (p-type)
❑ What will happen with positive gate bias?
➢ Recall what does p-type semiconductor contain?
ECE-213 Electronic Circuit Design Lecture 2-7
Positive Gate Bias (p-substrate)
❑ With a positive gate bias, holes will be repelled
away from the oxide-semiconductor interface
❑ Hence, bound negative charge is uncovered,
forming the negative plate of MOS capacitor
❑ When gate bias is further increased, the
minority carriers (electrons) are attracted
❑ This is called electron inversion layer
➢ Qinv ∝ Vgate
❑ What happens for an n-type substrate?
ECE-213 Electronic Circuit Design Lecture 2-8
Inversion of p-type Substrate
ECE-213 Electronic Circuit Design Lecture 2-9
Negative Gate Bias (n-substrate)
❑ With a negative gate bias, electrons repelled
away from the oxide-semiconductor interface
❑ Hence, bound positive charge is uncovered,
forming the positive plate of MOS capacitor
❑ When gate bias is further decreased, the
minority carriers (hole) are attracted
❑ This is called hole inversion layer
➢ Qinv ∝ Vgate
❑ The term enhancement mode means that a
voltage must be applied to the gate to create
an inversion layer
ECE-213 Electronic Circuit Design Lecture 2-10
Inversion of n-type Substrate
ECE-213 Electronic Circuit Design Lecture 2-11
Physical Structure of n-Channel
Enhancement Mode MOSFET
ECE-213 Electronic Circuit Design Lecture 2-12
Physical Structure of n-Channel
Enhancement Mode MOSFET
❑ The gate, oxide, and p-type substrate are
same as a MOS capacitor
❑ Two additional heavily doped n-type regions
are also present
❑ These new regions are called source and
drain terminals of MOSFET
❑ The inversion layer is called channel region
❑ Thick oxide (field oxide) is deposited to isolate
various MOSFET devices
ECE-213 Electronic Circuit Design Lecture 2-13
Physical Structure of NMOSFET
❑ The channel length is sub-micron (<1μm)
❑ The numbers associated with modern technologies e.g.
14nm, 7nm are minimum channel lengths
ECE-213 Electronic Circuit Design Lecture 2-14
