Keysight Technologies

Signal Integrity Simulation

Using Advanced Design System (ADS)

Application Note
02 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Table of Contents

Simulation
What is the benefit of S-parameter simulation? What components
are specific for S-parameter simulation? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 03
What components in ADS are used for Transient analysis? . . . . . . . . . . . . . . . . . . . . . . 05
What are the benefits of ChannelSim? What components in ADS are
compatible with ChannelSim? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 07
How do you set up bit sequence in ADS source components? . . . . . . . . . . . . . . . . . . . 09
How do you build an optimal and robust high speed digital design? . . . . . . . . . . . . . . 11
How do you perform batch simulation efficiently with Batch Simulation controller? . 13
How do you examine performance of multi-channels efficiently? . . . . . . . . . . . . . . . . . 15
How do you calculate insertion loss, return loss and crosstalk of differential
pairs in mixed mode S-parameters? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Resources
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
03 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Question Answer
What is the benefit of S-parameter S-Parameters Simulator calculates wide band S-parameters of a channel. Term is used
simulation? What components are specific to define the impedance and location of the ports for S-parameters simulation. Term has
for S-parameter simulation? to be continuously numbered from one. Note that time domain sources, IBIS, IBIS AMI
and SPICE IO models are not compatible with S-parameters simulation.

Figure 1. S-Parameters Simulator and Term Component.

Simulation-S Param

S-Parameter Simulator supports not only S-Parameters, but also Z Parameters and
Group Delay. You can check the items which you want to examine during simulation.
Z parameter is used to analyze the impedance profile of the power distribution network
(PDN). It is useful for power integrity analysis.
Channel bandwidth and Crosstalk can be extracted from S-parameter. Channel
bandwidth limits maximum bit rate. Insertion loss to crosstalk ratio affects system BER.
Both channel bandwidth and crosstalk are important design factors for SI. A simple
S-parameter simulation of channels is shown in Figure 2. The results of Insertion loss
and crosstalk are shown in Figure 3.

Insertion Loss
Figure 2. A simple S-parameter simulation.

Far End Crosstalk

Near End Crosstalk

04 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Figure 3. Insertion Loss and Crosstalk.

Group delay is time delay of a channel in frequency domain. Equal geometrical length
does not guarantee equal electrical delay. Figure 4 shows an example of such a layout.
Delay mismatch between data and strobe may cause timing skew and data error. Group
Delay analysis is helpful for DDR post-simulation.

Figure 4. Group Delay of DQs and Data

Strobe.

If you want to export S-parameters in Touchstone format, place a SPOutput component

in the schematic and specify the file name of the Touchstone file to export. The
Touchstone file will be generated when simulation is done. For Batch or Sweep
simulation, S-parameters of each iteration would be exported in separate Touchstone
files.
05 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Question Answer
What components in ADS are Transient simulator calculates node voltage and branch current at each time step.
used for Transient analysis? Transient works fine with lumped components and transistor models. Transient
simulator is not used to process S-parameter model because S-parameter is frequency
dependent. S-parameter model is, however, useful in channel modeling. ADS Transient
simulator enhances its advanced convolution engine for S-parameter model. In ADS, you
can get a reliable waveform in Transient simulation with S-parameter model.

Simulation-Transient

Time Domain sources are all compatible with Transient simulator and are useful for time
domain SI analysis. For example, Step source can be used for TDR simulation. Pulse
source can be used to model a clock signal. VtPRBS supports various bit pattern, output
resistance, de-emphasis, jitter, bit rate and PAM encoding.

Simulation-Transient
06 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

IBIS (I/O Buffer Info Specification) is a popular IO buffer model. IBIS model supports
detailed rising and falling waveform. In order to protect intellectual property, an IBIS
model file records current-voltage, voltage-time data and IC package parasitic only. To
make IBIS model work well, it is necessary to bias power pin, ground pin and enable pin
properly. You also have to set trigger signal when the IBIS model serves as a transmitter.

Signal Integrity-IBIS

Although TX AMI, RX AMI, Xtlk TX AMI and Xtlk RX AMI are categorized in IBIS library,
they are not compatible with Transient simulator. They are compatible with ChannelSim
simulator only.
Some IC companies support HSPICE IO model rather than IBIS model for accuracy. To
import an HSPICE model into ADS, select Tools > HSPICE Compatibility Component >
Wizard. Note that ADS won’t support a HSPICE encrypted model. You can select an
imported HSPICE model and click the ‘Push Into Hierarchy’ button to view and edit the
HSPICE netlist.
07 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Question Answer
What are the benefits of ChannelSim? To evaluate the performance of SERDES, it is necessary to simulate a long waveform
What components in ADS are compatible for Bit Error Rate (BER). For example, it might require 1e6 bits or even more. It may take
with ChannelSim? hours or days for a transient simulation, which may be prohibitive. ChannelSim is a good
solution to resolve this issue. Here is a typical signal processing flow of ChannelSim:
–– Perform Transient simulation to get a channel impulse response of 1000 bits long.
–– Transmitter generates a long bit sequence, e.g. 1e6 bits long.
–– Perform convolution of the bit sequence and the impulse response to get waveform
after channel.
–– Pass the waveform to the receiver for signal equalization.
Typically, it takes only seconds or minutes to get a result of a ChannelSim.

EQU

Simulation-ChannelSim

2 1 3 4

Convolution
EQU Equalization

Figure 5. Signal flow of a ChannelSim.

Although ChannelSim accelerates simulation, obviously there is limitation. Only

transmitter (Tx), receiver (Rx) models in the ChannelSim library and IBIS AMI models
are compatible with ChannelSim. More specifically, time-domain sources, IBIS and
SPICE models are incompatible with ChannelSim. Transmitter model supports coding,
de-emphasis and jitter. Receiver model supports CTLE, FFE, DFE and jitter. It makes
ChannelSim flexible for SERDES channel evaluation.

Figure 6. An example of ChannelSim with Tx and Rx models.

08 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

SERDES IO buffer has following characteristics:

–– Differential signaling
–– Embedded clock
–– De-emphasis at transmitter
–– Equalizer and Clock Data Recovery (CDR) at receiver
–– Balance coding, e.g. 8b/10b coding
–– Multilane, Multiplexer
Behavior of de-emphasis, CDR and equalizer are critical to SERDES performance. Taking
effect of these blocks into account, chip provider compiles C++ code of block models to
.dll file. The .dll file, plus .ibs file and .ami file constitute AMI model. Channel simulation
with AMI model provides more accurate results of system performance.

Figure 7. An example of ChannelSim with IBIS AMI models.

09 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Question Answer
How do you set up bit sequence In ADS there are four modes in source components to generate a waveform in a different
in ADS source components? bit sequence:
–– Maximal Length LFSR
–– User Defined LFSR
–– Explicit Bit Sequence
–– Bit File
In mode 1 and 2, Linear Feedback Shift Register (LFSR) is used to generate Pseudo
Random Binary Sequence (PRBS). In mode 3, we can input an arbitrary bit sequence.
In mode 4, source components read a text-based bit file to generate a waveform.
Figure 105 shows a three tap LFSR example. In this example, Tap3 and Tap1 are inputs
of XOR operator, labeled as “101”. Initial value of registers is called seed. In this example,
seed is “011”. Every clock cycle, Values in the registers shift right. Tap1 is set as the
output value of XOR. Output of Tap3 is the generated bit of LFSR.

Tap1 Tap2 Tap3

0 xor 1 = 1
1 1 0
Clock #1

1 1 1 Output
Clock #2

Figure 8. Values in registers shift right every clock cycle.

In theorem, maximum cycle length of bit sequence is 2 N – 1, where N is register length. It

means bit sequence will repeat itself after 2 N – 1 clock cycles. Figure 9 shows state flow
of the three tap LFSR. In this example, bit sequence “0111010” repeats every
2 3 – 1 = 7 clock cycles.
In mode 1, default register length is 8. It means the bit sequence will repeat after
28 – 1 = 255 clock cycles. To get a longer cycle length of bit sequence we can set longer
register length to set a longer cycle length bit sequence. For example, if register length
is set as 32, maximum cycle length of bit sequence will be 2 32 – 1 = 4,294,967,295.
In mode 2, we can put Taps and Seed values to generate a specific PRBS as shown in
Figure 10.
10 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

#1 #5
1 1 0 0 1 0 1

#2 #6
1 1 1 0 0 1 0

#3 #7
0 1 1 1 0 0 1

#4 #8
1 0 1 1 1 0 0

Figure 9. State flow of a three taps LFSR.

0 1 1 1 0 1 0 0 1 1 1 0 1

Figure 10. Define Taps and Seed in “User Defined LFSR” mode.
11 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Question Answer
How do you build an optimal and System analysis is a systematical approach to an optimal and robust design. It helps us
robust high speed digital design? answering the following questions:
–– How does a specific variable affect system performance?
–– Is the system robust enough?
–– How do you minimize performance impact due to manufacturing variation?
–– What is an optimal design?
–– …

ADS provides various controllers for system analysis including:

–– Batch
–– Optimization
–– Design of Experiment (DOE)
–– Sequencer
–– Monte Carlo
–– Yield & Yield Optimization
–– Sensitivity
Unlike simulators, controllers do not calculate voltage and current. Controllers adjust
variables and running simulation repeatedly until predefined conditions are met. Batch
and Optimization controllers are the most often used controllers for SI analysis.
Batch controller performs circuit simulations repeatedly with different values of
variables. The result shows how the system performs with variables. Batch controller
also supports sweeping of files. For example, reading multiple channel model files for
channel simulation at one time as shown in Figure 11. Then, examining statistics of the
eye pattern of each channel as shown in Figure 12.

Figure 11. Sweeping five channel model files.

Figure 12. Eye Height and Jitter RMS of each channel.

12 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Optimization is a process to minimize error function by systematically choosing values of

variables within an allowed range. The error function measures the difference between
Set
the computed and desired responses. The smaller the error, the closer the system
Design Goal
performance to the goal.

For DDR design, power integrity is crucial to signal integrity. One way to mitigate power
Set noise is to reduce the impedance of the power distribution network with decoupling
Variables Range
capacitors. Then the question is how to define capacitance of each capacitor.
Optimization controller is an effective and efficient tool. It takes mere seconds to
minutes to find out an optimal set of decupling capacitors.
Set
Algorithm

Run
Organization

Optimization flow chart.

Without Decaps
Optimized Decaps

Figure 13. An example of impedance optimization.

13 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Question Answer
How do you perform batch simulation To understand how circuit performance is determined by component variations, a
efficiently with Batch Simulation common way is to sweep variables of components in the circuit design. We can then
controller? compare results between these simulation runs to get insights of the circuit.
Batch Simulation controller is an easy-to-use tool for users to set up complex sweep
process as shown in Figure 14. It supports “Use sweep plan” and “Use sweep module”
modes. In “Use sweep plan” mode, we can input variables to sweep and the sweep range
in Batch Simulation dialog box as shown in Figure 15.

Figure 14. Perform a simulation with Batch Simulation controller.

Figure 15. Sweep variables in “Use sweep plan” mode.

When the simulation ends, the results of all simulation runs can be displayed in a
rectangular plot as shown in Figure 16. We can examine the circuit performance
variation easily. However, filenames and strings are not supported in “Use sweep plan”
mode directly. A solution is to build a file list in a DataFileList component (or a string list
in a StringList component) as shown in Figure 17 to generate a mapping table between
filenames and the index. The indexes can then be used in “Use sweep plan” mode.
14 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Figure 16. Eye height and eye width of all simulation runs.

Figure 17. DataFileList and StringList components.

In “Use sweep module” mode, we can build a sweep plan in a .csv file with text editor
as shown in Figure 18. Values, filenames and strings are supported in this mode. When
simulation begins, Batch controller will set up variables based on the items listed in the
file and execute simulation iteratively until all items are performed.

Figure 18. A .csv file used in “Use sweep module” mode.

15 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Question Answer
How do you examine performance Repetitively checking performance of multi-channels can be time consuming.
of multi-channels efficiently? For example, we connect Tx_Diff and Rx_Diff to the first channel at first as shown in
Figure 19. Run a simulation to get the performance of the first channel. Next, move
Tx_Diff and Rx_Diff manually to the second channel and run a simulation to get the
performance of the second channel. The rest of the channels should be done in the
same manner. When the channel count is large, it will take a lot of time to examine
performance of all channels.

Figure 19. Checking performance of 1st channel.

To make it easier, we can use two switch components for channel swapping as shown in
Figure 20. Parameter N of the switch is used to set the channel swapped with the first
channel. For example, N=2 means the second channel is swapped to connect to Tx_Diff
and Rx_Diff. When we let N=ix and sweep ix from 1 to 3 in the Batch controller, we can
get all three simulation results in one dataset. We can then display simulation results of
all three channels in one chart as shown in Figure 21.
The switch component is a user defined model built in Verilog-A code. Code of a three-
channel switch is shown in Figure 22. The code can be modified to build a more complex
switch.

Figure 20. Swap channels with switch components.

16 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Figure 21. Eye width and eye height of each channel.

Figure 22. Verilog-A code of three channel switch component.

17 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Question Answer
How do you calculate insertion loss, Mixed mode S-parameters are often used to examine frequency characteristics of
return loss and crosstalk of differential differential pairs including insertion loss, return loss and balanced-unbalanced mode
pairs in mixed mode S-parameters? conversion. Typically we can convert four-port single ended S-parameters to mixed
mode S-parameters with equations as shown in Figure 23. Or, we can make the
conversion with simulation as shown in Figure 24.

Figure 23. Formulas for mixed mode S-parameters calculation.

Figure 24. Formulas for mixed mode S-parameters calculation.

18 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Figure 25. Mixed mode S-parameters plot.

The formulas would be very complex to calculate differential mode to differential

mode crosstalk between pairs. We can make use of S-parameter simulation as shown
in Figure 26 to simplify the work. For example, S(5,1) is near-end crosstalk (NEXT) from
upper pair to lower pair. S(6,1) is far-end crosstalk (FEXT) from upper pair to lower pair.

Figure 26. Crosstalk in mixed mode S-parameters.

Figure 27. NEXT and FEXT in mixed mode S-parameters.

19 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

Resources

Keysight EEsof EDA Official Website

Signal Integrity Blog

ADS Tips Website

Signal Integrity Document Library

20 | Keysight | Signal Integrity Simulation Using Advanced Design System (ADS) - Application Note

For more information on Keysight

Download your next insight Technologies’ products, applications or

services, please contact your local Keysight
Keysight software is downloadable expertise. office. The complete list is available at:
From first simulation through first customer www.keysight.com/find/contactus
shipment, we deliver the tools your team needs
to accelerate from data to information to Americas
actionable insight. Canada (877) 894 4414
Brazil 55 11 3351 7010
–– Electronic design automation Learn more at Mexico 001 800 254 2440
(EDA) software www.keysight.com/find/software United States (800) 829 4444
–– Application software
–– Programming environments Start with a 30-day free trial. Asia Pacific
–– Productivity software www.keysight.com/find/free_trials Australia 1 800 629 485
China 800 810 0189
Hong Kong 800 938 693
India 1 800 11 2626
From Hewlett-Packard through Agilent to Keysight Japan 0120 (421) 345
Korea 080 769 0800
For more than 75 years, we‘ve been helping you unlock measurement insights. Our Malaysia 1 800 888 848
Singapore 1 800 375 8100
unique combination of hardware, software and people can help you reach your next
Taiwan 0800 047 866
breakthrough. Unlocking measurement insights since 1939. Other AP Countries (65) 6375 8100

Europe & Middle East

Austria 0800 001122
Belgium 0800 58580
Finland 0800 523252
France 0805 980333
Germany 0800 6270999
Ireland 1800 832700
Israel 1 809 343051
Italy 800 599100
Luxembourg +32 800 58580
Netherlands 0800 0233200
Russia 8800 5009286
1939 THE FUTURE Spain 800 000154
Sweden 0200 882255
Switzerland 0800 805353
Opt. 1 (DE)
myKeysight
Opt. 2 (FR)
www.keysight.com/find/mykeysight Opt. 3 (IT)
A personalized view into the information most relevant to you. United Kingdom 0800 0260637

For other unlisted countries:

www.keysight.com www.keysight.com/find/contactus
www.keysight.com/find/eesof-ads (BP-01-01-16)

This information is subject to change without notice.

© Keysight Technologies, 2016
Published in USA, April 1, 2016
5992-1379EN
www.keysight.com