Unit IV :
Phase Locked Loop (PLL)
Dr.T.Kalavathi Devi
ASP/EIE
Presentation Outline
• What is Phase Locked Loop (PLL)
• Basic PLL System
• Application of PLL
What is Phase Locked Loop (PLL)
• PLL is an Electronic Module (Circuit)
that locks the phase of the output to the
input.
Vi(t) Phase Vo(t)
Locked
Loop
Applications
PLL Applications
Frequency Modulation (FM) stereo decoders, FM
Demodulation networks for FM operation.
Frequency synthesis that provides multiple of a reference
signal frequency.
Used in motorspeed controls, tracking filters.
Used in frequency shift keying (FSK) decodes for
demodulation carrier frequencies.
Lock Range , capture Range, Pull in
time
The range of frequencies over which the PLL can
maintain the lock with an input signal - Lock range
The range of frequencies over which the PLL can
acquire lock with an input signal – capture Range
the total time taken by the PLL to establish lock -
pull in time
Locked Vs. Unlocked Phase
• Example of locked phase
Vi(t)
Vo(t)
• Example of unlocked phase
Vo(t)
Vi(t)
Phase Error
( ∆φ)
Basic PLL System
•PLLis a feedback system that detects the phase error ∆φ
and then adjusts the phase of the output.
Vi(t) Phase Vo(t)
Locked Loop
VI
Phase ∆φ Vo
VCO
Detector
• The Phase Detector (PD), detects ∆φ between the output
and the input through feedback system
• Voltage Control Oscillator (VCO) adjusts the phase
difference
Implementation of PD
Phase Detector is an XOR gate
VI
V1 Phase ∆φ Vo
∆φ VCO
Vo Detector
1 VI Vo
0
VI Vo
Vo(t)
Vi(t)
Phas
e
Erro
r (
∆φ)
What is VCO ?
• VCO is a circuit module that oscillates at a
controlled frequency ω.
• The Oscillating Frequency is controlled
using Voltage VControl.
ω
– That is why the module is called
• Voltage Control Oscillator ω0
VControl
VControl VCO ω
o KVCO VControl
• Vcontrol must be in the steady state for the VCO to
operate properly
Simple PLL
• Structure
– Phase Detector ( XOR ) that detects the phase error ∆φ
– Low Pass Filter ( to smooth ∆φ )
– Voltage Control Oscillator (VCO)
• Basic Idea
– If VI and Vout are out of phase (unlocked), then the PD module
detects the error and the LPF smoothes the error signal. The
control signal slows down or speeds up the VCO module; hence,
the phase is corrected (locked)
VI
Phase ∆φ Vout
LPF VControl VCO
Vout Detector
∆φ
Stages :
The free running stage refer to the stage when there is no input voltage
applied.
As soon as the input frequency is applied the VCO starts to change and
begin producing an output frequency for comparison this stage is called the
capture stage.
The frequency comparison stops as soon as the output frequency is
adjusted to become equal to the input frequency. This stage is called the
phase locked state
Example: In the UNLOCKED State
VI and Vout has ∆φ at the same
V(t)
frequency ω1 i
• The phase detector must Vo(t)
produce VI Phase Error
( ∆φ)
• Hence, VCO is dynamically
changing and PD is creating VControl
VControl to adjust for the phase
difference. ω
VControl
V1
ω1
• The PLL is in the Locked state
ω0
φ0
V1
VControl
In the UNLOCKED State
• For Simplicity and by using Fourier Series
• Let VI VA cos 1t V V cos t
out B 1 o
• Due to ∆φ, PD creates Vcontrol
• VCO will change
out 1 KVCO VControl
• The output voltage becomes
Vout VB cos 1 t o (t)
Application of PLL
• Frequency Multiplications
– The feedback loop has frequency division
– Frequency division is implemented using a counter
VI
PFD ∆φ Vout
LPF VControl VCO
∆φ
Counter
(Frequency
Division)
Clock Skew Reduction
Buffers are used to distribute
the clock
Embed the buffer within the
loop
Application of PLL
• Clock Skew Reduction
– Buffers are used to distribute the clock
– Embed the buffer within the loop
VI
Buffer
PFD ∆φ Vout
LPF VControl VCO
Vout
∆φ
• Jitter Reduction
Monolithic IC565 PLL IC
IC 565 Pll Block Diagram
Fc
The centre frequency of the PLL is determined by the free-running
frequency of the VCO
frequencies
Reference
D.Roy Choudhury, Shail B. Jain , “Linear Integrated Circuits”,fourth edition,
reprint, 2005, new age international publishers.
