DAC Interface
Introduction
+VCC +VREF
Digital Analog
Input Output
DAC
n
• A DAC is a device that converts the digital input i.e. a binary
number into an equivalent analog signal.
• Output of DAC is given as
VOUT = K. D
where D = Digital Input
K = Resolution = VREF/2n
• Resolution is the amount of voltage corresponding to the LS bit
of digital data. Alternatively, it is the output when binary input
is 0000 0001 i.e. only LS bit is 1.
2
An Example DAC
IREF b0 • 8-bit example DAC.
28 • Switch b0 = 1 current IREF/28
IREF b1 flows in the circuit.
27 • Switch b0 = 0 current IREF/28
+ IOUT does not flows in the circuit.
• Currents from all branches
IREF b7
are summed to deliver final
21 output.
• Generally, DACs are current type device, as shown above, in which
current corresponding to the digital inputs are provided as output.
• The amount of current flowing in each branch is decided by a resistor
(not shown in figure).
• As evident from diagram, K = Resolution = IREF /28, i.e. the current
flowing in the branch corresponding to LS bit (b0) of the device.
• If required, an external current to voltage converter can be connected to
obtain the equivalent voltage.
3
Example DAC (Contd.)
• Output of the example 8-bit DAC may be given as
b7 b6 b1 b0
IOUT IREF 1 2 ........ 7 8
2 2 2 2
• When digital input is 0000 0001, then the output is
0 0 0 1 IREF
IOUT IREF 2 ........ 7 8 Resolution (K)
2 2 2 2 256
• When digital input is 1111 1111, then maximum output is
obtained and is referred as Full Scale Output
1 1 1 1 255
IOUT IFS IREF 2 ........ 7 8 IREF
2 2 2 2 256
i.e.
1
IFS IREF IREF IREF K IREF LSbit
256
4
R-2R Ladder 8-bit DAC
• The DACs are realized in IC circuits using R/2R ladder network.
• Each bit of digital input is passed through a set of resistor
network proportionate to its weight.
• To deliver the output linearly, DACs require precise value of
resistors. Use of ladder network is advantageous in VLSI
circuits, since only two precise resistors has to be realized.
• The response time of such DACs is few nsec.
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DAC 0808: 8-bit DAC
• It is a current type DAC.
• A1 to A8 are digital inputs that are
connected to microcontroller.
• A8 is LS bit, the input
corresponding to bit b0 i.e.
weighting factor of 1/28.
• A1 is MS bit, the input
corresponding to bit b7 i.e.
weighting factor of 1/21.
• VREF(+) and VREF(-) are the reference voltage through which, reference
current IREF for the DAC is setup. Usually IREF is set to 2 mA.
• The DAC requires bipolar power supply, generally VCC is connected to
+5V and VEE is connected to -12V or -15V.
• The DAC also requires a 0.1F capacitor between VEE and
COMPANSATION (pin for frequency compensation).
• Since the DAC is current type, an external current to voltage converter
is used to deliver the output in voltage.
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Interfacing of DAC 0808
8255
+5V -15V +10V Addresses
D0 - D7 13
3 Port A – 40H
5 - 12 VCC VEE Port B – 41H
A1 A1 Port C – 42H
Port A A1 – A8
A0 A0 16 CWR – 43H
COMPANSATION
Observe A7
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IOR RD VREF (+) 5K
IOW WR
DAC 0808 RF=5K
+15V
15 2
A4 C Y0 CS VREF (-) IOUT - 7
VOUT
A3 B 6
A2 A IC 741
8255 5K 3
„138 + 4
A6 2
G1 Gnd -15V
A7 G2A
A5 G2B Y7 NC
• IREF = VREF(+)/5K = 2 mA • VOUT = IOUT * RF
• When D = 0000 0001 • When D = 0000 0001
IOUT = 2mA/256 = 7.8125 A VOUT = 7.8125 A * 5K = 39.0625 mV
• So Resolution in current is • So Resolution in voltage is
KI = 7.8125 A. KV = 39.0625 mV
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DAC 0800 Output
DAC OUTPUT TABLE
Resolution (KV) = 39.0625 mV
Digital Input (D) Hex Value Output (VOUT) Remark
0000 0000 00 0V TTL LOW
0000 0001 01 39.0625 mV Resolution KV
0100 0000 40H 2.5 V
0111 1111 7FH 4.9609 V
1000 0000 80H 5V TTL HIGH
1100 0000 C0H 7.5V
Full Scale Voltage
1111 1111 FFH 9.9609 V
VFS = 10V - KV
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P1: TTL Square Wave (2.5 KHz)
MAIN:
MVI A, 80H ; Init Port A of 8255 in Mode 0 as O/p Port
OUT 43H ; Write Command word at CWR Address
AGAIN:
MVI A, 00H ; DAC input to Output TTL LOW.
OUT 40H ; Write at Port A.
CALL DELAY_200sec ; Wait for 200 sec.
MVI A, 80H ; DAC input to Output TTL HIGH.
OUT 40H ; Write at Port A.
CALL DELAY_200sec ; Wait for 200 sec.
JMP AGAIN ; Repeat to generate square wave.
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P2: Generating RAMP (0V to 7.5V)
MAIN: MVI A, 80H ; Init Port A of 8255 in Mode 0 as O/p Port
OUT 43H ; Write Command word at CWR Address
REPEAT: XRA A ; Load Acc for 0V (i.e. A=00).
AGAIN: OUT 40H ; Output Acc at Port A for DAC.
INR A ; Increment Acc for next value.
NOP ; Wait for some time.
CPI 0C1H ; Compare Acc with value for 7.5V.
JNZ AGAIN ; If not 7.5V, output to DAC again.
JMP REPEAT ; Repeat to generate RAMP.
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Program P3-Generating Sine Wave
For the previously interfaced DAC, write a
program to generate Sine Wave with the
help of look up table.
A Sine Wave has maximum value of 1 at 90 and minimum value of -1
at 270.
Average value (average area under curve) of a Sine Wave is 0.
Since we have connected the DAC to generate the positive values only,
we need to scale the average value of Sine Wave such that positive
values can generate one cycle of Sine Wave.
To generate the Sine Wave, we scale the of wave axis (i.e. average
value) to +5V, so that we get
VOUT = 5V + 5V Sin
The waveform and look up table holding values for Sine Wave in the
increment of 15 is shown next.
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Output Wave Form
FFH 10V
80H = 5V
00H = 0V
• The wave is generated in the step of 15.
• The full swing of the wave form is 0V to 10V.
• 0V corresponds to output “-1” of Sine Wave at 270.
• 5V corresponds to output “0” of Sine Wave at 0 and 180.
• 10V corresponds to output “1” of Sine Wave at 90.
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Sine Wave Lookup Table
Sine Wave Table
Input to DAC
Sin() 5V+5V*Sin()
Hex Value
0 0 5V 80H
15 0.2588 6.2941 A0H
30 0.5000 7.5000 BEH
45 0.7071 8.5355 DBH
60 0.8660 9.3301 EFH
75 0.9659 9.8296 FBH
90 1 10V FFH
105 0.9659 9.8296 FBH
120 0.8660 9.3301 EFH
135 0.7071 8.5355 DBH
150 0.5000 7.5000 BEH
165 0.2588 6.2941 A0H
180 0 5V 80H
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Sine Wave Lookup Table (Contd.)
Sine Wave Table
Input to DAC
Sin() 5V+5V*Sin()
Hex Value
195 -0.2588 3.7059 60H
210 -0.5000 2.5000 40H
225 -0.7071 1.4645 26H
240 -0.8660 0.6699 12H
255 -0.9659 0.1704 05H
270 -1 0V 00H
285 -0.9659 0.1704 05H
300 -0.8660 0.6699 12H
315 -0.7071 1.4645 26H
330 -0.5000 2.5000 40H
345 -0.2588 3.7059 60H
360 0 5V 80H
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P3: Sine Wave Generation
Let the Sine wave Look Up Table is stored at Location 2500H.
MVI A, 80H ; Init Port A of 8255 in Mode 0 as O/p Port.
OUT 43H ; Write Command word at CWR Address.
REPEAT: LXI H, 2500H ; Init Pointer to Look Up Table.
MVI C, 18H ; Counter for all 24 elements in Look Up Table.
BACK: MOV A, M ; DAC input in Acc from Look Up Table.
OUT 40H ; Output at Port A.
INX H ; Increment Pointer to get next value.
CALL DELAY_139sec ; Generate 300Hz Sine Wave.
DCR C ; Decrement Element Count.
JNZ BACK ; Count 0, Go Back to output next value.
JMP REPEAT ; Count = 0, Go to Repeat the waveform.
Time Period = 24 * 139sec = 3336 sec
Frequency = 1/3336sec = 299.76019 Hz 300 Hz
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