Unit-4 - Assembly Language Programming Basics (Merged)
Unit-4 - Assembly Language Programming Basics (Merged)
(MPI)
GTU # 3160712
Unit-4:
Assembly Language
Programming Basics
PART-I: 8085 Instruction Set
Positive Vibes:MPI is the interesting, easiest and scoring subject.
Subject Overview
Positive Vibes:MPI is the interesting, easiest and scoring subject.
Sr. No. Unit % Weightage
1 Introduction to Microprocessor 8%
2 Microprocessor Architecture and Operations 7%
3 8085 Microprocessor 12%
4 Assembly Language Programming Basics 13%
5 8085 Assembly Language Programs 12%
6 Stack & Subroutines 13%
7 I/O Interfacing 20%
8 Advanced Microprocessors 15%
Hierarchy of Languages
Hierarchy of Languages
Application Program Positive Vibes:MPI is the interesting, easiest and scoring subject.
Machine Independent
High Level Language High Level Language
Machine Specific Low Level Language
Assembly Language
• Assembly language
is a low-level
MOV BL,05h1100 1011 Machine Language programming
ADD CL 1100 1110 Native to adesigned
• language
MUL BH 0100 1111
forprocessor:
a specific type of
executed directly
processor.
Micro Program Control
by hardware
• Uses symbolic
Instructions
• names to represent
Hardware consist of registers
operations, binary
code: 1s and
and 0s
memory
locations.
Compiler
Assembler
Machine Language
Computers only deal with binary data, hence the instructions must be in binary format (0’s and
1’s).
Therefore, each Opcode is having unique bit pattern of (0’s and 1’s).
Opcode Operand
MOV Rd, Rs
M, Rs
R, M
Rd → Destination Register
Rs → Source Register
M → Memory
High-Level Language: A + B
Advantages of High-Level
Languages
Advantages of High-Level Languages
Program development is faster Positive Vibes:MPI is the interesting, easiest and scoring subject.
Assembly Language
Programming Tools
Assembly Language Programming Tools
1. Assembler Positive Vibes:MPI is the interesting, easiest and scoring subject.
2. Linker
3. Debugger
4. Editor
files(machine language).
Popular assemblers have emerged over the years for the Intel family of processors. These
include …
TASM (Turbo Assembler from Borland).
NASM (Net wide Assembler for both Windows and Linux), and
GNU assembler distributed by the free software foundation.
It combines program's object file created by the assembler with other object files and link
libraries, to produces a single executable program.
Link
Source Object
Assembler Libraries
File File
Some editors provide syntax highlighting features and can be customized as per programming
environment.
Classification of
8085 Instructions
Classification of 8085 Instructions
Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Classification of 8085 instructions
An instruction is a binary pattern designed inside a microprocessor to perform a specific
Positive Vibes:MPI is the interesting, easiest and scoring subject.
function.
Each instruction is represented by an 8-bit binary value called Op-Code.
The entire group of instructions that a microprocessor supports is known as an Instruction Set.
MVI D, 8BH
Opcode Operand
Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Positive Vibes:MPI is the interesting, easiest and scoring subject.
LDA 2050H
Registers Memory
02 2000
A
04 …
B C 0A ..
06 .
D E
0F 2049
H L 0D 2050
05 2051
03 2052
Registers Memory
02 0001
A
04 0002
B 00 06 C 0A 0003
06 0004
D E
0F 0005
H L 0D 0006
05 0007
03 0008
Registers
A
B
D
H 20 34 L
Registers Memory
02 0001
A
04 0002
B C 0A 0003
06 0004
D E
0F 0005
H L 0D 0006
05 0007
03 0008
Memory
0001
0002
H A2 D3 L 0003
0004
D A2 03 E D D3 08 E
H D3 08 L H A2 03 L
SP (16)
H A2 D3 L
Registers Memory
0001
3F 0002 SP
H A2 D3 L 0003
2C SP
0004
SP <- SP-1
SP <- B ;transfer high order bit to TOS
SP <- SP-1
SP <- C ;transfer low order bit to TOS
Registers Memory
A SP 23 0008
SP 06 0007
B 06 40 C SP 40 0006
D E 0005
0004
H L 0003
0002
0001
Opcode Operand
Registers Memory
SP 03 0008
A
SP 06 0007
B 06 40 C SP 40 0006
D 0005
E
0004
H L 0003
0002
0001
POP B
C <- SP ; transfer to low order bit from TOS
SP <- SP+1
Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Positive Vibes:MPI is the interesting, easiest and scoring subject.
Arithmetic Instructions
1 ADD R/M Add register or memory, to the accumulator 1 Byte
2 ADC R/M Add register to the accumulator with carry 1 Byte
Positive Vibes:MPI is the interesting, easiest and scoring subject.
3 ADI 8-bit data Add the immediate to the accumulator 2 Byte
4 ACI 8-bit data Add the immediate to the accumulator with carry 2 Byte
Arithmetic Instructions
5 DAD Rp Add the register pair to H and L registers 1 Byte
6 SUB R/M Subtract the register/memory from accumulator 1 Byte
7 SBB R/M Subtract the source and borrow from accumulator 1 Byte
8 SUI 8-bit data Subtract the immediate from the accumulator 2 Byte
9 SBI 8-bit data Subtract immediate from accumulator with borrow 2 Byte
10 INR R/M Increment the register or the memory by 1 1 Byte
11 INX Rp Increment register pair by 1 1 Byte
12 DCR R/M Decrement the register or the memory by 1 1 Byte
13 DCX Rp Decrement register pair by 1 1 Byte
14 DAA Decimal adjust accumulator 1 Byte
A
B 02 08 C
D E +
H 02
04 0B
03 L 02 03
04 0B
DAD B
Opcode Operand
DAA None • The contents of the accumulator is DAA
changed from a binary value to two 4-
bit BCD digits.
• If the value of the low-order 4-bits in
the accumulator is greater than 9 or if
AC flag is set, the instruction adds 6
to the low-order four bits.
• If the value of the high-order 4-bits in
the accumulator is greater than 9 or if
the Carry flag is set, the instruction
adds 6 to the high-order four bits.
Registers
1 11
A 2A 0010 1010
B C +0000 0110
D E 0 01 1 0 00 0
H L
Valid BCD number
30
Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Positive Vibes:MPI is the interesting, easiest and scoring subject.
Branch Instructions
1 JMP Jump unconditionally 3 Byte
2 JC Jump on carry 3 Byte
3 JNC Jump on no carry 3 Byte
4 JP Jump on positive 3 Byte
5 JM Jump on minus 3 Byte Positive Vibes:MPI is the interesting, easiest and scoring subject.
6 JZ Jump on zero 3 Byte
7 JNZ Jump on no zero 3 Byte
8 JPE Jump on parity even 3 Byte
9 JPO Jump on parity odd 3 Byte
10 CALL Call unconditionally 3 Byte
11 CC Call on carry 3 Byte
Branch Instructions
Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Positive Vibes:MPI is the interesting, easiest and scoring subject.
Opcode Operand
CMP R/M The contents of the operand (register or CMP B
memory) is compared with the contents CMP M
of the accumulator. Both contents are
preserved. The result of the comparison
is shown by setting the flags:
1. if (A) < (reg/mem): carry flag is
set(1).
2. if (A) = (reg/mem): zero flag is
set(1).
3. if (A) > (reg/mem): carry and zero
flags are reset(0).
RLC
A:Accumulator
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
0 1 0 1 0 0 0 1
A:Accumulator
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
1 0 1 0 1 0 0
CY
A:Accumulator
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
0 1 0 1 0 0 0
CY
0
Rotate the accumulator left through carry
A:Accumulator
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 0 1 0 0 0
1 0 1 0 1 0 0
CY
1
A 2A CMA
0010 1010
1101 0101
D 5
Control Instructions
Three-byte Instructions
Requires three memory locations
to perform an operation
E.g. JMP, CALL
Positive Vibes:MPI is the interesting, easiest and scoring subject.
Control Instructions
Positive Vibes:MPI is the interesting, easiest and scoring subject.
Control Instructions
2 HLT Halt 1 Byte
3 DI Disable interrupts 1 Byte
4 EI Enable interrupts 1 Byte
5 RIM Read interrupt mask 1 Byte
6 SIM Set interrupt mask 1 Byte
Opcode Operand
NOP None • No operation is performed. The instruction NOP
is fetched and decoded. However no
operation is executed.
• It is used to increase processing time of
execution.
• 1 CPU cycle is "wasted" to execute a NOP
instruction.
HLT None The CPU finishes executing the current HLT
instruction and stops further execution. An
interrupt or reset is necessary to exit from the
halt state.
D7 D6 D5 D4 D3 D2 D1 D0
SOD SDE X R7.5 MSE M7.5 M6.5 M5.5
D7 D6 D5 D4 D3 D2 D1 D0
Accumulator SOD SDE X R7.5 MSE M7.5 M6.5 M5.5
Opcode Operand
RIM None This is a multipurpose instruction used to RIM
1. Read the status of interrupts 7.5, 6.5, 5.5
2. Read serial data input bit.
It reads eight bits from accumulator with
following interpretations.
A:Accumulator
D7 D6 D5 D4 D3 D2 D1 D0
SID I7 I6 I5 IE 7.5 6.5 5.5
Control Instructions
2 HLT Halt 1 Byte
3 DI Disable interrupts 1 Byte
4 EI Enable interrupts 1 Byte
5 RIM Read interrupt mask 1 Byte
6 SIM Set interrupt mask 1 Byte
1. Explain the SIM and RIM instructions of the 8085 microprocessor. 3 S’19
2. Explain the Functions of following instructions: 3 W’19
i. RAL
ii. LDAX
iii. ADC
3. Explain the Functions of following instructions: 3 W’19
i. RLC
ii. LHLD
iii. SBB
Mobile 8085 and 8086 Microprocessor Opcodes app from Play Store:
Application http://tiny.cc/aopcodes
Thank You
Microprocessor and Interfacing
(MPI)
GTU # 3160712
Unit-4:
Assembly Language
Programming Basics
PART-II: 8085 Assembly Program Basics
Positive Vibes:MPI is the interesting, easiest and scoring subject.
Subject Overview
Positive Vibes:MPI is the interesting, easiest and scoring subject.
Sr. No. Unit % Weightage
1 Introduction to Microprocessor 8%
2 Microprocessor Architecture and Operations 7%
3 8085 Microprocessor 12%
4 Assembly Language Programming Basics 13%
5 8085 Assembly Language Programs 12%
6 Stack & Subroutines 13%
7 I/O Interfacing 20%
8 Advanced Microprocessors 15%
For example:
MVI B,20H
LXI D,1034H
ADI 45H
SUI 30H
CPI 68H
For example:
LDA 1035H ; here 1035 is 16-bit memory address
IN 02H ; 02 is 8-bit I/O port address
OUT 03H ; 03 is 8-bit I/O port address
For example:
MOV A,B ; A B
ADD B ; A A+B
DAD H ; HL HL+RP
For example:
XTHL
SPHL
PCHL
The comment should explain what is intended; they should not explain mnemonics.
Comment is optional.
Example:
MOV A,B ; Move data from B to A
MOV A,B ; send data to accumulator for processing
If the code doesn’t work, it is essential to search carefully for errors in programming logic,
machine codes and execution.
How to Debug machine code:
Translating assembly to machine code is similar to building a circuit.
Following errors are common:
1. Writing a wrong code.
2. Specifying the wrong jump location.
3. Writing memory address in decimal, thus specifying wrong jump location.
4. Writing lower order and higher order bits in wrong sequence.
memory location.
Start
Store result
[1007] <- A
End
Operation T-States
Opcode Fetch 4-6T
Memory Read 3T
Memory Write 3T
I/O Read 3T
I/O Write 3T
Operation M/C
Fetch (F) 1
Memory Read (MEMR) 1
Memory Write (MEMW) 1
I/O Read (IOR) 1
I/O Write (IOW) 1
Read Immediate Data (R) 1
Machine Cycle:
1(F) = 1 Machine Cycle
Timing Cycle:
= 4T (Fetch)
02 0001
A
04 0002
B C 0A 0003
06 0004
D E
0F 0005
H L 0D 0006
05 0007
03 0008
LHLD 0006H
2. SHLD 2470
3. SPHL
4. DAA
5. INR R/M
6. JMP
7. PCHL
8. CMP R/M
9. RRC
10. RIM
11. SIM
12. ORA R/M
13. XCHG
14. DI
15. EI
Timing Diagram
Opcode Fetch
T1 T2 T3 T4
Positive Vibes:MPI is the interesting, easiest and scoring subject.
CLK
A15
High order memory address Unspecified
A8
AD7 Low order
Opcode
AD0 M/m addr.
ALE
IO/M
RD
Memory read cycle
T1 T2 T3 T4
Positive Vibes:MPI is the interesting, easiest and scoring subject.
CLK
A15
High order memory address
A8
AD7 Low order
Data from memory
AD0 M/m addr. S1 S0 Mode
0 0 HLT
0 1 WRITE
1 0 READ
ALE
IO/M
S0 IO/M=0, S1=1 , S0=0
S1
RD
Memory write cycle
T1 T2 T3 T4
Positive Vibes:MPI is the interesting, easiest and scoring subject.
CLK
A15
High order memory address
A8
AD7 Low order Data from
AD0 M/m addr. Microprocessor S1 S0 Mode
0 0 HLT
0 1 WRITE
1 0 READ
ALE
IO/M
S1 IO/M=0, S1=0 , S0=1
S0
WR
I/O read cycle
T1 T2 T3 T4
Positive Vibes:MPI is the interesting, easiest and scoring subject.
CLK
A15
High order I/O address
A8
AD7 Low order
I/O data
AD0 I/O addr. S1 S0 Mode
0 0 HLT
0 1 WRITE
1 0 READ
ALE
S0
A15
High order I/O address
A8
AD7 Low order Data from
AD0 I/O addr. Microprocessor S1 S0 Mode
0 0 HLT
0 1 WRITE
1 0 READ
ALE
S1
CLK
AD7
Low order Low order Data from
M/m addr. Opcode M/m addr.
AD0 memory
ALE
IO/M
RD
Timing Diagram : MVI A, 32H
Opcode Fetch Memory Read
T1 T2 T3 T4 T5 T6 T7
Positive Vibes:MPI is the interesting, easiest and scoring subject.
CLK
AD7
Low order Low order Read
M/m addr. Opcode M/m addr.
AD0 Immediate
ALE
IO/M
RD
Calculate Execution time of MVI A,32H
Given: Clock Frequency (f) = 2 MHz Positive Vibes:MPI is the interesting, easiest and scoring subject.
Calculation:
1 1
Step-1: T-state = clock period = = = 0.5 sec
𝑓 2
Step-2: Execution time for Opcode Fetch
= 4T x 0.5 = 2sec
Step-3: Execution time for Memory Read
= 3T x 0.5 = 1.5sec
Step-4: Execution time for Instruction
= (4T + 3T) x 0.5
= 7T x 0.5
= 3.5sec
CLK
A15
High order Unspecifi High order memory
Port address 02H
A8 memory address ed address
ALE
IO/M
RD
IOW
Timing Diagram : IN 02H
CLK
A15
High order memory Unspecifi High order memory
Port address 02H
A8 address ed address
ALE
IO/M
RD
IOR
GTU Exam Questions
Sr. Questions Marks
Positive Vibes:MPI is the interesting, easiest and scoring subject. Year
1. Draw the timing diagram of following instruction of the 8085 microprocessor. 7 W’17
i. OUT 50h W’18
ii. MOV A, B S’18
iii. MVI A, 8bit S’19
2. How many machine cycles are executed by 8085 microprocessor? List down it. 1 S’18
3. Explain various addressing modes of 8085 microprocessor. 7 S’18
W’18
W’19
4. Identify the machine cycles in the following instructions 7 W’18
1. SUB B
2. ADI 47H
3. STA 2050H
4. PUSH B
Mobile 8085 and 8086 Microprocessor Opcodes app from Play Store:
Application http://tiny.cc/aopcodes
Thank You