JAIPUR ENGINEERING COLLEGE AND RESEARCH CENTER

Department of Computer Science and Engineering

Branch: Computer Science and Engineering Semester: 4th
Course Name: MICROPROCESSOR & INTERFACES LAB Code: 4CS4-21
External Marks: 40 Practical hrs: 3hr/week
Internal Marks: 60 Total Marks: 100

VISION & MISSION

VISION
To become renowned Centre of excellence in Computer Science and Engineering
and make competent engineers & professionals with high ethical values prepared for
lifelong learning.
MISSION

M1: To impart outcome-based education for emerging technologies in the field of

Computer Science and Engineering.
M2: To provide opportunities for interaction between academia and industry.
M3: To provide platform for lifelong learning by accepting the change in technologies
M4: To develop aptitude of fulfilling social responsibilities

PROGRAM EDUCATIONAL OBJECTIVES

PEO1: To provide students with the fundamental of Engineering Sciences with more
emphasis in Computer Science and Engineering by way of analysing and exploiting
engineering challenges.
PEO2: To train students with good scientific and engineering knowledge so as to
comprehend,
Analyse, design, and create novel products and solutions for the real-life problems in
Computer Science and Engineering
PEO3: To inculcate professional and ethical attitude, effective communication skills,
Teamwork skills, multidisciplinary approach, entrepreneurial thinking and an ability to
relate engineering issues with social issues for Computer Science and Engineering.
PEO4: To provide students with an academic environment aware of excellence,
leadership, written ethical codes and guidelines, and the self-motivated life-long
learning needed for a successful professional career in Computer Science and
Engineering.
PEO5: To prepare students to excel in Industry and Higher education by Educating
Students along with high moral values and knowledge in Computer Science and
Engineering.
 PROGRAM OUTCOMES
PO1. Engineering Knowledge: Apply the knowledge of mathematics, science,
engineering fundamentals, and computer science engineering specialization to the
solution of complex computer science engineering problems.
PO2. Problem Analysis: Identify, formulate, research literature, and analyze complex
computer science engineering problems reaching substantiated conclusions using
first principles of mathematics, natural sciences, and engineering sciences.
PO3. Design/Development of Solutions: Design solutions for complex computer
science engineering problems and design system components or processes that
meet the specified needs with appropriate consideration for the public health and
safety, and the cultural, societal, and environmental considerations.
PO4. Conduct Investigations of Complex Problems: Use research-based knowledge
and research methods including design of computer science engineering
experiments, analysis and interpretation of data, and synthesis of the information to
provide valid conclusions.
PO5. Modern Tool Usage: Create, select, and apply appropriate techniques,
resources, and modern computer science engineering and IT tools including
prediction and modeling to complex computer science engineering activities with an
understanding of the limitations.
PO6. The Engineer and Society: Apply reasoning informed by the contextual
knowledge to assess societal, health, safety, legal and cultural issues and the
consequent responsibilities relevant to the professional computer science
engineering practice.
PO7. Environment and Sustainability: Understand the impact of the professional
computer science engineering solutions in societal and environmental contexts, and
demonstrate the knowledge of, and need for sustainable development.
PO8. Ethics: Apply ethical principles and commit to professional ethics and
responsibilities and norms of the computer science engineering practice.
PO9. Individual and Team Work: Function effectively as an individual, and as a
member or leader in diverse teams, and in multidisciplinary settings.
PO10. Communication: Communicate effectively on complex computer science
engineering activities with the engineering community and with society at large, such
as, being able to comprehend and write effective reports and design documentation,
make effective presentations, and give and receive clear instructions.
P11. Project Management and Finance: Demonstrate knowledge and understanding
of the computer science engineering and management principles and apply these to
one’s own work, as a member and leader in a team, to manage projects and in
multidisciplinary environments.
P12. Life-Long Learning: Recognize the need for, and have the preparation and
ability to engage in independent and life-long learning in the broadest context of
computer science engineering change.

MAPPING OF PEOs with POs

PROGRAM PROGRAM OUTCOMES

EDUCATIONAL
OBJECTIVES PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12

PEO1 H L H

PEO2 M H M H H L H

PEO3 L H M H L M

PEO4 L M H M H M

PEO5 M M

COURSE OUTCOMES

CO1. To understand the Assembly Level Programming concepts.

CO2. Design and Implement Programs on 8085 Microprocessor Trainer-kit.

MAPPING OF COs with POs

SUBJECT NAME & CODE: MICROPROCESSOR LAB (4CS7A)

CO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12

CO1 H M H L H L M M L M M H

CO2
H M H M H M L L M M L H
 SYSTEM INTRODUCTION

GENERAL DESCRIPTION

VMC-850X series Kit is a single board MICROPROCESSOR TRAINING/

DEVELOPMENT KIT configured around the most widely used Microprocessor of
today’s world. Based on 8085 Microprocessor, it can be used to train engineers to
control any industrial process and to develop software for 8080 and 8085 based
systems.

The VMC-850X communicates with the outside world through a key board having 28
keys and seven segment hexadecimal display. The kit also has the capability of
interacting with CRT Terminal and IBM PC compatible computer system through the
serial interface provided on the board. VMC-850X provides 8K/32K bytes of RAM and
8K bytes of EPROM. The total on board memory can be very easily expanded to 64K
bytes in an appropriate combination of RAM and ROM. The monitor is incorporated
from 0000-1FFF and the necessary 8K bytes of RAM has an address of 2000-3FFF.

The Input/Output structure of VMC-8501 provides 24 programmable I/O lines using

8255. It has got 16-bit programmable Timer/Counter for generating any type of
counting etc. The Input/Output structure of VMC-8502 is same as VMC- 8501 and it
has additional feature of 22 I/O lines and a 14-bit Timer/Counter facility using 8155.7

The on-board resident system monitor software is very powerful and provides
various software utilities. The kit provides various powerful software commands like
INSERT, DELETE, BLOCK MOVE, RELOCATE, STRING, FILL & MEMORY COMPARE etc.
which are very helpful in debugging/developing the software.

'MC-850X is configured around the internationally adopted STD Bus, which is the
most popular bus for process control and real time applications. All the address,
data and control lines are available at the edge connector. The Kit is fully expandable
for any kind of application.

SYSTEM SPECIFICATION FOR VMC-8501

CPU 8-bit Microprocessor, the 8085

MEMORY Total on board capacity of 64K bytes

RAM 8K/32K bytes and space for further expansion

ROM 8K bytes of EPROM loaded with powerful program

TIMER 16-bit programmable timer/counter using 8253

I/O 24 I/O lines using 8255

KEYBOARD 10 keys for command

16 keys for hexadecimal data entry

1 key for vector interrupt & 1 key for reset

LED DISPLAY 6 seven segment display (4 for address field & 2 for data field)

BUS All data, address and control signals (TTL compatible)

INTERFACE RS-232-C through SID/SOD lines (optional)

POWER SUPPLY +5V, 1.5Amp for the kit

REQUIREMENT +12V +5%, 250mA for CRT/PC interface

OPERATING TEMPERATURE 0 to 50°C

SYSTEM CAPABILITIES (KEYBOARD MODE)

1. Examine the contents of any memory location.

2. Examine/Modify the contents of any of the internal register.

3. Modify the contents of any of the RAM location.

4. Move a block of data from one location to another location.

5. Insert one or more instructions in the user program.

6. Delete one or more instructions from the user program.

7. Relocate a program written for some memory area to some other memory area.

8. Find out a string of data lying at a particular address.

9. Fill a particular memory area with a constant.

10. Compare two blocks of memory.

11. Insert one or more data bytes in the user's program/data area.

12. Delete one or more data bytes from the user's program/data area.
13. Execute a program at full clock speed.

14. Execute a program in single step i.e. instruction by instruction.

HARDWARE DESCRIPTION

GENERAL

The system has got 8085 as the Central Processing Unit. The clock frequency for the
system is 3.07 MHz and is generated from a crystal of 6.14 MHz. 8085 has got 8
data lines and 16 address lines. The lower 8 address lines and 8-bit data lines are
multiplexed. Since the lower 8 address bits appear on the bus during the first clock
cycle of a machine cycle and the 8-bit data appears on the bus during the 2nd and
3rd clock cycle, it becomes necessary to latch the lower 8 address bits during the
first clock cycle so that the 16-bit address remains available in subsequent cycles.
This is achieved using a latch 74-LS-373.

MEMORY

(VMC-850X provides 8/32K bytes of RAM using 6264/62256 chip and 8K bytes of
EPROM for monitor. There is one memory space provided on VMC-850X. This one
space can be defined any address slots from 8000-DFFF depending upon the size of
the memory chip to be used. Total onboard memory can be extended to 64K bytes.

I/O DEVICES

The various I/O chips used in VMC-8501 are 8279, 8255 & 8253 and VMC-8502 are
8279, 8255, 8253 & 8155. The functional role of all these chips is given below:

8279 (Keyboard & Display Controller)

8279 is a general-purpose programmable keyboard and display I/O interface device

designed for use with the 8085 microprocessors. It provides a scanned interface to
28 contact key matrix provided in VMC-850X and scanned interface for the six seven
segment displays. 8279 has got 16 x 8 display RAM which can be loaded or
interrogated by the CPU. When a key is pressed, its corresponding code is entered in
the FIFO queue of 8279 and can now be read by the microprocessor. 8279 also
refreshes the display RAM automatically.

8255 (Programmable Peripheral Interface)

8255 is a programmable peripheral interface (PPI) designed to use with 8085

Microprocessor. This basically acts as a general purpose I/O device to interface
peripheral equipment to the system bus. It is not necessary to have an external logic
to interface with peripheral devices since the functional configuration of 8255 is
programmed by the system software. It has got three Input/Output ports of 8 lines
each (PORT-A, PORT-B & PORT-C). Port C can be divided into two ports of 4 lines
each named as Port Cupper and Port Clower. Any Input/Output combination of Port
A, Port B, Port Cupper and lower can be defined using the appropriate software
commands. The port addresses for these ports are given in Chapter-6. VMC-850X
provides 24 Input/Output ports using 8255 chips.

8253 (Programmable Internal Timer)

This chip is a programmable interval Timer/Counter and can be used for the
generation of accurate time delays under software control. Various other functions
that can be implemented with this chip are programmable rate generator, Even
Counter, Binary rate Multiplier, Real Time Clock etc. This chip has got three in
dependent 16-bit counters each having a count rate of up to 2KHz. The first
Timer/Counter (i.e. Counter 0) is being used for Single Step operation. However, its
connection is also brought at connector space C4. For single step operation CLKO
signal of Counter 0 is getting a clock frequency of 1.535 MHz. The counter 1 is used
to generate clock for 8251. Counter 1 & Counter 2 are free for the user. Clock for the
CLK1, CLK2 is to be given externally.

8155 (Programmable I/O Port & Timer Interface) Optional (only in Model VMC-8502)

8155 is a programmable I/O ports and timer interface designed to use with 8085
Microprocessor. The 8155 includes 256 bytes of R/W memory, three I/O ports and a
Timer. This basically acts as a general purpose I/O device to interface peripheral
equipment to the system bus. It is not necessary to have an external logic to
interface with peripheral devices since the functional configuration of 8155 is
programmed by the system software. It has got two 8-bit parallel I/O port (Port-A,
Port-B) and one 6-bit (Port-C). Ports A & B also can be programmed in the handshake
mode, each port using three signals as handshake signals from Port-C. The timer is
a 14-bit down counter and has four modes.VMC-8502 optionally provides 22 I/O
ports & a 14-bit timer/counter.

8251 (USART)

This chip is a programmable communication interface and is used as a peripheral

device. This device accepts data characters from the CPU in parallel format and then
converts them into serial data characters for the CPU. This chip will signal the CPU
whenever it can accept a new character for transmission or whenever it has received
a character from the CPU. The CPU can read the complete status of it at any time.
One such chip is used in VMC-8503A Kit and these can be used for interfacing any
serial device. The connections of 8251 is brought at connector C5.

DISPLAY

VMC-850X provides six digits of seven segment display. Four digits are for
displaying the address of any location or name of any register, whereas the rest. of
the two digits are meant for displaying the contents of a memory location or of a
register. All the six digits of the display are in hexadecimal notation.

KEYBOARD DESCRIPTION

VMC-850X has 28 keys and six-seven segment display to communicate with the
outside world. As VMC-850X is switched on, a message -'UP 85' is displayed on the
display and all keys are in command mode. The key board is as shown below:

Keyboard Key-Description

RESET Reset the system.

VCT INT Hardware interrupt via keyboard, RST 7.5.

SHIFT Provides a second level command to all keys.

GO To execute the program.

SI To execute the program in single step mode.

EXREG Examine Register; allows user to examine and modify the contents of
different registers.

EXMEM Examine Memory; allows user to examine any memory location and
modify any RAM location.

PRE Previous is used as an intermediate terminator in case of Examine

Memory. It decrements the PC contents and writes the contents of
data field to the address displayed in the address location.

NEXT Increment is used as a intermediate terminator in case of Examine

Memory, Examine Register etc. It increments the PC Contents and
writes the data lying in data field at the location displayed at address
field.

‘‘ . ’’ Terminator is used to terminate the command and write the data in

data field at the location displayed in address field.

DEL Delete the part of program or data, with relocation by one or more
bytes.

INS Inserts the part of the program or data with relocation, by one or more
bytes.

B.M. Allows user to move a block of memory to any RAM area.

FILL Allows user to fill RAM area with a constant.

REL Relocates a program written for some memory area and to be

transferred to other memory area.

INS DATA Inserts one or more data bytes in the user's program/ data area.

DEL DATA Deletes one or more data bytes from the user's program/ data area.

STRING Finds out the string of data lying at a particular address or addresses.

MEMC Memory Compare: Compares two blocks of memory for equality.

0-F Hexadecimal Keys.

LIST OF COMMANDS

1. RESET

2. EXAMINE/MODIFY REGISTER

3. EXAMINE/MODIFY MEMORY

4. GO

5. SINGLE INSTRUCTION

6. BLOCK MOVE

7. DELETE

8. INSERT

9. RELOCATE

10. FILL

11. STRING

12. MEMORY COMPARE

13. INSERTDATA

14. DELETE DATA