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Microprocessor Question and Problems Chapter 4

The document is an assignment for a Microprocessor System course, containing various questions and problems related to machine language instructions and microprocessor operations. It includes detailed answers to questions about instruction formats, register operations, memory addressing, and assembly language directives. The assignment was submitted by Diego Jay G. Vasquez to Professor Engr. Dhon Nino Canela on April 29, 2017.

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0% found this document useful (0 votes)
86 views7 pages

Microprocessor Question and Problems Chapter 4

The document is an assignment for a Microprocessor System course, containing various questions and problems related to machine language instructions and microprocessor operations. It includes detailed answers to questions about instruction formats, register operations, memory addressing, and assembly language directives. The assignment was submitted by Diego Jay G. Vasquez to Professor Engr. Dhon Nino Canela on April 29, 2017.

Uploaded by

Sumama Mir
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Manuel S.

Enverga University Foundation


Lucena City, Philippines
……………………………………………………………………….
Granted Autonomous Status

Expanded Tertiary Education Equivalency and Accreditation Program


(ETEEAP)
College of Engineering

(Assignment # 2)

ASSIGNMENT IN
MICROPROCESSOR SYSTEM
(CHAPTER 4 PROBLEMS & QUESTIONS)

SUBMITTED BY:

DIEGO JAY G. VASQUEZ


Bachelor of Science in Computer Engineering
April 29, 2017

SUBMITTED TO:

ENGR. DHON NINO CANELA


Professor

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Problems and Questions-CHAPTER 4

QUESTIONS AND PROBLEMS


1. The first byte of an instruction is the ____________, unless it contains one of the override prefixes.
Answer: Opcode

2. Describe the purpose of the D- and W-bits found in some machine language instructions.
Answer: The D-bit indicates the direction of flow for the data (REG to R/M or R/M to REG) and the
W-bit indicates the size of the data (byte or word/doubleword).

3. In a machine language instruction, what information is specified by the MOD field?


Answer: The MOD field specifies the type of access for the R/M field and the size of the
displacement

4. If the register field (REG) of an instruction contains 010 and , what register is
selected, assuming that the instruction is a 16-bit mode instruction?
Answer: DL

5. How are the 32-bit registers selected for the Pentium 4 microprocessor?
Answer: If operated in the 16-bit mode, a register-size and/ or address-size prefix is used to specify
a 32-bit register.

6. What memory-addressing mode is specified by with for a 16-bit instruction?


Answer: DS:[BX+DI]

7. Identify the default segment registers assigned to the following:


(a) SP =SS
(b) EBX= DS
(c) DI= DS
(d) EBP= SS
(e) SI= DS

8. Convert an 8B07H from machine language to assembly language.


Answer: MOV AL,[BX]

9. Convert an 8B9E004CH from machine language to assembly language.


Answer: MOV BX, ,[BP+2]

10. If a MOV SI,[BX+2] instruction appears in a program, what is its machine language equivalent?
Answer: 8B 77 02

11. If a MOV ESI,[EAX] instruction appears in a program for the Core2 microprocessor operating in the
16-bit instruction mode, what is its machine language equivalent?
Answer: 67 66 8B 30

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12. What is the purpose of REX?
Answer: The REX prefix, which is used in the 64-bit flat mode, is the register extension that allows
the 64-bit registers to be addressed in an instruction.

13. What is wrong with a MOV CS,AX instruction?


Answer: The contents of CS will change causing an unpredictable jump.

14. Form a short sequence of instructions that load the data segment register with a 1000H.
Answer: MOV AX,1000H MOV DS,AX

15. The PUSH and POP instructions always transfer a(n) ____________ -bit number between the stack and a
register or memory location in the 80386–Core2 microprocessors when operated in the 32-bit mode.
Answer: 32

16. Create an instruction that places RAX onto the stack in the 64-bit mode for the Pentium 4.
Answer: PUSH RAX

17. What segment register may not be popped from the stack?
Answer: CS

18. Which registers move onto the stack with the PUSHA instruction?
Answer: AX, CX, DX, BX, SP, BP, SI, and DI

19. Which registers move onto the stack for a PUSHAD instruction?
Answer: EAX, EBX, ECX, EDX, ESP, EBP, EDI and ESI

20. Describe the operation of each of the following instructions:


(a) PUSH AX - AX is copied to the stack.
(b) POP ESI - A 32-bit number is retrieved from the stack and placed into ESI.
(c) PUSH [BX]- The word contents of the data segment memory location addressed by BX is pushed
onto the stack.
(d) PUSHFD – EFLAGS are pushed onto the stack.
(e) POP DS - A word is retrieved from the stack and placed into DS.
(f) PUSHD 4- A 32-bit number 4 is pushed onto the stack.

21. Explain what happens when the PUSH BX instruction executes. Make sure to show where BH and BL
are stored. (Assume that SP = 0100H and .)
Answer: The BH register is moved to memory location 020FFH and the BL register is moved to
location 020FEH then SP is changed to 00FEH.

22. Repeat question 21 for the PUSH EAX instruction.

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Answer: Bits 24–31 of EAX are stored in location 020FFH, bits 16–23 of EAX are stored into location
020FEH, bits 8–15 of EAX are stored into location 020FDH, and bits 0–7 of EAX are stored into
location 020FCH. SP is then decremented by 4 to a value of 00FCH.

23. The 16-bit POP instruction (except for POPA) increments SP by ____________.IV SI,OFFSET NUMB
instruction?
Answer: Both instruction load the address of NUMB into DI. The difference is that the MOV
DI,OFFSET NUMB assembles as a move immediate and the LEA DI,NUMB assembles as an LEA
instruction.

27. Which is more efficient, a MOV with an OFFSET or an LEA instruction?


Answer: The MOV with the offset directive.

28. Describe how the LDS BX,NUMB instruction operates.


Answer: The LDS BX,NUMB instruction loads BX with the word stored at data segment memory
location NUMB and DS is loaded from the data segment memory location addressed by NUMB+2.

29. What is the difference between the LDS and LSS instructions?
Answer: LDS loads DS and LSS loads SS along with another 16-bti register for the offset address.

30. Develop a sequence of instructions that moves the contents of data segment memory locations NUMB
and NUMB+1 into BX, DX, and SI.
Answer: MOV BX,NUMB MOV DX,BX MOV SI,DX

31. What is the purpose of the direction flag?


Answer: If the direction flag is cleared it selects auto-increment for the string instructions and if
the direction flag is set is selects auto-decrement.

32. Which instructions set and clear the direction flag?


Answer: CLD clears the direction flag and STD sets the direction flag.

33. Which string instruction(s) use both DI and SI to address memory data?
Answer: MOVS

34. Explain the operation of the LODSB instruction.


Answer: The LODSB instruction copies a byte of data from the data segment memory location
addressed by SI into the AL register and then increments SI by one if the direction flag is cleared.

35. Explain the operation of the LODSQ instruction for the 64-bit mode of the Pentium 4 or Core2.
Answer: A 4-bit number is loaded into RAZ from the data segment memory location addressed by
ESI and then ESI is either incremented or decrement by 8 depending on the setting of the direction
flag.

36. Explain the operation of the OUTSB instruction.

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Answer: The OUTSB instruction sends the contents of the data segment memory location
addressed by SI to the I/O port address by DX, then SI is incremented by one if the direction flag is
cleared.

37. Explain the operation of the STOSW instruction.


Answer: The STOSW instruction copies AX into the extra segment memory location addressed by DI
then DI is either incremented or decremented by two as dictated by the direction flag.

38. Develop a sequence of instructions that copy 12 bytes of data from an area of memory addressed by
SOURCE into an area of memory addressed by DEST.
Answer: MOV SI,OFFSET SOURCE MOV DI,OFFSET DEST MOV CX,12 REP MOVSB

39. What does the REP prefix accomplish and what type of instruction is it used with?
Answer: The REP prefix repeats a string instruction CX number of times.

40. Select an assembly language instruction that exchanges the contents of the EBX register with the ESI
register.
Answer: XCHG EBX,ESI

41. Where is the I/O address (port number) stored for an INSB instruction?
Answer: DX register

42. Would the LAHF and SAHF instructions normally appear in software?
Answer: The LAHF and SAHF instructions in non-64-bit application with the arithmetic
coprocessor.

43. Write a short program that uses the XLAT instruction to convert the BCD numbers 0–9 into ASCII-
coded numbers 30H–39H. Store the ASCII-coded data in a TABLE located within the data segment.
Answer: TABLE DB 30H, 31H, 32H, 33H
DB 34H, 35H, 36H, 37H, 38H, 39H
BCD2A PROC NEAR
MOV BX, OFFSET TABLE
XLAT
RET
BCD2A ENDP

44. Explain how the XLAT instruction transforms the contents of the AL register.
Answer: The XLAT instruction passes the contents of AL to BX to form an offset address that
accesses a memory location whose content is then copied into AL.

45. Explain what the IN AL,12H instruction accomplishes.


Answer: IN AL, 12H copies the byte from I/0 device 12H into AL

46. Explain how the OUT DX,AX instruction operates.

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Answer: The OUT DX, AX instruction copies the 16-bit contents of AX into the data segment
memory location addressed by the DX register.

47. What is a segment override prefix?


Answer: The segment override prefix allows the default segment to be changed to any segment.

48. Select an instruction that moves a byte of data from the memory location addressed by the BX register
in the extra segment into the AH register.
Answer: MOV AH, ES:[BX]

49. Develop a sequence of instructions that exchanges the contents of AX with BX, ECX with EDX, and SI
with DI.
Answer: XCHG AX, BX
XCHG ECX,EDX
XCHG SI,DI
50. What is an assembly language directive?
Answer: An assembly language directive is a special command to the assembler that may or may
not generate code or data for the memory.

51. What is accomplished by the CMOVNE CX,DX instruction in the Pentium 4 microprocessor?
Answer: DX is copied into CX if a not zero or not equal condition exists.

52. Describe the purpose of the following assembly language directives: DB, DW, and DD.
Answer: The directives, DB, DW, and DD, are used to define memory as a byte (DB), a word (DW),
and a doubleword (DD).

53. Select an assembly language directive that reserves 30 bytes of memory for array LIST1.
Answer: LIST1 DB 30 dup(?)

54. Describe the purpose of the EQU directive.


Answer: The EQU (equate) directive allows a memory location to be equated to another memory
location.

55. What is the purpose of the .686 directive?


Answer: The .686 directive informs the assembler that a Pentium Pro or newer microprocessor is
the target of the assembled program.

56. What is the purpose of the .MODEL directive?


Answer: The .MODEL directive specifies the type of memory model used for a program.

57. If the start of a segment is identified with .DATA, what type of memory organization is in effect?
Answer: models

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58. If the SEGMENT directive identifies the start of a segment, what type of memory organization is in
effect?
Answer: Full segment definitions

59. What does the INT 21H accomplish if AH contains a 4CH?


Answer: The program terminates and control is passed back to the operating system.

60. What directives indicate the start and end of a procedure?


Answer: PROC indicates the start of a procedure and ENDP indicates its end.

61. Explain the purpose of the USES statement as it applies to a procedure with version 6.x of MASM.
Answer: The uses directive specifies which registers are saved on the stack at the beginning of a
procedure and popped at the end of the procedure.

62. Develop a near procedure that stores AL in four consecutive memory locations within the data
segment, as addressed by the DI register.
Answer: STORE PROC NEAR
MOV [DI],AL
MOV [DI+1],AL
MOV [DI+2],AL
MOV [DI+3],AL RET STORE ENDP

63. How is the Pentium 4 microprocessor instructed to use the 16-bit instruction mode?
Answer: If the model statement precedes the processor directive the code generated is 16-bit.

64. Develop a far procedure that copies contents of the word-sized memory location CS:DATA4 into AX,
BX, CX, DX, and SI.
Answer: COPY PROC FAR
MOV AX,CS:DATA4
MOV BX,AX
MOV CX,AX
MOV DX,AX
MOV SI,AX
RET
COPY ENDP

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