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Model Question 5

The document is an examination paper from Gujarat Technological University covering various topics related to microcontrollers, specifically the 8051 architecture and its components. It includes questions on assembler directives, the differences between Harvard and Von Neumann architectures, the functions of specific pins, and the internal architecture of the 8051 microcontroller. Additionally, it discusses special function registers (SFR) like TMOD and TCON, and provides detailed explanations of various instructions and components relevant to the 8051 microcontroller family.
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0% found this document useful (0 votes)
5 views23 pages

Model Question 5

The document is an examination paper from Gujarat Technological University covering various topics related to microcontrollers, specifically the 8051 architecture and its components. It includes questions on assembler directives, the differences between Harvard and Von Neumann architectures, the functions of specific pins, and the internal architecture of the 8051 microcontroller. Additionally, it discusses special function registers (SFR) like TMOD and TCON, and provides detailed explanations of various instructions and components relevant to the 8051 microcontroller family.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER–V • EXAMINATION – WINTER 2013


Date: 27-11-2013
Q.1
(a) Answer the following questions
(1) What is assembler directive? Explain any two assembly directives.
The assembler directives are the statements that directs the assembler what to do during
assembling. They reserve memory space for data, define constants, and tell assembler where to
assemble program in a memory. They are also referred as pseudo instructions statements as they
are effective only during the assembly of the program but they do not generate any machine
code.
Originate- ORG
The ORG directive allows us to place the code and data anywhere in the program address space.
The number after the ORG can be in hex or decimal. If the number is decimal, the assembler will
convert it to hex. Its format is ‘ORG Address’ For example, ORG 0000H will place the
instructions (or data) from address 0000H onwards (some assembler use this directive as ‘.ORG
Address’)
Define Byte- DB
This directive defines the byte type variable. When DB is used to define data, the numbers can
be in decimal, binary, hex, or ASCII formats. For the binary numbers B is as a suffix. Similarly,
H is used after hexadecimal numbers. Irrespective of the type of the byte, the assembler will
convert the byte to hex. To indicate ASCII numbers, the characters are placed in quotation marks
(‘character’).The DB is also used to allocate memory in byte sized chunks.

(2) What is the difference between Harvard and Von-Neumann architecture?


Von Neumann Architecture: It has single memory storage to hold both program instructions
and data i.e. common program and data space. The CPU can either read an instruction or data
from the memory one at a time (or write data to memory) because instructions and data are
accessed using same bus system. The Von Neumann Architecture is named after the
mathematician and computer scientist John Von Neumann. The basic organization of memory in
this architecture is shown in figure.
Von Neumann architecture
The advantage of Von Neumann architecture is simple design of microcontroller chip because
only one memory is to be implemented which in turn reduces required hardware. The
disadvantage is slower execution of a program. It is also referred as Princeton architecture as it
was developed at Princeton University. Motorola 68HC11 microcontroller is based on Von
Neumann architecture.

Harvard Architecture: It has physically separate memory storage to hold program instructions
and data i.e. separate program and data space. Since it has separate buses to access program and
data memory, it is possible to access program memory and data memory simultaneously. The
organization of memory and buses in this architecture is shown in figure.

Harvard architecture

The advantage of a Harvard architecture microcontroller is that it is faster for a given circuit
complexity because it offers greater amount of parallelism. The disadvantage is that it requires
more hardware, because two sets of buses and memory blocks are required.

(3) What is the purpose of EA pin in 8051 microcontroller?


EA/ VPP: External access
Many members of the 8051 family have on-chip ROM. EA (Pin 31) is used for selection of on-
chip or off-chip ROM, EA=1 will tell the 8051 to read a program code from on-chip (internal)
ROM and EA is grounded (EA=0) when a program code is totally contained in an external ROM
only. However, when EA = 1, any reference to program address which is outside the address
range of on-chip memory will automatically access external memory. For.

(4) Write any two differences between microprocessor and microcontroller

Microprocessor Microcontroller
Microprocessor is complete functional Microcontroller is complete functional
CPU i.e. it contains ALU, registers, microcomputer i.e. it contains the circuitry of
stack pointer, program counter, microprocessor and in addition it has built in
instruction decode and control unit and memory (ROM, RAM), I/O circuits and
interrupt processing circuits. peripherals necessary for an application.
Microprocessor instruction sets are data Microcontrollers have instruction sets that are
processing intensive, means powerful related to the control of inputs and outputs,
addressing modes and many instructions means they have many bit handling
to move data between memory and CPU instructions along with byte processing
to handle large volumes of data. instructions.

(5) What is the function of DPTR in 8051 microcontroller?


Data Pointer: DPTR
DPTR is a 16 bit register. It is used to point to data byte in external data (RAM) or program
(ROM) memory. It can be used as a single 16 bit register or can also be accessed as two separate
8 bit registers named DPL and DPH, where DPH means higher byte of the DPTR and DPL is
lower byte of the DPTR. DPL and DPH are each assigned a separate address. DPTR does not
have single address.

(6) What is content of PC and SP after RESET condition in 8051?


SP=0007H
PC=0000H

(7) What is the difference between 8031 and 89C51 microcontroller IC?

8031 is ROMless version of the 8051 and 89C51 has 4Kbytes of Flash memory (Program
memory). Moreover, 8031 is made from HMOS transistors, a letter ‘C’ in a part number
indicates that the chip is made from CHMOS transistors. The CHMOS devices have the
following advantages:
 Low power consumption
 High stability (noise immunity)
 High speed
 Support power down and idle modes

(b) Draw the internal architecture of 8051 microcontroller and explain each block in
detail.
The architectural block diagram of the 8051 is shown in figure 2.1, it shows organization of all
hardware components and data path connections between them. It includes 8 bit ALU along with
Boolean processing capabilities, program and data memory, four 8 bit I/O ports, two
timers/counters, UART, timing and control circuits and oscillator circuit.
ALU
Arithmetic and logic unit performs all arithmetic (addition, subtraction, multiplication and
division) and logical (AND, OR, NOT, EXCLUSIVE-OR and rotating) operations on 8 bit data
i.e. the 8051 has 8 bit ALU. The ALU also updates information about the nature of the result in
the flag register (PSW).
Memory
The 8051 family has separate on-chip program and data memory. The program instructions are
stored in a program memory (ROM/EPROM/EEPROM/Flash based on a family member). The
amount and type of on-chip program memory is the key factor that differentiate all the members
of the family, for example, 80C51 has 4Kbytes of on-chip ROM, whereas 80C52 has 8Kbyte
(ROM) , 87C51 has 4Kbytes (EPROM) and 87C52 has 8Kbytes(EEPROM) of on-chip program
memory. Total program memory (including on-chip ROM) that can be connected with the 8051
is 64Kbytes. Similarly, data memory can be on-chip or off-chip. Internal data memory (RAM) in
80C51 is 128 bytes and in 80C52 is 256 bytes. There are also on-chip RAM locations which are
used to program and control various on-chip hardware peripherals and features of the 8051.They
are known as Special Function Registers (SFRs). These memories are discussed in detail in the
next section.
Peripherals
The 8051 has two 16 bit timers (8052 has three timers) that are used for timing and counting
applications. It has full duplex serial port (UART) to handle serial data transmission and
reception.
Timing and control unit
This unit generates all timing and control signals necessary for the execution of instructions and
synchronizes all internal activities with the clock.
PORT0 PORT2
DRIVERS DRIVERS

PORT 0 PORT 2 EPROM/


RAM
LATCH LATCH ROM

PROGRAM
ADDR.
REGISTER

ACC STACK POINTER

BUFFER

PCON SCON TMOD TCON

T2CON TL0 TH0 TH1


TMP2 TMP1
B TL1 TH2 TL2 RCAP2L PC
REGISTER INCREMENTER
RCAP2Z SBUF IE IP

ALU
INTERRUPT, SERIAL PORT AND
TIMER BLOCK PROGRAM
COUNTER
PSW
INSTRUCTION

ALE
REGISTOR

TIMING DPTR
AND
CONTROL
RST
PORT3
PORT1 LATCH
DRIVERS

OSC
PORT3
PORT1 DRIVER
DRIVERS

XTAL1 XTAL2 P3.0-P3.7


P1.0-P1.7

Block diagram of the 8051 microcontroller


Oscillator
The 8051 has an internal (on-chip) oscillator circuit (partial circuit) which generates the clock
pulses by which all internal operations are synchronized. The external resonant circuit is
connected with this internal on-chip oscillator circuit to make a complete oscillator. Normally
quartz crystal is used to make oscillator functional. Typically 12 MHz (or 11.0592MHz to
support standard baud rates for serial port) crystal is used.

Q.2
(a) Explain TCON and TMOD Special function register (SFR) in detail.
TMOD register

Timer 1 Timer 0
GATE C/T M1 M0 GATE C/T M1 M0
MSB LSB

Bit Symbol Description


7/3 Gate Start/stop control using hardware or software. When Gate=0, start/stop of
timer is controlled only by TR1/0 bits; While Gate=1, it is controlled by
TR 1/0 as well as signal on INT1/0 pin
6/2 C/T C/T =0 configures timer as a interval timer (or time delay generator),
C/T=1 will configure timer as event counter
5/1 M1 Mode select bit 1
4/0 M0 Mode select bit 0
M1 M0
0 0 Mode 0;13 bit timer
0 1 Mode 1; 16 bit timer/counter
1 0 Mode 2; 8 bit auto reload
1 1 Mode 3; split timer mode, TL0 as 8 bit timer/counter and
TH0 as 8 bit timer controlled by control bits of timer 0 and
timer 1 respectively. Timer 1 operation timer/counter
stopped.
Refer topic 14.3.1 for detailed discussion of TMOD register.

TCON register

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0


MSB LSB

Bit Symbol Description


7 ( TCON.7) TF1 Timer 1 overflow flag; Set to 1(by hardware) when timer 1
overflows; Cleared to 0 automatically when controller vectors to
interrupt service routine at address 001BH.
6 ( TCON.6) TR1 Timer 1 run control bit; set to 1 by a program to start
timer/counter 1; Cleared to 0 to stop timer/counter 1.
5 ( TCON.5) TF0 Timer 0 overflow flag; Set to1 (by hardware) when timer 0
overflows; Cleared to 0 automatically when controller vectors to
interrupt service routine at address 000BH
4 ( TCON.4) TR0 Timer 0 run control bit; Set to 1 by a program to start
timer/counter 0; Cleared to 0 to stop timer/counter 0.
3 ( TCON.3) IE1 External interrupt 1 edge flag; Set by hardware when external
interrupt is detected on INT1 pin; Cleared by hardware when
controller vectors to interrupt service routine at address 0013H
only when interrupt is configured as an edge triggered interrupt
(see IT1 bit below)
2 ( TCON.2) IT1 External Interrupt 1 signal type control bit; set to 1 by a program
to configure interrupt 1 as a edge triggered (falling edge); cleared
to 0 to configure it as level triggered (low level)
1 ( TCON.1) IE0 External interrupt 0 edge flag; Set by hardware when external
interrupt is detected on INT0 pin; Cleared by hardware when
controller vectors to interrupt service routine at address 0003H
only when interrupt is configured as an edge triggered interrupt
(see IT0 bit below)
0 ( TCON.0) IT0 External Interrupt 0 signal type control bit; set to 1 by a program
to configure interrupt 0 as a edge triggered (falling edge); cleared
to 0 to configure it as level triggered (low level)

Refer topic 14.3.2 for detailed discussion of TCON register.

(b) Explain functions of following pins in 51 family microcontroller


(1) PSEN:
PSEN (Pin 29) is the active low output control signal used to activate (enable) external
ROM/EPROM/EEPROM. Thus, this signal acts as the read strobe (or output enable) to external
program memory
(2) EA:
EA: External access
Many members of the 8051 family have on-chip ROM. EA (Pin 31) is used for selection of on-
chip or off-chip ROM, EA=1 will tell the 8051 to read a program code from on-chip (internal)
ROM and EA is grounded (EA=0) when a program code is totally contained in an external ROM
only. However, when EA = 1, any reference to program address which is outside the address
range of on-chip memory will automatically access external memory.
(3)ALE:
ALE/: Address latch enable
When connecting the 8051 to external memory, port P0 provides both address and data i.e.
address and data are time multiplexed using P0 to save pins of the microcontroller. The ALE
(Address latch enable, Pin 30) is used for demultiplexing the address and data. ALE pulse
(ALE=1) indicates that the address is present on P0 and is used to enable external latch (normally
74LS373) which will store (and demultiplex) the address present on P0.
(4) T0
Timer/Counter 0 external input. The external pulses are applied at this pin for timer 0 as a
counter. Pin T0 (P3.4) is basically used to provide external pulses for timer 0, therefore external
pulses will increment the timer registers TL0 and TH0.
(5) RXD
RXD is receiver input (serial data input). Serial data is received through this pin
(6) INT0
INT0 (external interrupt 0)
The pins INT0 (P3.2, pin 12) is used as an external interrupt input pin. When this pin is activated
(made low), the 8051 is interrupted and jumps to interrupt vector table (0003H). The external
interrupts can be configured to be either level triggered or transition (edge) triggered interrupts.

(7) WR
WR (external Data Memory write strobe)
Write signal is activated while writing data to a RAM. It is usually connected with WE (write
enable) pin of RAM chip. Instructions MOVX @Ri, A or MOVX @DPTR, A will activate this
signal.
OR
(b) Explain following instructions of 51 family microcontrollers
(1) DA A:
DA A instruction performs the following operations. After ADD or ADDC instruction,
1) If lower nibble is greater than 9 or if AC=1, add 6 to lower nibble (4 bits)
2) If upper nibble is greater than 9 or if CY=1, add 6 to upper nibble.

When the lower nibble greater than 9 after addition


28 BCD 0010 1000
+ 12 BCD 0001 0010
40 BCD 0011 1010 3A; lower nibble is greater than 9(invalid BCD)
+ 0000 0110 add 6 to lower nibble (DA A will do it)
0100 0000 40 BCD, the desired result

When AC=1 after addition,


28 BCD 0010 1000
+ 19 BCD 0001 1010
47 BCD 0100 0001 41; AC is 1 after addition (invalid result)
+ 0000 0110 add 6 to lower nibble (DA A will do it)
0100 0111 47 BCD, the desired result

(2) DEC A
Decrement content of accumulator by 1.
DEC A // Decrement the contents of A by 1, A=A–1
DEC A // A=A–1, If A=10H→A=0FH
(3) RRC A
Rotate content of accumulator right side through carry.
RRC A // rotate A one bit position to the right through carry flag, bit D0 to CY, CY to D7,
bit D7 to D6, …, bit D2 to D1 and bit D1 to D0 as illustrated in figure5.6.
(4) DEC @R0
Decrement content of address pointed by R0 by 1.
DEC @Ri // Decrement the contents of address pointed by Ri by 1,(Ri)= (Ri) –1
DEC @R0 // (R0)= (R0) –1, If R0=10H, (10H)=55H→ (R0)=(10H)=54H

(5) ADDC A, R7
Addition of accumulator and content of R7 with carry, store the result in A

ADDC A, R7 // add contents of A, contents of R7 and carry, store result in A


// i.e. A= A+ Rn + C
ADDC A, R7 //A=A+ R7+C,If A=20H,R7=30H,C=0→A=20H+30H+0=50H, C=0

(6) SETB C
Set carry flag to logic ‘1’.
(7) SWAP A
Exchange content of lower nibble of A to higher nibble.

The operation of swap instruction is illustrated in the following figure .

Q.3
(a) Consider that switch is connected with port pin P3.2 in pull-up configuration so that
when it is pressed logic at P3.2 is 0 and 1 otherwise. 8 LEDs are connected with Port P0
using common anode configuration. Draw interfacing circuit diagram for above
requirements. Write program to monitor the switch. If switch is pressed, all LEDs should
glow and if switch is not pressed all LEDs should be OFF. Check switch continuously.
Assuming Pull-up register bank connected to port 0.

; Switch at P3.2 and common anode 8-LEDs on port 0

SWITCH EQU P3.2

ORG 0000H
SETB SWITCH // configure P3.2 as input pin
AGAIN: JB SWITCH, THERE // check status of switch, it is high, OFF LEDs
MOV P0, #00H // otherwise glow LEDs (common anode)
SJMP AGIAN
THERE: MOV P0, #0FFH // For OFF, apply FF to port (common anode)
SJMP AGIAN
END

(b) Interface LCD with 8051 microcontroller. Connect data lines with port P0, control
lines with any three port pins of port P1. Write program to display message
‘Microcontroller” on the first line and “Interfacing” on the second line.
;P0.0-P0.7 are connected to LCD data pins D0-D7, Assuming Pull-Up Register Bank on P0.
;P1.0 is connected to RS pin of LCD
;P1.1 is connected to R/W pin of LCD
;P1.2 is connected to E pin of LCD

ORG 0000H
LCALL WAIT ; Initialization of LCD by software
LCALL WAIT ; this part of program is not mandatory but
MOV A, #38H ; recommended to use because it will
LCALL COMMAND ; guarantee proper initialization even when
LCALL WAIT ; power supply reset timings are not met
MOV A, #38H
LCALL COMMAND
LCALL WAIT
MOV A, #38H
LCALL COMMAND ; initialization complete

MOV A, #38H ; Initialize LCD, 8 bit interface, 5X7 ;dots/character


LCALL COMMAND ; send command to LCD
MOV A, #0FH ; display on, cursor on with blinking
LCALL COMMAND ; send command to LCD
MOV A, #06 ; shift cursor right
LCALL COMMAND ; send command to LCD
MOV A, #01H ; clear LCD screen and memory
LCALL COMMAND ; send command to LCD
MOV A, #80H ; set cursor at line 1, first position
LCALL COMMAND ; send command to LCD
MOV A, #’M’ ; M to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’I’ ; I to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’C’ ; C to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’R’ ; R to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’O’ ; O to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’C’ ; C to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’O’ ; O to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’N’ ; N to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’T’ ; T to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’R’ ; R to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’O’ ; O to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’L’ ; L to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’L’ ; L to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’E’ ; E to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’R’ ; R to be displayed
LCALL DISPLAY ; send data to LCD for display

MOV A, #88H ; set cursor at line 2, first position


LCALL COMMAND ; send command to LCD
MOV A, #’I’ ; I to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’N’ ;N to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’T’ ; I to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’E’ ; E to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’R’ ; R to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’F’ ; F to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’A’ ; A to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’C’ ; C to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’I’ ; I to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’N’ ; N to be displayed
LCALL DISPLAY ; send data to LCD for display
MOV A, #’G’ ; G to be displayed
LCALL DISPLAY ; send data to LCD for display

HERE: SJMP HERE ; wait indefinitely


COMMAND: ; command write subroutine
MOV P0, A ; place command on P1
CLR P1.0 ; RS=0 for command
CLR P1.1 ; R/W=0 for write operation
SETB P1.2 ; E=1 for high pulse
LCALL WAIT ; wait for some time
CLR P1.2 ; E=0 for H-to-L pulse
LCALL WAIT ; wait for LCD to complete given command
RET

DISPLAY: ; data write subroutine


MOV P0, A ; send data to port 1
SETB P1.0 ; RS=1 for data
CLR P1.1 ; R/W=0 for write operation
SETB P1.2 ; E=1 for high pulse
LCALL WAIT ; wait for some time
CLR P1.2 ; E=0 for H-to-L pulse
LCALL WAIT ; wait for LCD to write given data
RET
WAIT: MOV R6, #30H ; delay subroutine
THERE: MOV R5, #0FFH
HERE1: DJNZ R5, HERE1
DJNZ R6, THERE
RET

Q.3
(a) Consider that common anode seven segment display is connected with port P0 and
switch is interfaced at port pin P1.0 of 8051 microcontroller. Draw interfacing
diagram. Write assembly language program to monitor the switch. If switch is pressed,
display “0” on common anode display and if switch is not pressed display “1” on
common anode display.

; 7 segment at port 0 assuming pull-up register bank at port 0


; Switch at P1.0

SWITCH EQU P2.0

ORG 0000H
SETB SWITCH ; Make input pin
AGAIN: MOV P0, #03FH ; 7 Seg code for '0'
ACALL DELAY
HERE: JB SWITCH, HERE
MOV P0, #06H ; 7seg code for '1'
ACALL DELAY
SJMP AGIAN

DELAY: MOV R5,#200 ; delay


THERE2: MOV R6,#255
THERE1: NOP
NOP
NOP
NOP
DJNZ R6, THERE1
DJNZ R5, THERE2
RET
END

(b) Write program to generate square wave of 1 KHz on port pin P1.7. Use timer generated
delay by timer 0 in mode 0. Consider crystal frequency 12 MHz.

1/1KHz=1000µS 1000/2=500µS 1FFF-1F4=1E0B H


For 13-bit adjustment it gives F00B H

; P1.7 Square wave on pin


SQ_PIN equ P1.7

ORG 0000H
MOV TMOD, #0x00
REPEAT: MOV TL0, #0BH
MOV TH0, #0F0H
SETB TR0
WAIT: JNB TF0, WAIT
CPL SQ_PIN
CLR TR0
CLR TF0
SJMP REPEAT

Q.4
(a) Explain serial data transmission and reception. Write steps required for serial
data transmission using 8051.

Transmission: Data transmission begins by writing data to the SBUF register. The START and
STOP bits are added by hardware to form a 10 bit frame, then, 10 bit parallel to serial conversion
is performed and one bit (LSB first) at a time is transmitted through TXD pin, once complete
frame is transmitted, TI flag is set automatically by serial port hardware to indicate end of the
data transmission. We need to monitor TI flag to conform that SBUF register is not overloaded.
If TI flag is set, it implies that last character transmission is completed and now SBUF is empty
and new byte can be written to it to start next transmission. If a new byte is written to SBUF
before TI is raised, the untransmitted part of previous byte will be lost.

It should be noted that microcontroller sets TI flag when it completes byte transfer, whereas it
must be cleared by the programmer after next byte is loaded in to SBUF.

Reception: The data reception begins when REN=1 and high to low transition (start bit) is
detected on RXD pin. The received byte is loaded in to SBUF register (the START and STOP
bits are separated by UART hardware once complete frame is received) and stop bit in to RB8
(SCON bit 2) only if following two conditions are met.

i. RI=0, showing that previous data byte is read by a program


ii. Either SM2=0 or stop bit =1, Normally SM2 =0 and character will be accepted
irrespective of status of stop bit. A program may check RB8 to ensure that stop bit
is correct, if required.

If these two conditions are not met, received character is ignored and RI is not set and receiver
circuit waits for next start bit.

Following steps must be taken for serial data transmission:

1. Configure Timer 1 in 8 bit auto reload mode. (This is most commonly used
configuration).
2. TH1 is loaded with appropriate value to set required baud rate.
3. Configure SCON register to set serial port in mode 1. REN is set to 1 to enable serial data
reception.
4. TR1 is set to start timer 1 to generate clock at desired baud rate.
5. The byte to be transmitted is written to SBUF register.
6. For the transmission, TI flag is monitored to make sure that byte has been transmitted
completely. For the reception, RI flag is monitored to check that byte is received or not.
When RI is raised, SBUF contains a received byte. It must be read from SBUF. This
monitoring of RI and TI can be done either using polling method or interrupt method.
7. Once TI is set when a byte is transmitted, (or RI for reception) it is cleared (TI for
transmission or RI for reception) by software so that next transmission (reception) can be
initiated.
8. Repeat steps 5 to 7 for next byte transmission and steps 6 and 7 for next byte reception.

(b) Write program to transmit message “GTU EXAM 2013” using serial port of
8051 at baud rate 9600.
ORG 0000H
MOV TMOD, #20H ; timer 1configured in mode 2
MOV TH1, #0FDH ; set 9600 bps baud rate
MOV SCON, #50H ; 8-bit data, 1 stop bit, REN enabled
SETB TR1 ; start timer 1 to generate clock (at baud rate)
REPEAT: MOV A, #“G” ; load “G” in to A, and call subroutine that will
ACALL SEND ; transmit the character
MOV A, #“T” ; send “T”
ACALL SEND
MOV A, #“U” ; send “U”
ACALL SEND
MOV A, #“ ” ; send BACK SPACE “ ”
ACALL SEND
MOV A, # “E” ; send “E”
ACALL SEND
MOV A, # “X” ; send “X”
ACALL SEND
MOV A, #“A” ; send “A”
ACALL SEND
MOV A, #“M” ; send “M”
ACALL SEND
MOV A, #“ ” ; send “ ”
ACALL SEND
MOV A, #“2” ; send “2”
ACALL SEND
MOV A, #“0” ; send “0”
ACALL SEND
MOV A, #“1” ; send “1”
ACALL SEND
MOV A, #“3” ; send “3”
ACALL SEND

SJMP REPEAT ; transmit “GTU EXAM 2013” repeatedly.


SEND: MOV SBUF, A ; serial data transfer subroutine
HERE: JNB TI, HERE ; wait until last bit is sent
CLR TI ; clear TI before sending next byte
RET
END

OR
Q.4
(a) Write program to receive 16 data bytes from computer to microcontroller 8051
through serial port. Store data from memory location 0400h onwards
ORG 0000H
MOV R4, #16
MOV DPTR,#0400H
MOV TMOD, #20H ; timer 1configured in mode 2
MOV TH1, #0FDH ; set 9600 bps baud rate
MOV SCON, #50H ; 8-bit data, 1 stop bit, REN enabled
SETB TR1 ; start timer 1 to generate clock (at baud rate)
REPEAT: JNB RI, REPEAT ; wait until character byte is received
MOV A, SBUF ; read and save the received character
MOVX @DPTR, A
INC DPTR
CLR RI ; get ready to receive next byte
DJNZ R4, REPEAT ; go to receive next character
END
(b) Explain how timer 1 can be used as 16 bit counter to count external pulses
which are given at pin T1. Write program to count external pulses and save it in
register R6 and R7.

The major difference between interval timer and event counter is source of the clock pulse, when
timers are used as an event counters, pin T0/T1 (P3.4/P3.5) are basically used to provide external
pulses for timer 0/1, therefore external pulses will increment the timer registers TLX and THX.
The timer can be configured as an event counter by setting C/T = 1 in TMOD register. The other
difference between interval timer and event counter is that counter is normally started with initial
value of “0000” so TLX and THX normally initialized with value 00H. The operation of event
counter is illustrated in figure.

Event counter operation

As shown in the figure 14.10, the pulses on external pin T0 (or T1 for timer 1) are selected as
clock source for the timer operation by setting C/T = 1 in TMOD register. The timer registers are
normally initialized with value 0000 and the count will increment by 1 when pulse on pin T0/1 is
applied, therefore, the circuit will count the number of pulses (events) applied externally to the
timer pins. The count in timer registers at any time will represent the number of pulses applied
(or external events occurred) till that time.
ORG 0000H
MOV TMOD, #50H ; timer 1 configured in mode1 as a counter
MOV TL1, #00H ; initial count loaded in TH0-TL0 pair is 0000H
MOV TH1, #00H
MOV P2, #00H ; clear P2 and P1
MOV P1, #00H
SETB P3.5 ; configure T1 pin as an input
SETB TR1 ; start counting
AGAIN: MOV R6, TL1 ; send count on P1, P2 continuously.
MOV R7, TH1
SJMP AGAIN ; repeat the process of reading timer registers
END
Q.5
(a) Explain interfacing of DC motor with 8051 using IC L293D. Write program to
rotate motor in clockwise as well as anticlockwise direction.

Refer topic 20.4.for further details of interfacing DC motor with 8051

Refer figure 20.11 for detailed explanation.


Program for clockwise rotation:

SETB P2.0 ; configure P2.0 as input because switch is


; connected with it
CLKWISE: MOV P1, #00000001B ; rotate motor in clock wise direction
SJMP CLKWISE ; repeat the operation

Program for anticlockwise rotation:

SETB P2.0 ; configure P2.0 as input because switch is


; connected with it
SJMP REPEAT ; repeat the operation
ACLKWISE: MOV P1, #00000010B ; rotate motor in anticlock wise direction
SJMP ACLKWISE ; repeat the operation

(b) Draw circuit diagram to interface stepper motor with 8051. Write program to
rotate motor in clockwise direction using half step mode.
Interfacing of unipolar stepper motor with the 8051 is shown in figure. The leads A, A′, B and B′
are connected with microcontroller pins through driver circuit. The sequences discussed above
are generated using microcontroller and given to the stepper motor. The operation of the circuit
is further explained with help of the program.
Figure 20.8 Interfacing of stepper motor with the 8051
Circuit operation

The four leads of stator winding (A, A’, B, B’) are connected with the microcontroller port pins
P2.0 to P2.3 through a driver circuit. The common terminals are connected with Vcc. The driver
circuit used here is ULN2000 because it has 7 Darlington drivers with internal free wheeling
diodes for protection as discussed in above section. (we may also use discrete transistor driver
but it will require extra diodes to be interfaced, which will unnecessarily increase circuit
complexity).
When we make any port pin high, the output of driver is low, the current will flow through
corresponding coil. For example, when P2.0 is made low, the current will flow from Common
terminal (Vcc) to winding A to output A of the driver circuit, this way coil A is energized,
similarly any other coil can be energized by making corresponding port pin high.

Program development steps to rotate stepper motors are:


 To generate half step sequence, the eight values are 08, 0C, 04, 06, 02, 03, 01, 09
 To rotate motor in clock wise direction rotate the initial value loaded in port pins in right
direction using RR A instruction.
To rotate motor in anti clock wise direction rotate initial value in left direction using RL
A instruction.
Note that half step sequence will not be generated simply by rotation therefore we need to
store these values in a lookup table and access these values one after other.

Repeat above step continuously for rotation of motor.


Program for half step:
#include<reg51.h>
void main (void)
{
unsigned char i, j,a[]={0x08, 0x0C,0x4, 0x06,0x02, 0x03,0x01,09};
// full step sequence,
// array is used to store steps of sequence
while (1) // send sequence continuously
{
for (j=0; j<8; j++)
{ P2= a[j];
for ( i=0; i<20; i++); // delay
}
}
}

OR
Q.5
(a) Explain interfacing of RTC with 8051 microcontroller. Write program to get
values of hour, minute and second from RTC to RAM locations 80h, 81h and 82h
respectively.

The interfacing of RTC chip DS12887 with the 8051 is shown in figure. Since DS12887 has
multiplexed 8 bit address/data bus (AD0-7), these pins are directly connected with the AD0-7
(lower address and data bus i.e. P0) of the 8051. The chip select signal can be generated using
address decoder circuit, the input to the address decoder circuit will be high order address bus.
(Refer topic 21.4 for details of address decoding). For simplicity, the chip select (CS) signal is
permanently grounded, therefore the RTC chip is always selected. The RD and WR of the 8051
is connected with DS and R/W of the DS12887, therefore the DS12887 is mapped on external
data memory space i.e. addresses 00-7FH of the DS12887 is seen as external data memory
connected from 00H to 7FH. The ALE signal of the 8051 is connected directly with the AS
signal of the DS12887 to demultiplex address and data. Note that there is no need of external
latch circuit (like 74373) to demultiplex address and data because DS12887 does have internal
latch. Since only 8 address bits (A0-7) are used in our example, the contents of the DS12887 can
be accessed using instructions MOVX A, @Ri or MOVX @Ri, A. (If we use A8-15 to generate
chip select signal, then the DS12887 can be accessed using instructions MOVX A,@DPTR or
MOVX @DPTR,A).
ORG 0000H
MOV R0, #80H
MOV R1, #04H ; initialize R1 as a pointer to hours register (address 04)
MOVX A, @R1 ; read hours in to A
MOV @R0, A
INC R0

MOV R1, #02H ; initialize R1 as a pointer to minute register (address 02)


MOVX A, @R1 ; read minutes in to A
MOV @R0, A
INC R0

MOV R1, #00H ; initialize R1 as a pointer to seconds register (address 00)


MOVX A, @R1 ; read seconds in to A
MOV @R0, A
END

(b) Explain interfacing of External 32K EPROM and 16K RAM with 8051. Draw
circuit diagram.

The 16KByte chip requires 14 address lines (A13-A0). RAM signals WE and OE are connected
with WR and RD of the 8051 respectively and ROM signals OE is connected with PSEN of the
8051as shown in figure.
The 32KByte chip requires 15 address lines (A14-A0). The chip enable CE signals of both chips
are generated as shown in the figure.

The address range of RAM is 0000H- 3FFFH.


The address range of EPROM is 0000H- 7FFFH.

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