4 → Processor

Fundamentals
A-Level Computer Science (9618)
Intro & Structure
- 4.1 - Central Processing Unit (CPU) Architecture
- 4.2 - Assembly Language
- 4.3 - Bit Manipulation
- 15 - 20 points on Paper 1

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4.1 → CPU Architecture
A-Level Computer Science (9618)
Intro & Structure
1. Von Neumann Model
2. Fetch-Execute (F-E) Cycle
3. Register Transfer Notation
4. Control Unit, Arithmetic and Logic Unit, Immediate Access Store
5. Interrupts
6. Registers
7. Ports and Peripherals (USB, HDMI, VGA)
8. Factors in Performance of Computer Systems

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Von Neumann Model
- Basis of modern computer architecture
- Key features include:
- Processing Unit
- Memory Unit
- Input and Output Mechanisms
- Sequential Execution
- Shared Program Concept
- shared program concept - Instructions and
data are stored in the same memory space
(in RAM)
ALU

ACC
Fetch-Execute (F-E) Cycle
1. PC increments and transmits address for next instruction to MAR.
2. MAR sends address over address bus to RAM to fetch matching instruction from
RAM.
3. Instruction sent over data bus and temporarily stored in MDR.
4. Instruction sent from MDR to the CIR.
5. Current address in PC incremented by 1 and sent to MAR to continue cycle.
6. Instruction in CIR decoded in CU and executed by ALU.
- If there is an interrupt, after execution of instruction in CIR, the interrupt is
handled and the cycle continues.
Register Transfer Notation
What is a register?
- Small, fast storage location (i.e. 64
bit, 128 bit)
- Faster than RAM or cache memory
- Used to quickly store and access
data instructions or addresses
Registers
1. Program Counter (PC) - holds the address of the next instruction to be executed.
2. Memory Data Register (MDR) - temporarily holds data being transferred to or from
memory.
3. Memory Address Register (MAR) - holds the address of the memory location to be
accessed or where data will be stored or retrieved.
4. Accumulator (ACC) - stores intermediate results of arithmetic and logic operations.
5. Index Register (IX) - used to store and modify memory addresses during the execution
of a program, often for the purpose of iterating through arrays (add one)
6. Current Instruction Register (CIR) - holds the instruction currently being decoded and
executed.
7. Status Register - contains bits which are set or cleared based on the current status of
the process, including current operation, results of arithmetic operations, and errors
General vs. Special Purpose Registers

Type General Registers Special Purpose Registers

Usage Hold temporary Hold the status of a program

data/addresses while
performing operations

Purpose Can be used for any purpose Usually tailored and used for
a very specific purpose

Access Can be used by most Can only be used by very

instructions specific instructions
Immediate Access Store
- Can refer to a set of registers, cache
memory, or another high-speed
storage mechanism
- Designed for high-speed storage and
retrieval of frequently used data or
instructions
- Acts as a cache that allows the CPU
to immediately access data
- Reduced CPU latency
- Volatile memory
Buses
- Address Bus
- Transmits address of data/instruction
from MAR to RAM
- unidirectional
- Data Bus
- Transmits data/instructions from the
RAM to the MDR
- bidirectional
- Control Bus
- Can transmit interrupt, timing, read, and
write signals
- Allows control unit to control and
coordinate the operation of various
components in the CPU
- bidirectional communication
Arithmetic and Logic Unit
- Processing unit of the CPU
- Performs arithmetic and logic
operations on data it processes
- Carries out all mathematical
operations and logical decisions for
currently running software
- Processes decoded instructions
sent from CIR
- Represents a “core”
Control Unit (and System Clock)
- control unit
- Initiates data transfer to and from data storage (RAM, cache, etc.)
- Generates signals that are sent on the control bus to other components
- Orchestrates overall functioning of CPU
- system clock
- Gives out timing signals at regular interval
- Controls clock speed
- Regulates pace at which processor processes instructions
- Each clock “tick” represents a single instruction being executed
- Sequentially synchronizes functionality of different system components in
CPU
What are Interrupts?
- Causes of Interrupts
- Hardware issues (printer jam)
- Software issues (file cannot be found, division by 0, array index out of bounds)
- User intervention (CTRL+ALT+DELETE, Force Quit)
- External Events (keyboard inputs, mouse clicks, incoming network packets)
- Input/Output processes (completion of a data transfer
- Timing Signal
- Usage
- Used to deal with events that require immediate attentions
- Interrupts can have varying priority levels, which dictate how quickly they are handled
- Replaces polling, which is very inefficient
How do interrupts work?
- Interrupt Service Handling Routine (ISR) - software that handles specific types
of interrupts
- Interrupt Handling in the F-E cycle
1. Priority of interrupt is checked
2. If lower priority, continue with F-E cycle, otherwise, store state of current
process in stack
3. Identify type/location of interrupt and call corresponding ISR
4. When ISR is finished, check for any other high priority interrupts
5. Load data from stack and continue with process
Universal Serial Bus (USB)
- Standard method for data transfer between
computer and devices
- 1 bit is transferred at a time
- Can be synchronous or asynchronous
- USB-3 transmission is full duplex (two-way
communication, where both sender and
received can simultaneously communicate
- Earlier USB versions are half-duplex (two-way
communication, but not simultaneously)
- USB-enabled devices automatically
recognized by computer, which loads the
corresponding device driver
High-Definition Multimedia Interface (HDMI)
- Allows audio and video output from a
computer to a display device
- Transmits digital, high-definition
signal
- Digital replacement for VGA, which is
the analog
Video Graphics Array (VGA)
- Analogue method for connecting
computers to displays
- Introduced in the late 1980s
- Lower refresh rate and number of
pixels, and number of colors than
HDMI
Performance
1. Number of Cores - more instructions can be carried out simultaneously
2. Bus Width - Allows more data to be transferred to the CPU and back in a given
period of time
3. Clock Speed - higher clock speed means more F-E cycles per second
4. Cache Memory - the higher the capacity, the more frequently used instructions
that can be stored and accordingly, the faster a process can execute
instructions
Number of Cores
- Refers to the number of ALUs in a processor
- Each core can independently execute
instructions
- Typically CPUs will have cores in multiples of
two (dual-core, quad-core, 16-core, etc.)
- Requires communicate between cores,
which can add overhead
- Software needs to be designed to utilize
multiple cores
- Memory access speed may bottleneck
operations, as may not match the speed of
cores
Bus Width
- Refers to the number of
bits than can be
transferred via address
bus, data bus, and/or
control bus.
- Increases speed of
memory access and
overall computer
system
Clock Speed
- Number of F-E cycles that can be
conducted per second
- Measured in Hz (Hertz)
- Example: 2.1 Ghz process → (2.1 billion
F-E cycles per second)
- Due to hardware/software
constraints, additional cores to do
not result in a perfectly multiple
clock speed
- Example: 2.1 Ghz dual-core processor
does not lead to overall 4.2 Ghz clock
speed, but a slightly slower speed
Cache Memory
- Sits between CPU
components and RAM
- Holds frequently used
instructions/data
- Allows CPU to more
quickly access
data/information,
because doesn’t have to
go all the way to RAM
A-Level Problems
4.2 → Assembly Language
A-Level Computer Science (9618)
Intro & Structure
1. What is assembly language?
2. Instructions Groups
3. Assembly Stages
4. Addressing Modes

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What is assembly language?
- Usually tailored to a specific type of CPU
- Provides more direct control over CPU
components than higher-level programming
language
- Highly efficient - used for performance critical
functionality in software
Assembly Language ↔ Machine Language
- Each assembly
instruction
corresponds to
specific binary code
that the CPU
understands
Instructions Groups
- Data movement - used to transfer data between different parts of the
computer's hardware, such as between registers, from memory to a
register, or from a register to memory via accumulator
- Input and Output of Data - instructions that allow the user to input data from a
peripheral, or output data to the screen
- Arithmetic Operation - perform mathematical operations on data stored in the
accumulate, with the subsequent stored in the accumulator
- Conditional Instructions - execute subsequent operations (and jump to another
address) based on the evaluation of a specific condition
- Comparison Instructions - compare contents of accumulator with the operand
Data Movement
Input and Output of Data
Arithmetic Operations
Conditional and Unconditional Instructions
Comparison Instructions
Examples
Link 1

Link 2
Two-Pass Assembler
- Program used to convert
assembly code into machine
code.
- Uses a symbol table to store any
instructions, addresses, and
labels used in a program
Labels
First Pass
- Go through the assembly language program, examining it one line at a time.
1. Exclude elements that are not essential for the program's execution, such
as comments.
2. For each line of executable code, determine and assign a specific memory
location.
3. Ensure that each operation code (opcode) utilized is part of the recognized
instruction set.
4. Incorporate newly identified labels into the symbol table, noting their
memory addresses when possible.
5. Record the memory addresses of instructions associated with labels in the
symbol table.
Second Pass
- Review the assembly language program systematically, focusing on each line
individually.
1. Utilize the symbol table created in the first pass to produce object code
(machine code), which includes both the opcode and the operand.
2. Either store the resulting program for later use or proceed to execute it
immediately.
Addressing Modes
- Immediate - operand is directly specified within the instruction itself
- Direct - specifies the memory address where the operand is located
- Indirect - uses a register to hold the address of the operand; instruction
specifies a register that contains the memory address
- Indexed - involves using a base address and an index to calculate the actual
address of the operand; base address is typically held in one register, and an
index value is held in another register
- Relative - The operand specifies a value relative to the current instruction's
address, usually as an offset
Immediate Addressing Mode
- operand is directly specified within the instruction itself

Opcode Operand Explanation

LDM #n Load the number n in the ACC
LDR #n Load the number n in the IX
Direct Addressing Mode
- specifies the memory address where the operand is located

Opcode Operand Explanation

LDD <address> Load the contents of the location at the given
address to the ACC
Indirect Addressing Mode
- uses a register to hold the address of the operand; instruction specifies a
register that contains the memory address

Opcode Operand Explanation

LDI <address> The address to be used is at the given address.
Load the contents of this subsequent address
into the ACC.
CMI <address> The address to be used is at the given address.
Compare the contents of ACC with the
contents of this subsequent address.
Indexed Addressing Mode
- involves using a base address and an index to calculate the actual address of the
operand; base address is typically held in one register, and an index value is held
in another register

Opcode Operand Explanation

LDX <address> Form the address from <address> + the
contents of the index register. Copy the
contents of the calculated address to the ACC.
Relative Addressing Mode
- The operand specifies a value relative to the current instructions address,
usually as an offset.
A-Level Problems
4.3 → Bit Manipulation
A-Level Computer Science (9618)
Intro & Structure
1. Bit Manipulation Operations
2. Binary Shifts
- Focus on A-Level Problems
- 15 - 20 points on Paper 1

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Shifts
- logical shift - the digits of the binary number are shifted left or right by a certain
number of positions
- arithmetic shift - shifts the digits of a number to the left or right while
preserving the sign by duplicating the sign bit.
- cyclic shift - moves the bits of a number to the left or right, wrapping the
shifted-out bits around to the opposite end of the number.
Channel Updates
- Working my way through Paper 1
- Next topics
- Ethics and Ownership (7)
- Communication (2)
- Data Security (6)
- Working on a Paper 2, Paper 3 Pseudocode, and Paper 4 Course

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