Unit – 3

8051 Instruction set and programs

By:
Shyamal S Pampattiwar
Lecturer
Electronics and Telecommunication Department
Government Polytechnic Nagpur
 Agenda
3.1 Overview of 8051 instruction set
3.2 various addressing modes
3.3 Classification of instructions
3.4 Data transfer instructions
3.5 Arithmetic instructions
3.6 Logical instructions
3.7 Branching instructions
3.8 Bit manipulation instructions
3.9 stack, subroutine and interrupt related instructions
3.10 programs based on above instructions
Overview of 8051 instruction set
Overview of 8051 instruction set
 Classification of instructions
• 8051 instruction set is classified as follows:
1. Data transfer instructions
2. Arithmetic instructions
3. Logical instructions
4. Branching instructions
5. Bit manipulation instructions
6. stack, subroutine and interrupt related
instructions
D
a
t
a
T
r
a
n
s
f
e
r
I
n
s
t
r
u
c
t
i
o
n
s
A
r
i
t
h
m
e
t
i
c
I
n
s
t
r
u
c
t
i
o
n
s
L
o
g
i
c
a
l
I
n
s
t
r
u
c
t
i
o
n
s
 PROGRAM
BRANCHING
MANIPULATION
 Bit
Manipulation
Instructions
OR
BOOLEAN
VARIABLE
MANIPULATION
BRANCHING INSTRUCTIONS
 Branch Instruction
• Branch Instructions
• In the sequence of instructions to be executed, it is often necessary
to transfer program control to a different location.
• There are two kinds of branch instructions:
– Unconditional jump instructions: upon their execution a jump
to a new location from where the program continues execution
is executed.
– Conditional jump instructions: a jump to a new program
location is executed only if a specified condition is met.
Otherwise, the program normally proceeds with the next
instruction.
 LOOP AND JUMP INSTRUCTIONS
• Looping in the 8051
• Repeating a sequence of instructions a
certain number of times is called
a loop.
• The loop is one of most widely used
actions that any microprocessor
performs.
• In the 8051, the loop action is
performed by the instruction “DJNZ
reg, label”.
• In this instruction, the register is
decremented; if it is not zero, it jumps
to the target address referred to by the
label.
• Prior to the start of the loop the
register is loaded with the counter for
the number of repetitions.
• Notice that in this instruction both the
register decrement and the decision to
jump are combined into a single
instruction.
 8051 Conditional Jump Instructions

• Notice that some of the instructions, such as JZ (jump if A = zero) and JC

(jump if carry), jump only if a certain condition is met .
• JZ (jump if A = 0)
• In this instruction the content of register A is checked. If it is zero, it
jumps to the target address. For example, look at the following code.

OVER:
• In this program,. if either R0 or R1 is zero, it jumps to the label OVER.
• Notice that the JZ instruction can be used only for register A.
• It can only check to see whether the accumulator is zero, and it does
not apply to any other register.
• More importantly, you don’t have to perform an arithmetic
instruction such as decrement to use the JNZ instruction.
Example

• MOV A,R5
• JZ NEXT
• NEXT: MOV R5,#55H
• JNC (jump if no carry, jumps if CY = 0)
• In this instruction, the carry flag bit in the flag
(PSW) register is used to make the decision
whether to jump.
• In executing “JNC label”, the processor looks at
the carry flag to see if it is raised (CY =1).
• If it is not, the CPU starts to fetch and execute
instructions from the address of the label.
• If CY = 1, it will not jump but will execute the next
instruction below JNC.
• Note that there is also a “JC label” instruction. In
the JC instruction, if CY = 1 it jumps to the target
address.
 Programming Exercise
1) WAP to transfer the block of 5-bytes stored from memory location 40H
to 44H to the memory locations starting from 50H to 54H.
2) WAP to store data FFH into RAM memory locations 50H to 58H using
direct addressing mode.
3) WAP to store data FFH into RAM memory locations 50H to 58H using
in-direct addressing mode.
4) WAP to clear 10 RAM locations starting at RAM address 10H.
5) WAP to clear 10 RAM locations starting at RAM address 1000H.
6) WAP to find the average of the five 8-bit numbers. Store the result in
55H.(Assume that after adding five 8-bit numbers, the result is 8-bit
only)
7) WAP to exchange the lower nibble of data present in external memory
6000H and 60001H.
8) WAP to transfer the block of 10-bytes from internal RAM starting from
40H to the external RAM starting from 4000H.
 WAP to transfer the block of 5-bytes stored from memory
location 40H to 44H to the memory locations starting from
50H to 54H.

• Using Direct addressing mode: • Using In-Direct addressing mode:

MOV 50H,40H MOV R0,#40H ; SOURCE
MOV 51H,41H MOV R1,#50H ; DESTINATION
MOV 52H,42H MOV R2, #05H; COUNTER
MOV 53H,43H BACK : MOV A,@R0
MOV 54H,44H MOV @R1,A
INC R0
INC R1
DJNZ R2, BACK
NOTE : All conditional jumps are short jumps
It must be noted that all conditional jumps are short jumps, meaning that the address of the target
must be within -128 to +127 bytes of the contents of the program counter (PC).
 Solution:
ORG 0000H
//LOAD THE DATA ONTO THE MEMORY
Programming Exercise MOV R0,#40H
MOV R2,#02H
MOV R3,#06H
LOAD: MOV A,R2
WAP to separate the data as EVEN or ODD. MOV @R0,A
10-bytes of data is stored on memory location INC R0
starting from 40H. Store the EVEN numbers INC R2
on memory locations starting from 60H and DJNZ R3,LOAD
ODD numbers on memory locations starting //ACTUAL PROGRAM
MOV R0,#40H ;INPUT DATA
from 70H.
MOV R1,#60H ; EVEN NUMBERS
• HINT: MOV DPH,#00H
Number is stored from MOV DPL,#70H ;ODD NUMBERS(DPTR)
40H MOV R5,#06 ;LOAD THE COUNTER
ODD:MOV 60h,data of 40H BACK : MOV B,#02H ;LOAD THE DIVISOR
Take first data to A MOV A,@R0
Load regi B with 02h MOV R3,A ;PRESERVE THE NUMBER
DIV AB DIV AB ; TO CHECK EVEN OR ODD
MOV R7,B MOV R7,B
CJNE R7,#00h,ODD INC R0
EVEN: MOV 50h, data of 40H CJNE R7,#00H,ODD
EVEN : MOV A,R3
MOV @R1,A
INC R1
DJNZ R5,BACK
ODD : MOV A,R3
MOVX @DPTR, A
INC DPL
DJNZ R5,BACK
END
 Unconditional jump instructions
• The unconditional jump is a jump in which
control is transferred unconditionally to the
target location.
• In the 8051 there are two unconditional
jumps:
• LJMP (long jump) and SJMP (short jump).
• LJMP (long jump)
– LJMP is an unconditional long jump.
– It is a 3-byte instruction in which the first byte is the
opcode, and the second and third bytes represent the
16-bit address of the target location.
– The 2-byte target address allows a jump to any memory
location from 0000 to FFFFH.
• SJMP (short jump)
– SJMP is an unconditional short jump.
– It is a 2-byte instruction, the first byte is the opcode and
the second byte is the relative address of the target
location. The relative address range of 00 – FFH
BIT MANIPULATION INSTRUCTIONS
 I/O ports and bit-addressability

• Sometimes we need to access only 1 or 2 bits of the port instead of the

entire 8 bits.
• A powerful feature of 8051 I/O ports is their capability to access individual
bits of the port without altering the rest of the bits in that port.
• Of the four 8051 ports, we can access either the entire 8 bits or any single
bit without altering the rest.
• When accessing a port in single-bit manner, we use the syntax “SETB X. Y”
where X is the port number 0, 1,2. or 3, and Y is the desired bit number
from 0 to 7 for data bits DO to D7.
• For example, “SETB PI. 5″ sets high bit 5 of port 1. Remember that DO is
the LSB and D7 is the MSB.
• For example, the following code toggles bit PI .2 continuously.

Single-Bit Addressability of Ports

STACK, SUBROUTINE AND INTERRUPT
RELATED INSTRUCTIONS
 Stack in 8051
• The stack is a section of RAM used by the CPU to store information temporarily.
• This information could be data or an address.
• CPU need this storage area since there are only limited number of registers.

How stacks are accessed in 8051:

• If the stack section of RAM, there must be registers inside the CPU to point to it.
• The register used to access the stack is called the SP (stack pointer) register.
• The stack pointer in the 8051 is only 8- bits wide, which means that it can take
values of 00 to FFH.
• When the 8051 is powered up, the SP register contains value 07.
• This means that RAM location 08 is the first location used for the stack by 8051.
• The storing of a CPU register in the stack is called a PUSH, and pulling the contents
off the stack back into a CPU register is called a POP.
• In other words, a register is pushed on to the stack to save it and popped off the
stack back to retrieve it.
 Pushing onto the Stack
• In the 8051 the stack pointer (SP)points to the last used memory
location of the stack.
• As we push the data onto the stack, the stack pointer (SP) is
incremented by one.
• For every byte of data saved on the stack, SP incremented only
once.
• Note: To push the registers onto the stack we must use their RAM
addresses.
• Ex: PUSH 1 is equivalent to PUSH R1.

Popping from the stack:

• Popping the contents of the stack back into the register is the
opposite process of pushing.
• With every pop, the top byte of the stack is copied to the register
specified by the instruction and stack pointer is decremented by
one.
 The upper limit of the stack
As mentioned earlier, locations 08 to IF in the
8051 RAM can be used for the stack.
• This is because locations 20 – 2FH of RAM are
reserved for bit-addressable memory and must
not be used by the stack.
• If in a given program we need more than 24 bytes
(08 to 1FH = 24 bytes) of stack, we can change the
SP to point to RAM locations 30 – 7FH.
• This is done with the instruction “MOV SP, #xx”.
 8051 CALL INSTRUCTIONS
• Another control transfer instruction is the CALL
instruction, which is used to call a subroutine.
• Subroutines are often used to perform tasks that
need to be performed frequently.
• This makes a program more structured in addition
to saving memory space.
• In the 8051 there are two instructions for call:
LCALL (long call) and ACALL (absolute call).
• Deciding which one to use depends on the target
address
 8051 CALL INSTRUCTIONS
• LCALL (long call)
• In this 3-byte instruction, the first byte is the opcode and the
second and third bytes are used for the address of the target
subroutine.
• Therefore, LCALL can be used to call subroutines located
anywhere within the 64K-byte address space of the 8051.
• To make sure that after execution of the called subroutine the
8051 knows where to come back to, the processor automatically
saves on the stack the address of the instruction immediately
below the LCALL.
• When a subroutine is called, control is transferred to that
subroutine, and the processor saves the PC (program counter) on
the stack and begins to fetch instructions from the new location.
• After finishing execution of the subroutine, the instruction RET
(return) transfers control back to the caller.
• Every subroutine needs RET as the last instruction.
8051 CALL INSTRUCTIONS
• The following points should be
noted for the program in
Example

1. Notice the DELAY subroutine.

Upon executing the first
“LCALL DELAY”,
the address of the instruction
right below it, “MOV A,
#OAAH”, is pushed onto
the stack, and the 8051 starts
to execute instructions at
address 300H.
2. In the DELAY subroutine, first
the counter R5 is set to 255
(R5 = FFH); there
fore, the loop is repeated 256
times. When R5 becomes 0,
control falls to the
RET instruction, which pops
the address from the stack
into the program
counter and resumes
executing the instructions
after the CALL.
3. The amount of time delay in
Example depends on the
frequency of the 8051.
CALL instruction and the role of the
stack
 8051 CALL INSTRUCTIONS
• ACALL (absolute call)
• ACALL is a 2-byte instruction in contrast to LCALL, which is 3 bytes.
• Since ACALL is a 2-byte instruction, the target address of the
subroutine must be within 2K bytes because only 11 bits of the 2
bytes are used for the address.
• There is no difference between ACALL and LCALL in terms of
saving the program counter on the stack or the function of the
RET instruction.
• The only difference is that the target address for LCALL can be
anywhere within the 64K-byte address space of the 8051 while the
target address of ACALL must be within a 2K-byte range.
• In many variations of the 8051 marketed by different companies,
on-chip ROM is as low as IK byte.
• In such cases, the use of ACALL instead of LCALL can save a
number of bytes of program ROM space.
• Edit the above example using ACALL
instruction
• Solution:
 RETI instruction
• The RETI instruction is used to end an interrupt service routine.
• This instruction pops the high-order and low-order bytes of the PC
(and decrements the stack pointer by 2) and restores the interrupt
logic to accept additional interrupts.
• No other registers are affected by this instruction.
• The RETI instruction does not restore the PSW to its value before
the interrupt.
• The interrupt service routine(ISR) must save and restore the PSW.
• Execution returns to the instruction immediately after the point at
which the interrupt was detected.
• If another interrupt was pending when the RETI instruction is
executed, one instruction at the return address is executed before
the pending interrupt is processed.
 Difference between RET and RETI
instructions
• RET is used to return from a subroutine previously called by
LCALL or ACALL. Program execution continues at the
address that is calculated by the topmost two bytes off the
stack. The most-significant-byte is popped off the stack first,
followed by the least-significant-byte. Addresses of RET is
loaded from the stack.
• RETI is used to return from an interrupt service routine. It
first enables interrupts of equal and lower priorities to the
interrupt that is terminating. Program execution continues
at the address that is calculated by the topmost two bytes
off the stack. The most-significant-byte is popped off the
stack first, followed by the
least-significant-byte. RETI addresses is loaded from the
stack and the global interrupt flag is set.
 References
• Book:
• The 8051 Microcontroller And Embedded Systems Using
Assembly And C, 2/E by Mazidi, Pearson Education, Asia
2007, second edition
• a) Load the 20h,30h,and A) MOV P1,#20H
40 h to the ports P1, P2 MOV P2,#30H
and P3 resply. b) Load MOV P3,#40H
B) MOV R1,P1
the data from ports to MOV R2,P2
the registers R1,R2,R3 MOV R3,P3
C) MOV PSW,#08H ; REGISTER BANK 1
rsply of register bank0 c) MOV R1,P1
Load the data from ports MOV R2,P2
to the registers R1,R2,R3 MOV R3,P3
D) MOV PSW,#10H ; REGISTER BANK 2
rsply of register bank1 d) MOV R1,P1
Load the data from ports MOV R2,P2
MOV R3,P3
to the registers R1,R2,R3 E) MOV PSW,#18H ; REGISTER BANK 3
rsply of register bank2 e) MOV R5,P1
Load the data from ports MOV R6,P2
MOV R7,P3
to the registers R5,R6,R7
rsply of register bank3