AUDISANKARA COLLEGE OF ENGINEERING &

TECHNOLOGY (AUTONOMOUS)

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING

ELECTRONIC DEVICES AND CIRCUITS LAB

LABORATORY OBSERVATION (23A04302P)

NAME: _________________________________________________________________

ROLL NUMBER: ________________________________________________________

CLASS: _________________________________________________________________

YEAR/SEM: _____________________________________________________________

BRANCH: _______________________________________________________________
 I. PROGRAMME EDUCATIONAL OBJECTIVES (PEOS)

PEO1: Graduates apply their knowledge of mathematics and science to identify, analyze
and solve problems in the field of Electronics and develop sophisticated
communication systems.

PEO2: Graduates embody a commitment to professional ethics, diversity and social

awareness in theirprofessional career.

PEO3: Graduates exhibit a desire for life-long learning through technical training and

professional activities.

II. PROGRAM SPECIFIC OUTCOMES (PSOS)

PSO1: Apply the fundamental concepts of electronics and communication engineering to

design a variety of components and systems for applications including signal
processing, image processing, communication, networking, embedded systems,
VLSI and control system

PSO2: Select and apply cutting-edge engineering hardware and software tools to solve
complex Electronics and Communication Engineering problems.
III. PROGRAMME OUTCOMES (PO’S)
1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering
fundamentals, and an engineering specialization to the solution of complex engineering problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of mathematics,
natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and research
methods including design of experiments, analysis and interpretation of data, and synthesis of the
information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering activities with
an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the
professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and need for
sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or leader in
diverse teams, andin multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and write
effective reports and design documentation, make effective presentations, and give and receive
clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member and leader
in a team, to manage projects andin multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to engage in
independent and life-long learning in the broadest context of technological change.

IV. COURSE OBJECTIVES

➢ To verify the theoretical concepts practically from all the experiments

➢ To analyze the characteristics of Diodes, BJT, MOSFET, UJT.
➢ To analyze the characteristics of MOSFET, UJT.
➢ To design the amplifier circuits from the given specifications.
➢ To Model the electronic circuits using tools such as PSPICE/Multisim
V. COURSE OUTCOMES

After the completion of the course students will be able to

Course Course Outcome statements BTL

Outcomes
Understand the basic characteristics and applications of basic electronic
CO1 devices. (L1) L1

Plot the characteristics of electronic devices. (L3)

CO2 L2
CO3 Analyze various biasing circuits and electronic circuits as L3
amplifiers (L4).

Design MOSFET / BJT based amplifiers for the given

CO4 L4
specifications. (L5)
CO5 Simulate all circuits in PSPICE /Multisim. (L5). L5

VI. COURSE MAPPING WITH PO’S AND PEO’S

CourseTitle
PO PO PO PO PO PO PO PO PO PO PO PO PSO PSO
1 2 3 4 5 6 7 8 9 10 11 12 1 2
Electronic
Devices and
Circuits Lab 2.2 2.6 1.8 2.2 2.4 2.4 2.2 2.0 2.6 2.2 2.0 2.2 2.2 2.2

VII. MAPPING OF COURSE OUTCOMES WITH PEO’S AND PO’S

Course PO PO PO PO PO PO PO PO PO PO PO PO PSO PSO

Title 1 2 3 4 5 6 7 8 9 10 11 12 1 2
CO1 3 3 2 1 3 3 2 3 3 1 3 1 3 1
CO2 1 3 3 2 3 3 3 2 3 2 2 2 2 3
CO3 2 3 1 2 2 1 2 2 2 3 1 3 2 2
CO4 3 1 2 3 3 2 3 1 3 2 2 2 1 2
CO5 2 3 1 3 1 3 1 2 2 3 2 3 3 3
 LABORATORY INSTRUCTIONS

1. While entering the Laboratory, the students should follow the dress code. (Wear shoes and
White apron, Female Students should tie their hair back).

2. The students should bring their observation book, record, calculator, necessary stationery items
and graph sheets if any for the lab classes without which the students will not be allowed for doing
the experiment.

3. All the Equipment and components should be handled with utmost care. Any breakage or damage
will be charged.

4. If any damage or breakage is noticed, it should be reported to the concerned in charge immediately.

5. The theoretical calculations and the updated register values should be noted down in the
observation book and should be corrected by the lab in-charge on the same day of the
laboratorysession.

6. Each experiment should be written in the record note book only after getting signature from the lab
in-charge in the observation notebook.

7. Record book must be submitted in the successive lab session after completion of experiment.

8. 100% attendance should be maintained for the laboratory classes.

Precautions.

1. Check the connections before giving the supply.

2. Observations should be done carefully.
 LIST OF EXPERIMENTS
Minimum TEN experiments to be conducted
 EDC Lab’s Manual

INDEX
Max. Marks per each Experiment : 5

SL. Page Date of Date of Marks Signature of the

Name of the Experiment
No. No. Performed Submission Obtained Lab Incharge
1 Clipping and Clamping circuits
2 BJT Characteristics-Common
Collector configuration
JFET Characteristics –CommonSource
configuration
3 BJT Characteristics-Common Emitter
configuration
4 BJT Characteristics-Common Base
configuration
5 Uni Junction Transistor (UJT)
Characteristics
6 Voltage Divider bias circuit using BJT

7 Self bias circuit using MOSFET

8 BJT as a Switch

9 BJT-CE Amplifier

10 MOSFET-CS Amplifier

11 MOSFET (Enhancement)
Characteristics –CommonSource
configuration
12 MOSFET (Depletion mode)
Characteristics –CommonSource
configuration
Toal Marks obtained :
Average Marks obtained :
Beyond the Syllabus :
 1.CLIPPER AND CLAMPER

AIM :To verify the various clipping and clamping circuits using PN junction diode in Hardware as well
Using multisim software
APPARATUS :
1). Regulated power supply---------------------------------------------------------------------- 1No.
2). Function generator ---------------------------------------------------------------------------- 1 No.
3). Cahode Ray Oscilloscope (CRO) ---------------------------------------------------------- 1 No.
4). System with Multisim software ------------------------------------------------------------- 1 No.
COMPONENTS :
1). PN junction diode : 1N4007
2). Carbon fixed resistors 10 Ω ,½W, 10 KΩ , ½W --------------------------------------- Each 1 No.

THEORY :

Diode Clippers :
Most of the electronic circuits like amplifiers, modulators and many others have a particular range of
voltages at which they have to accept the input signals. Any of the signals that have an amplitude greater
than this particular range may cause distortions in the output of the electronic circuits and may even lead to
damage of the circuit components.
As most of the electronic devices work on a single positive supply, the input voltage range would
also be on the positive side. Since the natural signals like audio signals, sinusoidal waveforms and many
others contain both positive and negative cycles with varying amplitude in their duration.
These waveforms and other signals have to be modified in such a way that the single supply
electronic circuits can be able to operate on them.
The clipping of a waveform is the most common technique that applies to the input signals to adapt
them so that they may lie within the operating range of the electronic circuits. The clipping of waveforms
can be done by eliminating the portions of the waveform which crosses the input range of the circuit.
Clippers can be broadly classified into two basic types of circuits. They are:
➢ Series Clippers
➢ Shunt or Parallel Clippers
Series clipper circuit contains a power diode in series with the load connected at the end of the circuit. The
shunt clipper contains a diode in parallel with the resistive load.
 CIRCUIT DIAGRAM :

PROCEDURE :
1). Connected the circuit as shown in the circuit diagram of figure (a)
2). Switched ON the Function generator and CRO.
3). Set the sine wave as 10V p-p in the function generator.
4). Observed the wave forms in the CRO and draw in the graph sheets.
5). Repeated the same procedure for circuit diagrams of figures from b to h.
6). Repeated the same procedure using Multisim software.
 EXPECTED WAVEFORMS :

RESULT :I have observed and drawn the output and input wave forms of different types of Clippersand
Clampers
VIVA VOICE Questions:

1. What is Clipper?

2. What is Clamper?

3. What is negative series clipper?

4. What is positive series clipper?

5. What is negative shunt clipper?

6. What is positive shunt clipper?

7. What is positive clamper?

8. What is negative clamper?

9. What is two- level clipper?

10. Importance of clippers and clampers.

 2 a.JFET COMMON SOURCE CONFIGURATION
AIM :
1). To study the static and transfer characteristics of the FET using Hardware and multisim software
2). To calculate the following FET parameters
( a). Drain resistance(rd) (b). Trans conductance (gm) (c). Amplification factor(µ)
(d) Pinch-off voltage(VP).
APPARATUS :

1). Voltmeters : (0-2)V Digital DC Type ------- 1 No.

(0-50)V Digital/Analog DC Type ------- 1 No.
2). Ammeters : (0-20)mA Digital/Analog DC Type ------- 1 No.
3). Regulated Power Supply ( RPS ) : 30V, 1A Dual channel ----- 1 No.
4). Bread board : ----- 1 No.
5). Connecting wires : ----- A few Nos.
6). System with multisim software ----- 1 No.
COMPONENTS :
1). Field Effect Transistor (FET) : BFW11/BF 245 ----- 1No.
2). Carbon fixed resistors 22Ω, ½W and 1KΩ ,½W ----- Each 1 No.

THEORY :

The Field Effect Transistor or Simply FET uses the voltage that is applied to their input terminal,
called the Gate to control the current flowing through them resulting in the output current being proportional
to the input voltage, the Gates to source junction of the FET is always reversed biased. As their operation
relies on an electric field (hence the name field effect) generated by the input Gate voltage, this then makes
the Field Effect Transistor a “VOLTAGE” operated device.

The Field Effect Transistor is a three terminal unipolar semiconductor device that has very similar
characteristics to those of their Bipolar Transistor counterpart’s i.e., high efficiency, instant operation, robust
and cheap and can be used in most electronic circuit applications to replace their equivalent bipolar junction
transistors (BJT).
The Field Effect Transistor has one major advantage over its standard bipolar transistor, in that input
impedance, (Rin) is very high, (thousands of Ohms). This very high input impedance makes them very
sensitive to input voltage signals.
There are two basic configurations of junction field effect transistor, the N-channel JFET and the P-
channel JFET. The N-channel JFET’s channel is doped with donor impurities meaning that the flow of
current through the channel is negative (hence the term N-channel) in the form of electrons.
A FET is a three terminal device, having the characteristics of high input impedance and less noise,
the Gate to Source junction of the FET is always reverse biased.
In amplifier application, the FET is always used in the region beyond the pinch-off.
CIRCUIT DIAGRAM :

PROCEDURE :
A). Transfer characteristics:
1). Connected the circuit as per the circuit diagram.
2). Switched ON the RPS and all the meters.
3). Kept the VDS voltage at constant 2V by varying the drain forward voltage i.e. VDD.
4). Varied the gate reverse voltage VGG in steps of 0.00V, 0.40V, 0.80V, 1.2V, 1.6V, 2.0V and noted
down the corresponding readings of VGS and ID meters.
5). Now kept the VGG is at0V.
6). Repeated the same procedure from step 4 to step 5 for VDS=4V by varied the VDD.
7). Switched OFF the RPS and all themeters.
8). Plotted the graph between VGS on X-axis and ID onY-axis.
9). Calculated the trans conductance value from the graph as per the formula which is given under the
heading of parameters.
Note: Do not vary the supply voltage VDD unless VGG is kept at 0 Volts.
10). We did the same experiment in multisim software also and noted down the corresponding readings in
the tabular column (A ).
B). Static/Drain characteristics:
1). Connected the circuit as shown in the circuit diagram.
2). Now Switched ON the RPS and all the meters.
3). Kept the VGS = 0V by varying the supply voltage VGG.
4). Varied the supply voltage VDD in steps of 0.0V, 0.50V, 1.0V, 2.0V, 4.0V, 6.0V,8.0V, 10.0V, 12.0V,
14.0V, 16.0V, 18.0V, 20.0V, 24.0V, 28.0V, 30.0V and noted down the corresponding readings of VDS
and ID meters.
5). Now kept the VDD is at0V.
6). Repeatedthesameprocedurefromsteps4to5foreachtimeindependentlywhenVGS= -0.5V&VGS=- 01.00V
by varying the VGG.
7). Now switched OFF the RPS and all the meters.
Note: Do not vary the supply voltage VGG unless VDD is kept at 0 Volts.
8). Plotted the graph between VDS on X-axis and ID on Y-axis.
9). Calculated the drain resistance value from the graph and amplification factor as per the
formulas which are given under the heading of parameters.
10). We did the same experiment in multisim software also and noted down the corresponding readings in
the tabular column (B).
TABULAR COLUMNS :
A). Transfer Characteristics:
Using Hardware Using Software
SL. VGG VDS = 2V VDS = 4V VDS = 2V VDS = 4V
No. (V) VGS (V) ID (mA) VGS (V) ID (mA) VGS (V) ID (mA) VGS (V) ID (mA)
01 00.00
02 00.40
03 00.80
04 01.20
05 01.60
06 02.00
B). Static / Drain Characteristics:
Using Hardware Using Software

SL. VDD VGS = 0V VGS = 0.5V VGS = 1V VGS = 0V VGS = 0.5V VGS = 1V
VDS ID VDS ID VDS ID VDS ID VDS ID VDS ID
No. (V) (V) (mA) (V) (mA) (V) (mA) (V) (mA) (V) (mA) (V) (mA)
01
02
03
04
05
06
07
08
09
10
11
12
 EXPECTED GRAPHS:
A). Transfer characteristics: B). Static/drain characteristics:

PARAMETERS :
1). Tran conductance (gm) = ID/ VGS At VDS is constant.
=

( Calculated from transfer characteristics curve)

2). Drainresistance(rd) = VDS/ ID At VGS is constant.

=

( Calculated from static/drain characteristics curve)

3). Amplification factor (gm) = Drain resistance (rd) × Tran conductance (gm).
=
4). Pinch off Voltage (VP) =

RESULT:
The transfer and static/drain characteristics of JFET are observed. The parameters drain
resistance(rd),trans conductance (gm) and amplification factor (µ) are calculated.
VIVA VOCE QUESTIONS:

1. What is the Difference between BJT and FET?

2. What are the transfer characteristics?

3. What are the drain characteristics?

4. What are the applications of FET?

5. FET is which controlled device?

6. Mention FET characteristics.

7. What are the configurations of FET?

8. What are the classifications of FET?

9. Which configuration mostly used in FET?

10. What are the advantages of FET?

 2 b. CHARACTERISTICS OF CC CONFIGURATION

Aim:To obtain the input and output Characteristics of Common Collector configuration

Apparatus and Components Required:

S.No Name of the Apparatus Range/No/Type Quantity

1 Transistor BC107 1

2 Voltmeter 0-2V,0-30V Each1

3 Ammeter 0-500µA, 0-30mA, Each 1

4 DC Power Supply (Dual) 0-30V 1

5 Breadboard 1

6 Resistors 1k,10k, Each 1

7 Connecting Wires As required

Theory:

A BJT is a three terminal two – junction semiconductor device in which the conduction is due to
both the charge carrier. Hence it is a bipolar device and it amplifier the sine waveform as they
are transferred from input to output. BJT is classified into two types – NPN or PNP. A NPN
transistor consists of two N types in between which a layer of P is sandwiched. The transistor
consists of three terminal emitter, collector and base. The emitter layer is the source of the charge
carriers and it is heartily doped with a moderate cross sectional area. The collector collects the
charge carries and hence moderate doping and large cross sectional area. The base region acts a
path for the movement of the charge carriers. In order to reduce the recombination of holes and
electrons the base region is lightly doped and is of hollow cross sectional area. Normally the
transistor operates with the EB junction forward biased.

In transistor, the current is same in both junctions, which indicates that there is a transfer of
resistance between the two junctions. One to this fact the transistor is known as transfer
resistance of transistor

In this configuration we use collector terminal as common for both input and output signals. This
configuration is also known as emitter follower configuration because the emitter voltage follows
 the base voltage. This configuration is mostly used as a buffer. These configurations are widely
used in impedance matching applications because of their high input impedance.

In this configuration the input signal is applied between the base-collector region and the output
is taken from the emitter-collector region. Here the input parameters are VBC and IB and the
output parameters are VEC and IE. The common collector configuration has high input
impedance and low output impedance. The input and output signals are in phase. Here also the
emitter current is equal to the sum of collector current and the base current. Now let us calculate
the current gain for this configuration.

This common collector configuration is a non-inverting amplifier circuit. The voltage gain for
this circuit is less than unity but it has large current gain because the load resistor in this circuit
receives both the collector and base currents.

Circuit Diagram:

Model Graph:
Output Characteristics:
 Tabulation:
Input Characteristics:

VCE (V)= VCE (V)=

VCB (V) IB (μA) VCB (V) IB (μA)
 Output Characteristics:
IB (μA)= IB (μA)=

VCE (V) IE (mA) VCE (V) IE (mA)

 Procedure:

Input Characteristics:

1. Connect the circuit as per the circuit diagram.

2. Set VCE = 5V, vary, VBE insteps of 0.1V & note down the corresponding IB and repeat theabove
procedure for 10V & so on.
3. Plot the graph: VCB vs IB for a constant VCE.
4. Find the h-parameters: hfc & hic.

Output Characteristics:

1. Connect the circuit as per the circuit diagram.

2. Set IB = 20μA, vary VCE insteps of 1V & note down the corresponding IE . Repeat theabove
procedure for 40μA,80μA & so on.
3. Plot the graph: VCE vs IC for a constant of IB .
4. Find the h-parameters: hoc & hrc.

Result:Thus the characteristics of transistor in Common Collector configuration studied.

 3.COMMON EMITTER CHARCTERSTICS

AIM :To obtain the input and output characteristics of transistor in Common Emitter
Configuration using Hard ware and multisim software

APPARATUS :

1). Voltmeters : ( 0 – 2 )V Digital DC Type -------- 1No.

( 0 – 50 )V Digital / Analog DC Type ------- 1 No.
2). Ammeters : ( 0 – 20 )mA Digital / Analog DC Type ------- 1 No.
( 0 – 2000 )µA Digital only DC Type ---------1No.
3). Regulated Power Supply ( RPS ) : (0-30)V, 1A Dual channel---------------------------- 1 No.
5). Bread board : -------- 1 No.
5). Connecting wires : -------- A few Nos.
6). System with multisim :
COMPONENTS :
1). Transistor : BC 547 -------- 1 No.
2) Carbon fixedresistors a). 1 KΩ,½W -------- 1 No.
b). 33 KΩ, ½W -------- 1 No.

THEORY :
The transistor is a two junction, three terminal semiconductor device which has three regions namely
the emitter region, the base region, and the collector region. There are two types of transistors. An npn
transistor has an n type emitter, a p type base and an n type collector while a pnp transistor has a p type
emitter, an n type base and a p type collector. The emitter is heavily doped, base region is thin and lightly
doped and collector is moderately doped and is the largest. The current conduction in transistors takes place
due to both charge carriers- that is electrons and holes and hence they are named Bipolar Junction
Transistors (BJT).
BJTs are used to amplify current, using a small base current to control a large current between the
collector and the emitter. This amplification is so important that one of the most noted parameters of gain, β
(or hFE), which is the ratio of collector current to base current. When the BJT is used with the base and
emitter terminals as the input and the collector and emitter terminals as the output, the current gain as well as
the voltage gain is large. It is for this reason that this common-emitter (CE) configuration is the most useful
connection for the BJT in electronic systems
Operation regions and characteristics curves: Depending upon the biasing of the two junctions,
emitter-base (EB) junction and collector base(CB) the transistor is said to be in one of the four modes of operation.
as described below:

Operating B-E B-C

Features
region Junction Junction
Cut-off Reverse Reverse IB ≈ IC≈IE≈0 Off state – no current (VBE<0.7V)
Conducting
Saturation Forward Forward VBE=0.7V VCE ≈ 0.2V
structure
Amplifier Gain:
Active Forward Reverse (IC=βIB) VBE=0.7V VCE >0.2V
100-1000
Limited use
Reverseactive Reverse Forward (IB >IC)
Gain< 1
NOTE : VBE will vary from 0.6 to 0.7 V
The most important characteristics of transistor in any configuration are input and output
characteristics. A. Input Characteristics: ‐ It is the curve between input current IB and input voltage VBE
constant collector emitter voltage VCE. The input characteristic resembles a forward biased diode curve.
After cut in voltage the IB increases rapidly with small increase in VBE. It means that dynamic input
resistance is small in CE configuration. It is the ratio of change in VBE to the resulting change in base
current at constant collector emitter voltage. It is given by ΔVBE / ΔIB B. Output Characteristics: ‐ This
characteristic shows relation between collector current IC and collector voltage for various values of base
current. The change in collector emitter voltage causes small change in the collector current for the constant
base current, which defines the dynamic resistance and is given as ΔVCE / ΔIC at constant IB. The output
characteristic of common emitter configuration consists of three regions: Active, Saturation and Cut‐off

Active region: In this region base‐emitter junction is forward biased and base‐collector junction is reversed
biased. The curves are approximately horizontal in this region.

Saturation region: In this region both the junctions are forward biased.

Cut‐off : In this region, both the junctions are reverse biased. When the base current is made equal to zero,
the collector current is reverse leakage current ICEO. The region below IB = 0 is the called the cutoff region.
CIRCUIT DIAGRAM :

PROCEDURE :
A). Input characteristics:
1). Connected the circuit as shown in the circuit diagram.
2). Now Switched ON the RPS and all the meters.
3). Kept the VCE = 0V by adjusted theVCC.
4). Varied the supply voltage VBB in steps of 0.0V, 0.50V, 1V, 2V, 4V, 6V, 8V, 10V, 15V,20V, 25V,
30V and noted down the corresponding readings of VBE and IB the meters.
5). Kept the VBB at0V.
6). Repeated the same procedure from steps 4 to 5 for each time independently when VCE = 1V &
VCE = 2V which are kept by varying theVCC.
 7). Now switched OFF the RPS and all the meters.
8). 8). Took carethat
a). The values of VBE when VCE = 1V are greater than the values of VBE when VCE=0V from
5threading onwards in the tabularcolumn.
b). The values of VBE when VCE = 2V are greater than the values of VBE when VCE=1V from
5threading onwards in the tabularcolumn.
9). Plotted the graph between VBEon X-axis and IBon Y-axis.
Note: Do not vary the supply voltage VCC unless VBB is kept at 0 Volts.

10). We did the same experiment in multisim also, and noted down the corresponding values in tabular column (A ).

B). Output characteristics:

1). Connected the circuit as shown in the circuit diagram.
2). Now Switched ON the RPS and all the meters.
3). Kept the IB = 20µA by varying the supply voltage VBB
4). Varied the supply voltage VCC in steps 0.0V, 0.50V, 1V, 2V, 4.V, 6.V, 8.V, 10V, 15V, 18V, 20V,
22V, 24V, 26V, 28V, 30V and noteddown the corresponding readings of VCE and meters.
5). Now kept the VCC at0V.
6). Repeated the same procedure from steps 4 to 5 for each time independently when IB=40µA &
IB=40µA which are kept by varying theVBB.
7). Now switched OFF the RPS and all the meters.
8). Took care that,
a). The values of IC when IB = 40µA are greater than the values of IC when IB = 20µA from
5threading onwards in the tabularcolumn.
b). The values of IC when IB = 40µA are greater than the values of IC when IB = 60µA.
from 5threading onwards in the tabularcolumn.
9). Plotted the graph between VCEon X-axis and IConY-axis.
Note: Do not vary the supply voltage VBB unless VCC is kept at 0 Volts.
10). We did the same experiment in multisim also, and noted down the corresponding values in tabular column (B ).
TABULAR COLUMNS :
A). Input Characteristics:

Using Hardware Using Software

SL. VBB VCE=0V VCE=1V VCE=2V VCE=0V VCE=1V VCE=2V

No. (V)
VBE IB VBE IB VBE (V) IB (µA) VBE IB VBE IB VBE IB
(V) (µA) (V) (µA) (V) (µA) (V) (µA) (V) (µA)
1

2
3
4
5
6
7
8
9
10
11
12
B). Output Characteristics:

Using Hardware Using Software

SL. VCC IB=20µA/ IB=40µA/ IB=60µA/ IB=20µA/ IB=40µA/ IB=60µA/

No. (V) (0.02mA) (0.04mA) (0.06mA) (0.02mA) (0.04mA) (0.06mA)
VCE IC VCE IC VCE IC VCE IC VCE IC VCE IC
(V) (mA) (V) (mA) (V) (mA) (V) (mA) (V) (mA) (V) (mA)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
 EXPECTED GRAPHS :
A). Input characteristics with ‘h’ parameters:

B). Output characteristics with ‘h’ parameters:

PARAMETERS :
Common emitter (CE) configuration :
1). Input impedance (hie) =ΔVBE/ΔIB = Here VCE is constant.
2). Reverse voltage gain (hre) = ΔVBE/ΔVCE= Here IB is constant.
Note : The above two parameters are calculated from input characteristics
curve of CE configuration.
3). Output admittance(hoe) = ΔIC /VCE= Here IB is constant.
4). Forward current gain(hfe)= ΔIC/ΔIB= Here VCE is constant.
Note : The above two parameters are calculated from output characteristics
curve of CE configuration.
5). Forward voltage gain = 1 / hre. =
6). Output resistance = 1 / hoe.=

RESULT :The input , output characteristics and ‘h’ parameters of a transistor in Common Emitter
configuration are studied.
 VIVA VOICE Questions:

1. Define beta DC amplification factors of BJT.

2. Briefly explain reach through effect.

3. Explain the transistor operation with the help of four regions.

4. Compare CB,CE, CC configurations of a transistor.

5. What is the need of biasing?

6. Define stability factor of transistor.

7. What are the advantages of using potential divider bias?

8. Why we use h-parameters to describe a transistor?

9. Mention the characteristics of CE .

10. For Amplifier, Transistor operation which region?

 4.COMMON BASE CHARACTERSTICS

AIM :
To obtain the input and output characteristics of transistor in Common Base configurationusing Hardware
and multisim software.

APPARATUS :

1). Voltmeters: a). ( 0 – 2 )V Digital DC Type --------- 1No.

b). DMM Digital DC Type --------- 1No.
2). Ammeters a). ( 0 – 50 )mA Digital/Analog DC Type --------- 1 No.
b). (0-20)mA Digital DC Type --------- 1No.
3). Regulated Power Supply ( RPS ) : Dual channel,(0-30)V,1A --------- 1 No.
4). Bread board --------- 1 No.
5). Connecting wires : --------- A Few Nos.
6). System with Multisim software --------- 1 No.

COMPONENTS :
1). Transistor : BC547 --------- 1 No.
2). Carbon fixed resistors 1 KΩ ,½W --------- 2 No.

THEORY :

In this configuration we use base as common terminal for both input and output signals. The
configuration name itself indicates the common terminal. Here the input is applied between the base and
emitter terminals and the corresponding output signal is taken between the base and collector terminals with
the base terminal grounded. Here the input parameters are VEB and IE and the output parameters are VCB and
IC. The input current flowing into the emitter terminal must be higher than the base current and collector
current to operate the transistor, therefore the output collector current is less than the input emitter current.
The current gain is generally equal or less than to unity for this type of configuration. The input and
output signals are in-phase in this configuration. The amplifier circuit configuration of this type is called as
non-inverting amplifier circuit. The construction of this configuration circuit is difficult because this type has
high voltage gain values.
The input characteristics of this configuration are looks like characteristics of illuminated photo
diode while the output characteristics represents a forward biased diode. This transistor configuration has
high output impedance and low input impedance. This type of configuration has high resistance gain i.e.
ratio of output resistance to input resistance is high. The voltage gain for this configuration of circuit is given
below.
AV = Vout/Vin = (IC*RL) / (IE*Rin)
Current gain in common base configuration is given as
α = Output current/Input current
α = IC/IE
The common base circuit is mainly used in single stage amplifier circuits, such as microphone pre amplifier
or radio frequency amplifiers because of their high frequency response. The common base transistor circuit
is given below.
 CIRCUIT DIAGRAM :

PROCEDURE :
A). Input characteristics:
1). Connected the circuit as shown in the circuit diagram.
2). Now Switched ON the RPS and all the meters.
3). Kept the VCB = 0V by adjusted the VCC.
4). Varied the supply voltage VEE in steps of 0V, 0.5V, 1V, 2V, 5V, 10V, 15V, 20V, 25V, 30V
and noted down the corresponding readings of VBE and IE the meters.
5). Kept the VEE at0V.
6). Repeated the same procedure from steps 4 to 5 for each time independently when VCB = 2V &
VCB = 4V by varying the VCC.
7). Now switched OFF the RPS and all the meters.
8). Took care that,
a). The values of VBE when VCB = 2V are lesser than the values of VBE when VCB=0V from
5threading onwards in the tabular column.
b). The values of VBE when VCB = 4V are lesser than the values of VBE when VCB=2V from
5threading onwards in the tabular column.
9). Plotted the graph between VBEon X-axis and IEon Y-axis.
Note: Do not vary the supply voltage VCC unless VEE is kept at 0 Volts.
10). We did the same experiment in multisim also, and noted down the corresponding values in tabular column (A ).
B). Output characteristics:
1). Connected the circuit as shown in the circuit diagram.
2). Now Switched ON the RPS and all the meters.
3). Kept the IE = 2mA by varying the supply voltage VEE
4). Varied the supply voltage VCC in steps 0V, 0.5V, 1V, 2V, 5V, 10V,15V, 20V, 25V, 30Vand noted
down the corresponding readings of VCB and ICmeters.
5). Now kept the VCC at0V.
6). Repeated the same procedure from steps 4 to 5 for each time independently when IE=4mA &
IE=6mA by varying the VEE.
7). Now switched OFF the RPS and allthe meters. 8). Took care that,
a). The values of VCB when IE = 4mA are lesser than the values of VCB when IE = 2mA from
5threading onwards in the tabular column.
b). The values of VCB when IE = 6mA are lesser than the values
of VCB when IE = 4mA from 5threading onwards in the
tabular column.
 c). The values of IC when IE = 4mA are greater than the
values of IC when IE = 2mA from 5threading onwards in
the tabular column.
d). The values of IC when IE = 6mA are greater than the
values of IC when IE = 4mA from 5threading onwards in
the tabular column.
9). Plotted the graph between VCBon X-axis and IC on Y-axis.
Note: Do not vary the supply voltage VEE unless VCC is kept at 0 Volts.
10). I did the same experiment in multisim also, and noted down the corresponding values in tabular column (B ).
TABULAR COLUMNS :
A). Input Characteristics:
Using Hardware Using Software

SL. VBB VCB=0V VCB=2V VCB=4V VCE=0V VCE=2V VCE=4V

No. (V)
VBE IE VBE IE VBE IE VBE IE VBE IE VBE IE
(V) (mA) (V) (mA) (V) (mA) (V) (mA) (V) (mA) (V) (mA)

1 0

2 0.5
3 1
4 2
5 5
6 10
7 15
8 20
9 25
10 30
B). Output Characteristics :

Using Hardware Using Software

SL.No. IE = 2mA IE = 4mA IE = 6mA IE = 2mA IE = 4mA IE = 6mA

VCC
VCB IC VCB IC VCB IC VCB IC VCB IC VCB IC
(V) (V) (mA) (V) (mA) (V) (mA) (V) (mA) (V) (mA) (V) (mA)

1 0
2 0.5
3 1
4 2
5 5
6 10
7 15
8 20
9 25
10 30

EXPECTED GRAPHS :

A). Input Characteristics :

B). Output Characteristics :

PARAMETERS :

B). Common base (CB) configuration:

1). Input impedance (hib) = ΔVBE/ΔIE= Here VCB is constant.
=
2). Reverse voltage gain (hrb) = ΔVBE/ΔVCB= Here IE is constant.
Note :The above two parameters are calculated from input characteristics
curve of CB configuration.
3). Output admittance(hob) = ΔIC /VCB= Here IEis constant.
4). Forward current gain (hfb) =ΔIC/ΔIE = Here VCB is constant.
Note :The above two parameters are calculated from output characteristics
curve of CB configuration.
5). Forward voltage gain = 1 / hrb. =
6). Output resistance = 1 / hob=

RESULT :
The input and output characteristics of a transistor in Common Base configurations were studied
 VIVA VOCE Questions:

1. Mention the characteristics of CB Amplifier.

2. Define alpha DC amplification factors of BJT.

3. Explain the transistor operation with the help of four regions.

4. Compare CB, CE, CC configurations of a transistor.

5. What is the need of biasing?

6. Define stability factor of transistor.

7. What are the advantages of using potential divider bias?

8. Why we use h-parameters to describe a transistor?

9. For Amplifier, Transistor operation which region?

10. Briefly explain reach through effect.

 5.UJT CHARACTERSTCS

AIM :
1). To draw the volt ampere / static characteristics of UJT using Hardware as well as Multisim software
2). To determine the Intrinsic stand of ratio (η), Peak current (IP), Valley current (IV) , Peak voltage (VP) ,
Valley Voltage (VV)

APPARATUS :
1) Regulated Power Supply (RPS): (0-30)V Dual Channel ---- 1 No.
2) Voltmeters : (0-10)V Analog DC Type ---- 1No.
3) Ammeters : (0-20)mA Digital DC Type ---- 1 No.
4) Bread board : ---- 1 No.
5) Connecting wires : ---- A few Nos.
6) System with multisim software : ---- 1No.

COMPONENTS :
1). UJT 2N2646 : ---- 1No.
2). Resistors 1/2W : 2.2KΩ ---- 1No.

THEORY :

A Unijunction Transistor (UJT) is an electronic semiconductor device that has only one junction. It
has three terminals an emitter (E) and two bases (B1 and B2). The base is formed by lightly doped n-type bar
of silicon. Two ohmic contacts B1 and B2 are attached at its ends. The emitter is of p-type and it is heavily
doped. The resistance between B1 and B2, when the emitter is opencircuit is called interbase resistance. The
original UJT, is a simple device that is essentially a bar of N type semiconductor material into which P type
material has been diffused somewhere along its length.

The UJT is biased with a positive voltage between the two bases. This causes a potential drop along
the length of the device. When the emitter voltage is driven approximately one diode voltage above the
voltage at the point where the P diffusion (emitter) is, current will begin to flow from the emitter into the
base region. Because the base region is very lightly doped, the additional current (actually charges in the
base region) causes (conductivity modulation) which reduces the resistance of the portion of the base
between the emitter junction and the B2 terminal. This reduction in resistance means that the emitter
junction is more forward biased, and so even more current is injected. Overall, the effect is a negative
resistance at the emitter terminal. This is what makes the UJT useful, especially in simple oscillator circuits.
When the emitter voltage reaches Vp, the current starts to increase and the emitter voltage starts to decrease.
CIRCUIT DIAGRAM :

PROCEDURE :
1). Connections are made as per the circuit diagram.
2). Kept the VBBat 4V by varying the VBBi.e. Regulated Power Supply(RPS).
3). By varied the VEE I observed that in VE at one certain peak (max.) point it is suddenly fallen and
noted the two readings of VEE, VE, IE at which the VE is falling just from its maximum point &after the
fallen, in the tableform-1.
4). Now Kept the VEE at0V.
5). By varied the VEEinstepsi.e0V,2.6V, 2.7V,2.8V,2.9V,3.0V,5.5V, 5.6V,5.7V, 5.8V, 5.9V,6.0V, 6.2V,
6.4V, 10V, 20V, 30V I have noted down the corresponding readings of VE, IE into the tabular form-
6). Inserted the readings which are available in tabular form-1 into the tabular form-2 in ascending order.
7). After completed of taken the readings, kept the VEEat0V.
8). Now I have kept the VBBat 8Volts by varying VBBi.e. Regulated Power
Supply(RPS).9). Repeat the same steps from 3 to 7.
10). After completed of taken the readings, kept the VEE&VBBat0V.
11). Finally switched OFF the RPS and allmeters.
12). Plotted the graph by taken the Emitter current IEon X – axis and Emitter voltage VEonY- axis using the
readings in tabular form – 2.
13). Calculated the Negative resistance and Intrinsic stand of ratio from the graph, according to the
formulas, which are given under the heading ofPARAMETERS
14). We did the same experiment using multisim software , noted down the corresponding values in the
tabular form 1&2.

TABULAR FORM - 1: :

Using Hardware Using Software

Heading VBB = 4 Volts VBB = 8 Volts VBB = 4 Volts VBB = 8 Volts
VEE in VE in IE in VEE VE in IE in VEE in VE in IE in VEE in VE in IE in
volts Volts mA in Volts mA volts Volts mA volts Volts mA
volts
1. Just before
the max point
at which
suddenly
fallen inVE
2. Just after
fallen
from max.
point in VE
TABULAR FORM - 2 :
Using Hardware UsingSoftware

VBB = 4 Volts VBB = 8 Volts VBB = 4 Volts VBB = 8 Volts

Sl.No VEE in VE in IE in VEE in VE in IE in VEE in VE in IE in VEE in VE in IE in
volts Volts mA volts Volts mA volts Volts mA volts Volts mA
 EXPECTED GRAPH :
The following graph shows for Uni junction Transistor Characteristics.

PARAMETERS :

Note: The typical value of Intrinsic stand off ratio is 0.51 to 0.82
3. Peak current IP =
4. Valley current IV =
5. Peak Voltage VP =
6. Valley Voltage V=

RESULT :I have drawn the graph for volt ampere characteristics of Unijunction Transistor.
VIVA VOCE Questions:

1. What is UJT?

2. Which device used in relaxation oscillators?

3. UJT operating in which resistive region?

4. Mention the UJT Applications.

5. What is the intrinsic standoff ratio?

6. Mention typical value of intrinsic standoff ratio.

7. P-side Emitter in UJT is doped. ( heavily or lightly)

8. When Emitter terminal of UJT is open then the resistance of the base terminal is
(very high or very low).

9. How many terminals are there in a UJT?

10. Which type of material is the channel

 6.DESIGN OF SELF BIAS
AIM :
1). To design the Voltage divider bias circuit using BJT in Hardware and Multisim software.
APPARATUS :
1). Regulated power supply (RPS) :(0-30)V, 1A Dual channel ------ 1 No.
2). Ammeter :(0-2000)µA Digital DC Type ------ 1 No.
(0-20)mA Digital DC Type ------ 2 No.
3). Digital Multi Meter (DMM) : Digital ------ 1 No.
4). Bread Board : ------ 1 No.
5). Connecting wires : ------ A few Nos.
6). System with Multisim software : ------ 1 No.

COMPONENTS :

1). Resistors1/2W : 100Ω, 3.3KΩ , 10KΩ , 100KΩ ------ Each 1 No.

2). Bipolar Junction Transistor (BJT): BC547-npn ------ 1 No.

THEORY :

Voltage divider bias is the most popular and used way to bias a transistor. It uses a few resistors to
make sure that voltage is divided and distributed into the transistor at correct levels.

Voltage divider biasing is commonly used why? - Quora. Because Voltage divider biasing is beta-
independent and hence is more stable than any other biasing. The temperature will have no effect on Q-
point. Also as Voltage divider biasing always operates in the Active region, it's more commonly used.

Another configuration that can provide high bias stability is voltage divider bias. Instead of using a
negative supply off of the emitter resistor, like two-supply emitter bias, this configuration returns the emitter
resistor to ground and raises the base voltage.

The resistors help to give complete control over the voltage and current that each region receives in
the transistor. And the emitter resistor, RE, allows for stability of the gain of the transistor, despite
fluctuations in the β values.

The disadvantage of using high value resistors in a voltage divider is it makes the output impedance
higher and hence makes the output voltage more sensitive to loading. Lets run some approximate numbers.
At audio frequencies we can regard a coaxial cable as a capacitor.

Voltage divider bias is the most popular and used way to bias a transistor. It uses a few resistors to
make sure that voltage is divided and distributed into the transistor at correct levels. One resistor, the emitter
resistor, RE also helps provide stability against variations in β that may exist from transistor to transistor.
Design : Design a voltage divider bias circuit using Si NPN transistor having β = 360, VCC = 10V, VCE =
6V, VBE = 0.75, IC = 1 mA
CIRCUIT DIAGRAM :

PROCEDURE :
1). Connected the circuit as per shown in the circuit diagram.
2). Kept the RPS at 10V as VCC
3). Noted down the corresponding values in the tabular column which are shown in meters.
4). By Compared the theoretical and practical values both are sameapproximately .
5). Kept the RPS at 0V and switched off all the meters.
6). Repeated the same procedure in Multisim software also, and noted down the the corresponding values in
the tabular column
RESULT :
Designed the voltage divider bias circuit using the BJT in Hardware as well as in Multisim software.
VIVA VOICE Questions:
1. What is need for biasing?

2. Define stability factor of transistor.

3. What are the advantages of using potential divider bias?

4. What is the difference between bias compensation and stabilization?

5. List out the Biasing Techniques.

6. Alternative names of Voltage Divider Bias?

7. Applications of Voltage Divider Bias?

8. How much value of Stability factor for Voltage Divider Bias?

9. What is the Thevenin's Theorem?

10. Compare Self Bias with Fixed Bias, Collector to base bias.
 7.DESIGN OF SELF BIAS FOR MOSFET
AIM :
1). To design the Voltage divider bias circuit using MOSFET in Hardware and Multisim software.
APPARATUS :
1). Regulated power supply (RPS) :(0-30)V, 1A Dual channel ------ 1 No.
2). Ammeter :(0-20)mA Digital DC Type ------ 1 No.
3). Digital Multi Meter (DMM) : Digital ------ 1 No.
4). Bread Board : ------ 1 No.
5). Connecting wires : ------ A few Nos.
6). System with Multisim software : ------ 1 No.
COMPONENTS :
1). Resistors1/2W : 1.8KΩ, 100KΩ ------ Each 1 No.
: 2.2KΩ ------ 2 No.
2). Junction Field Effect Transistor (JFET) : BF W11 ------ 1 No.

THEORY :
Two series connected resistors form a voltage divider circuit ..... In this way, the applied drain voltage
is utilized to get the gate terminal voltage. A resistance is inserted into source terminal in series. The device
current flows through the resistance and causes a voltage

The JFET Amplifier

Just like the bipolar junction transistor, JFET’s can be used to make single stage class A amplifier circuits
with the JFET common source amplifier and characteristics being very similar to the BJT common emitter
circuit. The main advantage JFET amplifiers have over BJT amplifiers is their high input impedance which
is controlled by the Gate biasing resistive network formed by R1 and R2 as shown.

Biasing of JFET Amplifier

 This common source (CS) amplifier circuit is biased in class “A” mode by the voltage divider
network formed by resistors R1 and R2. The voltage across the Source resistor RS is generally set to be about
one quarter of VDD, ( VDD /4 ) but can be any reasonable value.
The required Gate voltage can then be calculated from this RS value. Since the Gate current is zero, (IG = 0)
we can set the required DC quiescent voltage by the proper selection of resistors R1 and R2.
The control of the Drain current by a negative Gate potential makes the Junction Field Effect
Transistor useful as a switch and it is essential that the Gate voltage is never positive for an N-channel
JFET as the channel current will flow to the Gate and not the Drain resulting in damage to the JFET. The
principals of operation for a P-channel JFET are the same as for the N-channel JFET, except that the polarity
of the voltages need to be reversed.
In the next tutorial about Transistors, we will look at another type of Field Effect Transistor called
a MOSFET whose Gate connection is completely isolated from the main current carrying channel.
Design : Design a N channel BFW11 JFET circuit which is provided by Voltage divider bias as per
following data
VDD = 10V, VDS = 8V, VP = -6V , ID = 1 mA, IDSS = 10 mA. This is the data sheet of BF W11
JFET.
CIRCUIT DIAGRAM :

PROCEDURE :
1). Connected the circuit as per shown in the circuit diagram.
2). Kept the RPS at 10V as VDD
3). Noted down the corresponding values in the tabular column which are shown in meters.
4). By Compared the theoretical and practical values both are sameapproximately .
5). Kept the RPS at 0V and switched off all the meters.
6). Repeated the same procedure in Multisim software also, and noted down the the corresponding values in
the tabular column
TABULAR COLUMN :
Using Hardware :

Sl. VDD
No
VDS (V) VGG (V) VGS (V) ID (mA)
(V)
T. P. T. P. T. P. T. P.
Value Value Value Value Value Value Value Value
1 10 8 0.215 1
Using Multisim software :

Sl. VDD
VDS (V) VGG (V) VGS (V) ID (mA)
No (V)
T. P. T. P. T. P. T. P.
Value Value Value Value Value Value Value Value
1 10 8 0.215 1

RESULT :
Designed the voltage divider bias circuit using the JFET in Hardware as well as in Multisim software.
 VIVA VOCE Questions:

1. What is need for biasing?

2. Define stability factor of transistor.

3. What are the advantages of using potential divider bias?

4. Compare voltage divide bias for BJT and FET.

5. List out the Biasing Techniques.

6. Alternative names of Voltage Divider Bias?

7. Applications of Voltage Divider Bias?

8. How much value of Stability factor for Voltage Divider Bias?

9. What is the Thevenin's Theorem?

10. Compare Self Bias with Fixed Bias, Collector to base bias.
 8.BJT AS A SWITCH
AIM :
To design the Switch with self bias using BJT.

APPARATUS :
1). Regulated power supply (RPS) :(0-30)V, 1A Dual channel ------ 1 No.
2). Ammeter :(0-2000)µA Digital DC Type ------ 1 No.
:(0-20)mA Digital DC Type ------ 1 No.
3). Digital Multi Meter (DMM) : Digital ------ 1 No.
4). Bread Board : ------ 1 No.
5). Connecting wires : ------ A few Nos.
6). System with Multisim software : ------ 1 No.
COMPONENTS :
1). Resistors1/2W : 1KΩ, 400KΩ, 1MΩ ------ Each 1 No.
2). Bipolar Junction Transistor (BJT) : BC547-npn ------ 1 No.
3). Buzzer : ------ 1 No.

THEORY :

Bipolar junction transistor (BJT) has three terminals and two junctions. The function of the transistor
is to amplify the signal. The three terminals of BJT are base, emitter and collector. BJT is either a PNP
transistor or NPN transistor based on the doping type of the three terminals. Using the transistor as a switch
is the simplest application of transistors.

How does a BJT act as a switch? A transistor has three modes: active region, cut off region and the
saturation region. The transistor acts as a switch in the cut-off mode and the saturation mode. The transistor
is fully off in the cutoff region and fully on the saturation region. A transistor can also be used as a switch
since a small electric current flowing through one part of it can cause larger current flow through the other
part of the transistor.
Design : Design a suitable circuit for switch using BJT, to ON buzzer. The data sheet of Buzzer is given
below,
VCCmax = 12V, IC = 4mA, VBE = 0.75V, β or hFE = 360.

PROCEDURE :
1). Connected the circuit as per shown in the circuit diagram.
2). Kept the RPS at 12V as VCC.
3). Kept RB =1KΩ and noted down the corresponding values in the tabular column.
4). Repeated the above procedure from step 2 to step 3 for RB = 400KΩ and 1MΩ.
5). Observed that, at RB = 1KΩ and 400KΩ the BJT is biased why because the VBE>=0.75V and the IC
value is more at RB =1KΩ as compared to RB =400KΩ . At these two conditions the Buzzer is switched
ON.
6). But BJT didn’t bias at RB = 1MΩ why because the VBE<0.75V and IC=1.53mA. This current would not
sufficient to switched ON the Buzzer.
7). Repeated the same procedure in Multisim software also, and noted down the the corresponding values in
the tabular column
TABULAR COLUMN :

Using Hardware Using Software

Sl.No. RB in VBE in VCE in IC in IE in IB in VBE in VCE in IC in IE in IB in

Ω Volts Volts Volts Volts Volts Volts Volts Volts Volts Volts
01 1KΩ
02 400KΩ
03 1MΩ

RESULT :
I have designed the Switch with self bias using BJT.
 VIVA VOCE Questions:

1. In which Region Transistor act as Switch? ( Active or saturation or cut-off)

2. When Base current is zero, Then Transistor act as ( Switch off or switch on).

3. What is Early effect in BJT?

4. Compare BJT switch and FET switch.

5. Explain the transistor operation with the help of four regions.

6. What is the Cut- In-Voltage of Transistor?

7. Classification of Transistors.

8. Mention the Transistor applications.

9. What is the importance of biasing in Transistors?

10. Compare CB,CE, CC configurations of a transistor.

 TRANSISTOR AS A SWITCH
T
Design Transistor act as a Switch and verify the operation. Choose VCC = 10V,
R
A
IC max = 10 m A, hfe =50, VCE Sat = 0.2, Vin = 4Vp-p, VBE Sat = 0.6 V.

Apparatus:

S.No Name of the component Specification Quantity

1. Resistors 1kΩ 1
8.2kΩ 1
2. Transistor BC 107 1
3. Bread board 1
4. Connecting wires 1 Bunch
5. Function generator 1
6. CRO 1
7. Dual Regulated Power supply (0-30) V DC 1

Circuit Diagram:

Theory:

When the I/P voltage Vi is negative or zero, transistor is cut-off and no current flows
through Rc , henceV0= VCC when i/p Voltage Vi jumps to positive voltage, transistor will be
driven into saturation. Then
V0 = Vcc – ICRC = VCEsat
Design procedure:

When Q is ON Then
Rc= (Vcc- VCE sat) / Ic max
= (10-0.2)/10 mA
=1 k ohms
IB ≥ IC max / hfe
≥ 10mA / 50

IB ≥0.2 mA
To keep transistor remains ON, IB should be greater than
Vin = IBRB + VBE Sat
2V = 0.2 mA RB + 0.6V
RB= 7 K ohms (choose practical values as 8.2 K Ω)

Procedure:-

1. Connect the circuit as shown in figure.

2. Apply the Square wave 4 Vp-p frequency of 1 KHz
3. Observe the waveforms at Collector and Base and plot it.

Precautions: -

1. When you are measuring O/P waveform at collector and base, keep the CRO in DC mode.
2. When you are measuring VBE Sat, VCE Sat keep volts/div switch at either 0.2 or 0.5
position.
3. When you are applying the square wave see that there is no DC voltage in that. This can be
checked by CRO in either AC or DC mode, there should not be any jumps/distortion in
waveform on the screen.
Model Graph:

Result:

Transistor as a switch has been designed and O/P waveforms are observed. .

Questions:

1. Differentiate between Diode and Transistor as a switch?

2. Mention typical values of VBE Sat, VCE Sat for both Si, Ge Transistors?
3. Define ON time, OFF time of the transistor?
4. In which regions Transistor acts as a switch?
5. Explain phenomenon of “latching “in a Transistor switch?
6. Define Rise time & fall time of a transistor switch?
 9.COMMON EMITTER AMPLIFIER

AIM :
1). To obtain the frequency response of Common Emitter amplifier.
2). To calculate the band width of this amplifier.

APPARATUS :
1). Function generator(FG) ----------------------------------------------------------------- 1 No.
2). Cathode Ray Oscilloscope(CRO) ------------------------------------------------------ 1 No.
3). Regulated Power Supply (RPS) : (0-30)V, 1A Dual channel ---------- 1 No.
4). Probes -------------------------------------------------------------------------------------- 1 No.
5). Bread board ------------------------------------------------------------------------------- 1 No.
6). Connecting wires : ----------------------------------------------------------------------- A few Nos.

COMPONENTS :
1). Transistor BC 547

2) Carbon fixed resistors a). 100Ω, ½W -------- 1 No.

b). 3.3KΩ , ½W -------- 1 No.
c). 10 KΩ , ½W -------- 1 No.
d). 100 KΩ , ½W -------- 1 No.
3). Capacitors a). 22µF -------- 2 No.
b). 33µF -------- 1 No.

THEORY :

This is one among the three configurations of these terminals. This configuration is the most widely
preferred one because it has both current and the voltage gains which produces the high power gain value.
When it operates in between cut-off and the region of saturation the transistor is said to be working as
switch. In order to make function as amplifier it must be operating in the region that is active.

A transistor in which the emitter terminal is made common for both the input and the output circuit
connections is known as common emitter configuration. When this configuration is provided with the supply
of the alternating current (AC) and operated in between the both positive and the negative halves of the
cycle in order to generate the specific output signal is known as common emitter amplifier.

In this type of configuration the input is applied at the terminal base and the considered output is to
be collected across the terminal collector. By keeping emitter terminal is common in both the cases of input
as well as output.
Working of Common Emitter Amplifier
Let us considered a CE circuit is provided with the divider circuit of the voltage such that it is
provided with the two resistors connected at the input side. In this type of configuration the base is
considered to be the input terminal whereas the collector is for collecting the output.

Other than this there are various electronic components are to be included in this circuit. One is the
resistor R1 that is the one to make the transistor to function in the forward biasing mode. The R2 is
responsible to make the biasing possible. There is the load resistor and the resistor that is connected at the
emitter so that it controls the stability related to thermal issue. The resistors R1 and R2 connected across the
terminal base as it is the input side. The load resistor is connected at the output side that is across the
collector terminal.

There are capacitors as well in the circuit. The capacitor C1 is at the input side and the capacitor C2
is connected across the emitter resistor. The C1 capacitor is responsible to separate the value of the AC
signals from that of DC signals. There exists the inverse relation between the R1 resistor and the biasing.

As R2 tends to increase the biasing tends to increase and vice-versa.Hence this is the reason it is
known as CE amplifier.

CIRCUIT DIAGRAM :

PROCEDURE :

1). Connected the circuit as per the circuit diagram.

2). Removed the probe of CRO from output (O/P) side and connected it at input (I/P) side to set the input
signal i.e. sine wave having the value of 20mVp-p&1KHz.
3). Then switched ON the function generator and CRO; but don’t switched ON the RPS.
4). Now Kept the AC/GND/DC switch is at AC position.
5). Now applied the input signal i.e. sine wave by pressing the sine wave function key in the function
generator.
6). Initially kept the 1KHz. frequency by varying the frequency control in the function generator.
7). Now applied the peak to peak amplitude of a sine wave is of 20mVp-p by varying the amplitude control
in the function generator through observing in the CRO.
8). Kept this value of input signal as constant up to the completion of the experiment Otherwise the wrong
output would occurred.
9) Then removed the probe of CRO from the input side and connected it across the output side.
10). Now switched ON the RPS and set the 10V in it i.e. VCC = 10V.
11). Varied the different frequency steps of 5Hz, 10Hz, 20Hz, 50Hz, 100Hz, 500Hz, 1KHz,10KHz, 20KHz,
50KHz, 100KHz, 200KHz, 400KHz, 500KHz, 800KHz, 1MHz. by adjusted the frequency control in the
function generator and noted down the corresponding values of output signal i.e. peak to peak amplitude
(voltage) of sine wave by observing in the CRO.
12). Now switched OFF the RPS, function generator and CRO.
13). Then calculated the voltage gain AV = VO/Vi&gain in dB = 20log10(AV) and noted down the values in
the specified columns of the tabular column.
14). Plotted the graphs (frequency response curves) as per below,
a). frequency on X-axis & gain in dB on Y-axis.
b). frequency on X-axis & voltage gain on Y-axis.
15) Calculated the band width from the above two (frequency response curves) graphs by using the formula
f2 – f1 which is given under the heading ofparameters.

TABULAR COLUMNS :

Input Voltage (Vi) = 20mV / 0.02V for all readings either in Software or
Hardware
Software Hardware
Sl. Freq- Output Voltage Gain Freq- Output Voltage Gain
No. uency Voltage gain in dB uency Voltage gain in dB
In (VO) AV = In (VO) AV = =
Hz/KHz In Volts = Vo/Vi 20log10( Hz/KH In Volts. Vo/Vi 20log10(
AV) z. AV)
1 20 Hz. 20 Hz.

2 100 Hz. 100 Hz.

3 200 Hz. 200 Hz.

4 1 KHz. 1 KHz.
5 200KHz. 200KHz.
6 400KHz. 400KHz.
7 600KHz. 600KHz.
8 800KHz. 800KHz.
9 1 MHz. 1 MHz.
10 100 MHz 100 MHz
11 500MHz. 500MHz.
EXPECTEDGRAPHS :
A). Frequency response curve for B). Frequency response curve for
For frequency verses gain in dB. For frequency verses voltage gain.
PARAMETERS :
1). Band width of frequency response curve for
frequency verses gain in dB. = f2 – f1 =
2) Band width of frequency response curve for
frequency verses voltage gain = f2 – f1 =

RESULT :
We have obtained the frequency response curves of Common Emitter Amplifier (CE)
for frequency verses gain in dB & frequency verses voltage gain and calculated the band width of both of
them. The band width values are given below,
1). Band width of frequency response curve for frequency verses gain in dB. =
2) Band width of frequency response curve for frequency verses voltage gain =
VIVA VOCE Questions:

1. Define beta DC amplification factors of BJT.

2. Briefly explain reach through effect.

3. Explain the transistor operation with the help of four regions.

4. Compare CB,CE, CC configurations of a transistor.

5. What is the need of biasing?

6. Define stability factor of transistor.

7. What are the advantages of using potential divider bias?

8. Why we use h-parameters to describe a transistor?

9. Mention the characteristics of CE Amplifier.

10. For Amplifier, Transistor operation which region?

 10.COMMON SOURCE MOSFET AMPLIFIER

AIM:To obtain the frequency response of MOSFET amplifier in common source

configuration with given specifications.

THEORY:
The MOSFET structure has become the most important device structure in
the electronics industry. It dominates the integrated circuit technology in Very
Large Scale Integrated (VLSI) digital circuits based on n-channel MOSFETs and
Complementary n- channel and p-channel MOSFETs (CMOS). The technical
importance of the MOSFET results from its low power consumption, simple
geometry, and small size, resulting in very high packing densities and compatibility
with VLSI manufacturing technology. Two of the most popular configurations of
small-signal MOSFET amplifiers are the common source and common drain
configurations. The common source circuit is shown below. The common sources,
like all MOSFET amplifiers, have the characteristic of high input impedance. High
input impedance is desirable to keep the amplifier from loading the signal source.
This high input impedance is controlled by the bias resistors R1 and R2). Normally
the value of the bias resistors is chosen as high as possible. However, too big a value
can cause a significant voltage drop due to the gate leakage current. A large voltage
drop is undesirable because it can disturb the bias point. For amplifier operation the
MOSFET should be biased in the active region of the characteristics.

CIRCUIT DIAGRAM:
VDD = 12 V

RD
R1
2.7 kΩ CC 1 μF
100 kΩ

CC 1 μF
820 kΩ

2N7000

CRO
R2
Vin
33 kΩ RS
470Ω CS
10 μF

Fig. 1 Circuit diagram of MOSFET

amplifier

1
DESIGN:

Assume VDD = 12V, VRD = 5V, VDS = 6V, ID = 2 mA

V 5
R = RD = = 2.5 use 2.7 kΩ resistor.
D
ID 210 kΩ
10−3
Now, the voltage across source side resistance VDD – VDS – VRD = 12 – 6 – = 1V
VRS = 5
As, IS = ID, (no current flows through the
VRS 1
RS = = = 500 gate), use 470 Ω resistor.
ID 2 10 Ω
10−3
Voltage – divider bias circuit design:

Assume, R1 = 100 kΩ. By, voltage division rule, R2 can be obtained as,
R2
V =V 
R1 + R2
G DD

Selecting the value of VG as 4V

R2
4 = 12  R  47 kΩ
100 10 103 + R2 2

Design of capacitors:

Assume impedance of coupling capacitor be < 1.5 kΩ. Therefore,

1
XC1 ≤ 1.5kΩ ie  1.5 kΩ
2 fC1

Given, the frequency of the input signal is

100Hz. C1 = 1.06μf. use 1 μf

capacitor. Let C1 = C2 = 1 μf.

For the bypass capacitor,

1
XCS ≤ 150Ω ie  150 Ω
2 fCS

CS = 10μf

2
PROCEDURE:

Set up the circuit as shown in the figure with an input signal of 0.2V (peak-to-peak) at 1000 Hz. Observe
the output on the CRO. Vary the frequency of the input signal over a range of values (from 50Hz to a few MHz) to
obtain the frequency response which is a graph between log f (x-axis) and gain in dB (y-axis).
OBSERVATION:

Frequency Input voltage Output voltage Gain Gain

Vo Vo
f Vi Vi 20 log
Vi Vi
Hz V V - dB
 GRAPH (to be obtained):

Fig 2. Frequency response

RESULT:

The required common source MOSFET amplifier was designed and set up to obtain the required frequency
response.
11.Common source Characteristics of
MOSFET-Enhancement Mode

5
CIRCUIT DIAGRAM OF MOSFET CHARACTERISTICS:

Nature of Graph:

Pin configuration of MOSFET:

6
 STATIC CHARACTERISTICS OF MOSFET

AIM: To plot the Transfer and Drain characteristics of MOSFET and

determine Trans conductance and output Resistance.

APPARATUS REQUIRED:

S.no Apparatus Range Qty

1 MOSFET IRF 740 1 No
2 Resistor 560Ω 1 No
3 Ammeter (DC) 0-60mA 1 No
4 Voltmeter (DC) 0-60V 1 No
5 Voltmeter (DC) 0-30V 1 No
6 Multimeter - 1 No
7 VRPS 0-30V 3 Nos
8 Connecting wires - Few

THEORY:
A MOSFET (Metal oxide semiconductor field effect transistor) has three terminals called
Drain, Source and Gate. MOSFET is a voltage controlled device. It has very high input
impedance and works at high switching frequency.
MOSFET’s are of two types 1) Enhancement type 2) Depletion type.
TABULAR COLUMN:
A) Transfer Characteristics:

VDS1= Volts VDS2= Volts

VGS (V) ID (mA) VGS (V) ID (mA)

B) Drain Characteristics:

VGS1= Volts VGS2= Volts

VDS (V) ID (mA) VDS (V) ID (mA)

CALCULATION:

Trans conductance:

gm = ∆ID = mho at constant VDS

∆VGS

Output Resistance:
∆VDS
R0 = = Ω at constant VGS
∆ID
PROCEDURE:
A) Transfer Characteristics:
1. Make the connections as per the circuit diagram.
2. Initially keep V1 and V2 at 0 V.
3. Switch ON the regulated power supplies. By varying V1, set VDS to some
constant voltage say 5V.
4. Vary V2 in steps of 0.5V, and at each step note down the corresponding
values of VGS and ID. (Note: note down the value of VGS at which ID starts
increasing as the threshold voltage).
5. Reduce V1 and V2 to zero.
6. By varying V1, set VDS to some other value say 10V.
7. Repeat step 4.
8. Plot a graph of VGS versus ID for different values of VDS.

B) Drain or Output Characteristics:

1. Make the connections as per the circuit diagram.
2. Initially keep V1 and V2 at zero volts.
3. By varying V2, set VGS to some constant voltage (must be more than
Threshold voltage).
4. By gradually increasing V1, note down the corresponding value of VDS and
ID. (Note: Till the MOSFET jumps to conducting state, the voltmeter which
is connected across device as VDS reads approximately zero voltage. Further
increase in voltage by V1 source cannot be read by VDS, so connect
multimeter to measure the voltage and tabulate the readings in the tabular
column).
5. Set VGS to some other value (more than threshold voltage) and repeat step 4.
6. Plot a graph of VDS versus ID for different values of VGS.

Note: If VDS is lower than VP (pinch-off voltage) the device works in the constant resistance
region that is linear region. If VDS is more than VP, a constant ID flows from the device and this
operating region is called constant current region.
12.Common source Characteristics of
MOSFET-Depletion Mode

12
CIRCUIT DIAGRAM OF MOSFET CHARACTERISTICS:

Nature of Graph:

Pin configuration of MOSFET:

13
 STATIC CHARACTERISTICS OF MOSFET

AIM: To plot the Transfer and Drain characteristics of MOSFET and

determine Trans conductance and output Resistance.

APPARATUS REQUIRED:

S.no Apparatus Range Qty

1 MOSFET IRF 740 1 No
2 Resistor 560Ω 1 No
3 Ammeter (DC) 0-60mA 1 No
4 Voltmeter (DC) 0-60V 1 No
5 Voltmeter (DC) 0-30V 1 No
6 Multimeter - 1 No
7 VRPS 0-30V 3 Nos
8 Connecting wires - Few

THEORY:
A MOSFET (Metal oxide semiconductor field effect transistor) has three terminals called
Drain, Source and Gate. MOSFET is a voltage controlled device. It has very high input
impedance and works at high switching frequency.
MOSFET’s are of two types 1) Enhancement type 2) Depletion type.
TABULAR COLUMN:
A) Transfer Characteristics:

VDS1= Volts VDS2= Volts

VGS (V) ID (mA) VGS (V) ID (mA)

B) Drain Characteristics:

VGS1= Volts VGS2= Volts

VDS (V) ID (mA) VDS (V) ID (mA)

CALCULATION:

Trans conductance:

gm = ∆ID = mho at constant VDS

∆VGS

Output Resistance:
∆VDS
R0 = = Ω at constant VGS
∆ID
PROCEDURE:
A) Transfer Characteristics:
1. Make the connections as per the circuit diagram.
2. Initially keep V1 and V2 at 0 V.
3. Switch ON the regulated power supplies. By varying V1, set VDS to some constant voltage
say 5V.
4. Vary V2 in steps of 0.5V, and at each step note down the corresponding values of VGS and
ID. (Note: note down the value of VGS at which ID starts increasing as the threshold voltage).
5. Reduce V1 and V2 to zero.
6. By varying V1, set VDS to some other value say 10V.
7. Repeat step 4.
8. Plot a graph of VGS versus ID for different values of VDS.

B) Drain or Output Characteristics:

1. Make the connections as per the circuit diagram.
2. Initially keep V1 and V2 at zero volts.
3. By varying V2, set VGS to some constant voltage (must be more than Threshold voltage).
4. By gradually increasing V1, note down the corresponding value of VDS and ID. (Note: Till the
MOSFET jumps to conducting state, the voltmeter whichis connected across device as VDS
reads approximately zero voltage. Further increase in voltage by V1 source cannot be read by
VDS, so connect multimeter to measure the voltage and tabulate the readings in the tabular
column).
5. Set VGS to some other value (more than threshold voltage) and repeat step 4.
6. Plot a graph of VDS versus ID for different values of VGS.

Note: If VDS is lower than VP (pinch-off voltage) the device works in the constant resistance region that is
linear region. If VDS is more than VP, a constant ID flows from the device and this operating region is called
constant current region.
 APPENDIX – A
SYNBOLS & TERMINAL IDENTIFICATION OF ELECTRONIC COMPONENTS
Here we have given the symbols and terminal identification of different types of electronic
components.
1. RESISITOR :
Symbols &Terminalidentification :

Fixed Resistor Resistor color code:

The resistance value and tolerance of carbon resistor is usually indicated by color coding.
Color strips or bands are printed on the insulating body. They consists of 4 or more than 4 color bands and
they are read from left to right. The following figure shows the color code diagram of carbon resistor,

In the above figure, 1st band represents first digit, 2nd band represents second digit, 3rd band
represents the multiplier and fourth band represents the tolerance in persentage.Some resistors are having
more than 4 bands, but the band which is first from tolerance band is multiplier and remaining bands are
same. The color coding of the carbon resistor is given in the following,

Sl.No. Color Ist digit for the IInd digit for the Multiplier digit for Resistance
Ist Band. IInd band. the IIIrdband. Tolerance
1 Black 0 0 100 --
2 Brown 1 1 101 --
3 Red 2 2 102 ±2%
4 Orange 3 3 103 ±3%
5 Yellow 4 4 104 ±4%
6 Green 5 5 105 --
7 Blue 6 6 106 --
8 Violet 7 7 107 --
9 Gray 8 8 108 --
10 White 9 9 109 --
11 Gold -- -- 10-1 ±5%
12 Silver -- -- 10-2 ±10%
13 No Band -- -- -- ±20%
 If theIIIrdband is consists the Gold color, the remaining digits (which are coded according to the
color bands from the left side in the resistor) are multiplied by 10-1, If it is Silver the remaining digits are
multiplied by 10-2.
If the IVth band is Gold the tolerance is ±5%,
If the IVth band is Silver the tolerance is ±10%,
If the IVth band is No color (Absent) the tolerance is ±20% .
Note: Some resistors are consists the more than 4 bands. At this time we can consider the bands as per
following,
i). Thetolerance band is at last (end2 terminal)
ii). The multiplier band is just at left side of the tolerance band ,
iii). The remaining regular bands(i.e. 1st,2 nd,3 rd,4th and so on) are from left side (end1
terminal) and up to the band which is just left side of the multiplier band of the resistor.
Example 1
Band / Color Ist band. IInd band. IIIrd band. IVth band. Vth band.
Colors Red Black Black Green No Color
Digits 2 0 0 105 ±20%
From the above table we can found the value of the carbon resistor as following,
Value 2 0 0 × 105 ±20%.
= 20 × 10× 105 ±20%.
= 20 MΩ ± 20%
Example 2
Band / Color Ist band. IInd band. IIIrd band. IVth band.
Colors Brown Black Gold Gold
Digits 1 0 10-1 ±5%
From the above table we can found the value of the carbon resistor as following,
Value 1 0 × 10-1 ± 5%.
= 1 Ω ± 5%.
2. CAPACITOR :

Symbols &Terminalidentification :

3. DIODES:
4. TRANSISTORS:
 APPENDIX - B
STUDY & OPERATION OF AMMETERS, VOLTMETERS, DIGITALMULTIMETERS(DMM),REGULATED
POWER SUPPLY (RPS), TRANSFORMERS AND BREAD BOARD.

1. BENCH PANNEL METERS :

Analog bench panel meters :

Digital bench panel meters :

2. DIGITAL MULTI METERS (DMM):

These meters shown the measurement readings in digital form, it means in digits
Safety Information: Follow all safety and operating instructions to ensure that the meter is used safely and is
kept in good operating condition.
During Use:
1. Never exceed the protection limit values indicated in specifications for each range of measurement.
2. When the meter is linked to a measurement circuit, do not touch un used terminals.
3. When the value scale to be measured is unknown beforehand, set the range selector at the highest
position.
4. Do not measure voltage if the voltage on the terminals exceeds 1000v above earth ground.
5. Always be careful when working with voltages above 60V DC or 30V AC rms, keep fingers behind
the probe barriers while measuring.
6. Before rating the range selector to change functions, disconnect test leads from the circuit under test.
7. Never connect the meter leads across a voltage source while the function switch is in the current,
resistance, diode or continuity mode. Dong so can damage the meter.
8. When carrying out measurements on TV or switching power circuits, always remember that there may
be high amplitude voltages pulses at test points, which can damage the meter.
9. Never perform resistance measurements on live circuits.
10. Never perform capacitance measurements unless the capacitor to be measured has been discharged
fully.
 11. If any faults or abnormalities are observed, the meter cannot be used any more and it has to be
checked out.
12. Never use the meter unless the rear case in place and fastened fully.
13. Please do not store or use the meter in areas exposed to direct sunlight, high temperature, humidity or
condensation.
14. Always set the power switch to the OFF position when the meter is not in use.
Description: The following figure shows the front panel diagram of Digital Multi meter (DMM).

Function and Range Selector:

1). This meter has the function of preventing the test leads from wrong connecting. The input
socket for red test lead is arranged with proper functions and ranges, when the transform
switch can’t be rotated, stop rotating. It means the selected range isn’t suitable with
position of the red lead socket. Pull out the red lead and then select the range required,
this provides protection for meter to avoid damage by operating improperly.
2). A rotary switch is used to select functions as well as ranges.
Operating instructions of DMM :
Data Hold:If you need data hold when measuring, you can put on ‘H’, it will hold the reading; if you put the
button again, data hold stops.

Back light:If the dark circumstance light makes the reading difficulty when measuring, you can put ON to
open the back light.
Preparation for measurement:
1. Put ON the POWER button switch. If the battery voltage is less than 7V, display will shown ,
the battery should be replaced at this time.
2. The besides the input jack shows that the input voltage or current should be less than
specification on the sticker of meter to protect the inner circuit from damaging.

3. Select a range properly for the item to be measured and set the rotary switch accordingly.
Measuring Voltage:
1. Connect the black test lead to COM jack and the red to V/Ω/ CAP jack.
2. Set the rotary switch at desired V------ (DC Position) or V~ (AC Position) range position.
3. Connect test leads across the source or load under measurement.
4. You can get reading on LCD. The polarity of the red lead connection will be indicated along with the
voltage value when making DC voltage measurement.
Note:
1. When only the digit 1 or -1 is displayed, it indicates over-range situation and the higher range has to
be selected.
2. When the value scale to be measured is unknown beforehand, set the range selector at the highest
position.
3. It means you can’t input the voltage more than 1000V DC or 7000V rms AC, it’s possible to show
higher voltage, but it may destroy the inner circuit.
Measurement of Current :
1. Connect the black test lead to COM jack and the red to mA jack. For a maximum 200mA current,
for a maximum 20A current, move the red lead to the 20A jack.
2. Set the rotary switch at desired A----- (DC current position) or A~ (AC current position ) range
position.
3. Connect test leads in series with the load under measurement.
4. You can get reading on LCD. The polarity of the red lead connection will be indicated along with
the current value when making DC current measurement.
Note:
1. When only the digit 1 or -1 is displayed, it indicates over-range situation and the higher range has to
be selected.
2. When the value scale to be measured is unknown beforehand, set the range selector at the highest
position.
3. The picture means the socket mA’s maximum current is 200mA and 20A’s maximum current
is 20A, over current will destroy the fuse.
Measurement of Resistance:
1. Connect the black test lead to COM jack and the red to V/Ω/ CAP jack
2. Set the rotary switch at desired Ω range position.
3. Connect test leads across the resistance under measurement.
4. You can get reading on LCD.
Note:
1. When only the digits 1 or -1 is displayed, it indicates over-range situation and the higher range has to
be selected.
2. For measuring resistance above 1M Ω, the meter may take a few seconds to get stable reading.
3. When the input is not connected, i.e. at open circuit, the digit 1 will be displayed for the over-range
condition.
4. When checking in-circuit resistance, be sure the circuit under test has all power removed and that all
capacitors have been discharged fully.
5. At 200M Ω range, display reading is around 10 counts when test leads are shorted. These counts
have to be subtracted from measuring results. For examples, for measuring 100M Ω Resistance, the
display reading will be 101.0 and the correct measuring result should be 101.0-1.0=100.0M Ω.
6. When the value scale to be measured is unknown beforehand, set the range selector at the highest
position.
Measurement of Capacitance:
1. Connect the black test lead to COM jack and the red to V/Ω/ CAP jack.
2. Set the rotary switch at the desired F range position.
3. Before inserting the capacitor under measurement into capacitance testing socket, be sure that the
capacitor has been discharged fully.
4. You can get reading on LCD.
Transistor Test:
1. Set the rotary switch at hfe position.
2. Determine whether the transistor under testing is NPN or PNP and locate the emitter, base and
collector leads. Insert the leads into proper holes of hfe socket on the front panel.
3. Read the approximate hfe value at the testing condition of base current Ib 10µA and VCE 3V
Diode Testing:
1. Connect the black test lead to COM jack and the red to V/Ω/ CAP jack. (The polarity of red lead is
+).
2. Set the rotary switch position at the (Diode) range position.
3. Connect the red lead to the anode and the black lead to the cathode of the diode under the testing.
4. You can get the reading on the LCD.
Note:
1. The meter will show approximate forward voltage drop of the diode.
2. If the lead connections are reversed, only the digit 1 will be displayed.
Continuity Test:
1. Connect the black test lead to COM jack and the red to V/Ω/ CAP jack. (The polarity of red lead is
+).

2. Set the rotary switch position at the (Buzzer) range position.

3. Connect the test leads across two points of the circuit under the testing.

4. If continuity exists (i.e., resistance less than about 70 Ω), built-in buzzer will sound.
Note:
1. If the input open circuit, the digit1will be displayed.
Measurement of Frequency:
1. Connect the black test lead to COM jack and the red to V/Ω/ CAP jack. (The polarity of red lead is
+).
2. Set the rotary switch position at the 20KHZ range position.
3. Connect the test leads across the source or load under measurement.
4. You can get the reading on the LCD.
Note:
1. Reading is possibly at input voltage above 10V r m s, but the accuracy is not guaranteed.
2. In noisy environment it is preferable to use shield cable for measuring small signal.
Measurement of Temperature :
1. Set the rotary switch at the ºC range position.
2. The LCD will shows the current temperature of the environment.

3. REGULATED POWER SUPPLY (RPS):

This equipment can uses to give power supply of DC voltage to the electronic circuits. Mostly these
equipments used by scientists to investigate the new electronic circuits in their laboratories. It is just acts as
Battery. It is abbreviated as RPS.
The following figure shows the front panel diagram of the Regulated Power Supply.
Operational controls of the regulated power supply:
The following table describes the working of the controls for Regulated Power Supply.

Sl.No. Name of the Control Description

1. Power ON Switch to connect instrument to mains supply.
2. Voltage Course Separate controls can available for both channels CH1 & CH2. By
varying this control can get desired DC voltage in large variation in
between 0 to 28V.
3. Voltage Fine Separate controls can available for both channels CH1 & CH2. By
varying this control can get desired DC voltage in small variation in
between 0 to 2V.
4. Current Limit Separate controls can available for both channels CH1 & CH2. Adjust
the limit of maximum current that can be drawn by the load. Beyond
the set current limit the power supply functions as a constant current
source.
5. Displays Consisting two displays(Which are making by using seven segment
displays) in both channels, i.e. CH1 & CH2. Uses to display the
readings regarding to the Voltage & Current values.
6. Output Binding Posts : Uses to get the output voltages from the RPS.

1. Red Binding Post: To get Positive output.

Available for both channels i.e.CH1 & CH2.

2. Black Binding Post: To get the negative output voltage and as Chassis ground.
Available for both channels i.e. CH1 & CH2.

3. Green Binding post: Available for bother channels i.e. CH1 & CH2.

7. Selector Switch Consisting two separate switches for both channels to select the
voltage or current reading display in the seven segment displays.

Indicators available in the regulated power supply:

The following table describes the indicators available in the Regulated Power supply.

Sl.No. Name of the Indicator Description

1. Over Load Provided for both channels i.e. CH1 & CH2 glows when the
load current reaches the maximum current set by the current
limit control.
2. Fuse Blown Glows when the main supply fuse is blown.

Rules to be followed while operating the regulated power supply( RPS):

The flowing rules should be followed before switch ON the Regulated Power Supply,
1. Initially Keep the voltage Course & Voltage fine controls of RPS at minimum position. Later (After
switch ON the RPS) can vary these controls slowly to get the required voltage.

2. Always keep the Current Limit control at maximum position, Otherwise the display can shows the
constant voltage instead of varying.
Trouble shooting while operating the rps:
The following trouble shooting can done while operating the RPS,
During connecting the RPS to the circuit and varying the Voltage Course & Voltage Fine Controls, If
it displays the voltage as constant or above 30V then it can said that either the circuit is shorted OR the
Current Limit control is not kept at maximum position.This problem can solve to prevent the circuit from
shorted and by keeping the Current Limit control at maximum.
4. TRANSFORMER :
It works on the concept of flux linkage and mutual inductance. The transformer has primary and
secondary windings. It transfers power from primary to secondary. It can be step-up or step down
transformer.
Step –up transformer :It consists more no. of windings in the secondary side compare to primary side. It can
uses to step-up to the applied primary voltage.
Step-down transformer : It consists less no. of windings in the secondary side compare to primary side. It
can uses to step-down to the applied primary voltage
Centre tapped transformer :It can consists of a terminal in the middle of the transformer which can uses to
divide the voltages at secondary side.
The symbol & identification of a transformer is given in next page,
BREAD BOARD :
It is used for testing the circuit. While connecting the circuit to a another board OR PCB(Printed
Circuit Board), it is a necessary to check that circuit in a bread board. The figure of the bread board is given
below,

In the above two figures, the horizontal lines are treated as rows and vertical lines are columns. Part-
1, part-2, part-5 & part-6 are consists of horizontal lines/rows, and part-3, part-4 are vertical lines/columns.
In we observed in the figure No.2, in part-1, part-2, part-5, part-6 the holes are connected in
horizontal. Therefore if we connected voltage source to these parts the current is passed through them as
horizontal manner. If we observed, there is no connection in between part-1 & part-2. It means the current is
not flow from part-1 to part-2. If we require to pass the current in between these parts, it is a need to connect
a connecting wire in between them.
In part-1 and part-2 two horizontal lines are available. There is no connection in between them in
each part. The same principle is applicable for part-5 & part-6.
In part-3 & part4 the holes are connected in vertical manner. Therefore if we connected voltage
source to these parts the current is passed through them as vertical manner. If we observed, there is no
connection in between part-3 & part-4. It means the current is not flow from part-3 to part-4. If we require
to pass the current in between these parts, it is a need to connect a connecting wire in between them. In part-
3 and part-4 no. of vertical lines are available. There is no connection in between them in each part.
Note: If we want to flow a current from any hole of any one of the part To a hole of any one of the part in
the bread board, we require to connect the wire in between these two holes.
Rules to follow to give the connections in the bread board :
1). The voltage sources are to be connect in part-1&part2(Voltage Source bars).
2). The ground connections are in part-5&part6(ground bar).\
3). The remaining connections in the circuit are connected in the part-3 & part-4.

Example Circuits to practice on Bread board :

 APPENDIX – C
STUDY AND OPERATION OF CRO AND FUNCTION GENERATOR
1. CRO :The following figure shows the front pannel diagram of CRO ,
Applications of CRO :
The CRO mainly can be used to calculate the,
1). Time period and Frequency measurement of the signal.
2). Voltage or Amplitude measurement of the signal.
3). Current measurement of the signal.
Functions of controls, connectors and indicators of CRO :
Before turning this instrument on familiarize yourself with the controls,
connectors and indicators and other features described in this section. The following description are keyed to
the items called out in the figure, which is in the next page.

SI. Name of the Control No/ Function

No. Control / Item. Item No.
Main power switch of the instrument. When this switch is
1 POWER 6
turned ON, the LED (5) is also turned ON.
2 INTENSITY 2 Controls the brightness of the spot or trace.
3 FOCUS 3 For focusing the trace to the sharpest image.
Semi – fixed potentiometer for aligning the horizontal trace
4 TRACE ROTATION 4
in parallel with graticule lines.
5 FILTER 35 Filter for ease of waveform viewing.
Vertical input terminal of CH1. When in X-Y operation, X-
6 CH1 (X) input 8
axis input terminal.
Vertical input terminal of CH2. When in Y- operation, Y-
7 CH1 (Y) input 20
axis input terminal.
Switch for selecting connection mode between input signal
and vertical amplifier.
AC : AC coupling
8 AC-GND-DC 10,18
GND : Vertical amplifier input is grounded and input
terminals are disconnected.
DC : DC coupling
Select the vertical axis sensitivity, from 5mV/DIV to
9 VOLTS/DIV 7,22
5V/DIV in10 ranges.
Fine adjustment of sensitivity, with a factor of ½.5 of the
indicated value. When in the CAL position, sensitivity is
10 VARIABLE 9,21
calibrated to indicated value. When this knob is pulled out
(x5 MAG state), the amplifier sensitivity is multiplied by 5.
CH1 & CH2 DC These are used for the attenuator balance adjustment.
11 13,17
BAL.
VERTICAL Vertical position control of trace or spot.
12 11,19
POSITION
Select the operation modes of CH1 & CH2 amplifiers.
CH1 : The oscilloscope operates as a single channel
instrument with CH1 alone.
13 VERT MODE 14
CH2 : The oscilloscope operates as a single channel
instrument with CH2 alone.

When this switch is released in the dual-trace mode, the

channel 1 and channel 2 inputs are alternately displayed
(Normally used at faster sweep speeds).
14 ALT/CHOP 12 When this switch is engaged in the dual-trace mode,
the channel 1 and channel 2 inputs are chopped and
displayed simultaneously (normally used at slower sweep
speeds).

P.T.O.
 Continued for description of CRO controls.

SI. Name of the Control No/ Function

No. Control / Item. Item No.
Inverts the CH2 input signal when the CH2INV switch mode
15 CH2 INV 16 is pushed in. The channel2 input signal in ADD mode and the
channel2 trigger signal pick off are also inverted.
Input terminal is used for external triggering signal. To use
16 EXT TRIG IN 25
this terminal, set SOURCE switch (24) to the EXT position.
Select the internal triggering source signal, and the EXT
TRIG IN input signal
CH1: When the VERT MODE switch (14) is set in the
DUAL or ADD state, select CH1 for the internal triggering
source signal.
CH2: When the VERT MODE switch (14) is set in the
17 SOURCE 24 DUAL or ADD state, select CH2 for the internal triggering
source signal.
LINE: To select the AC power line frequency signal as the
triggering signal.
EXT: The external signal applied through EXT TRIG IN
input terminal (25) is used for the external triggering source
signal.
When the VERT MODE switch (14) is set in the DUAL or
ADD state, and the SOURCE switch (24) is selected at CH1
18 TRIG.ALT 28 or CH2, with the engagement of the TRIG.ALT switch (28),
it will alternately select CH1 & CH2 for the internal
triggering source signal.
This terminal delivers the calibration voltage of 2Vp-p approx.
19 CAL 1
1KHz, positive square wave.
20 GND 15 Ground terminal of oscilloscope mainframe.
FREQUENCY Display a synchronized signal frequency (models have this
21 33
METER function only).
22 SLOPE 27 Select the triggering slope.
“+” : Triggering occurs when the triggering signal crosses the
triggering level in positive-going direction.
“-” : Triggering occurs when the triggering signal crosses the
triggering level in negative-going direction.
23 LEVEL 29 To display a synchronized stationary waveform and set a start
point for the waveform
Towards “+”: The triggering level moves upward on the
display waveform.
Towards “-”: The triggering level moves downward on the
display waveform.
Click LEVEL by fully clockwise position, then triggering
level is automatically maintained at optimum value
24 LOCK 23
irrespective of the signal amplitude, requiring no manual
adjustment of triggering level.

P.T.O.
 Continued for description of CRO controls

SI. Name of the Control Control No/ Function

No. / Item. Item No.
Select the desired trigger mode.
AUTO: When no triggering signal is applied or when
triggering signal frequency is less than 25Hz, sweep runs in
the free run mode.
NORM: When no triggering signal is applied, sweep is in a
ready state and the trace is blanked out. Used primarily for
25 TRIGGER MODE 26 observation of signal 25Hz.
TV-V: This setting is used when observing the entire vertical
picture of television signal.
TV-H: This setting is used when observing the entire
horizontal picture of television signal.
(Both TV-V & TV-H synchronize only when the
synchronizing signal is negative.)
Sweep time ranges are available in 20 steps from 0.2µs/DIV
to 0.5S/DIV.
26 TIME/DIV 30
X-Y: This position is used when using the instrument as an
X-Y oscilloscope.
Vernier control of sweep time. This control works as CAL
and the sweep time is calibrated to the value indicated by
TIME/DIV of sweep can be varied continuously when shaft
is out of CAL position. Then the control is rotated in the
27 SWAP.VAR 31
direction of arrow to the full, the CAL state is produced and
the sweep time is calibrated to the value indicated by
TIME/DIV. Counterclockwise rotation to the full delays the
sweep by 2.5 times or more.
28 ×10 MAG 32 When the button is pushed in, a magnification of 10 occurs.
29 POSITION 34 Horizontal positioning control of the trace or spot.
Rules to operate the CRO:
The following rules should be follows before operate the CRO.
1. Keep the following controls at middle position or vary until the electron beamis generated.
a) INTENSITY b) FOCUS c) (Horizontal position)
(Horizontal position common for both channels)
d) POSITION e) LEVEL (Trigger Level)
(Verticalposition individual per each channel)
2. Keep the following controls at maximum position.
a) VARIABLE controls of VOLTS/DIV switch in both channels.
b) SWP.VAR (Sweep Variation)
3. Keep the following switches at releasing mode.
a) ×10 MAG b) TRIG.ALT c) SLOPE d) ALT/CHOP e) CH2 INV

4. Initially should keep the TIME/DIV control at 1mS position, later can change this switch depending
upon our requirement , i.e. if we can’t get the signal clearly on the CRT, then we can vary this switch until
to get the signal.
5.Set the channel selector control MODE at the appropriate position i.e. if we want to see The signal in
channel1, set this control at CH1, in channel2 set at CH2, in both channels set at DUAL. To add the
signals (algebraically sum or difference) available in both channels set at ADD.
6. AC/GND/DC: Before setting the signals on CRT, first we should keep the electron beam on reference
line. To set this beam on reference line, keep this control at GND position and then vary vertical position
control until to get the beam on the reference line. After that to see the applied signals, keep this control at
AC or DC positions.
7. Always keep the TRIGGER MODE control at AUTO position.
8. Keep the SOURCE control at approximate channel. It means if MODE control is selected to CH1, then
the SORCE control should select to CH1. If MODE control at CH2, set the SOURCE control at CH2. If
MODE control at DUAL or ADD, set the SOURCE control either at CH1 or CH2.
Precautions to be taken to operate the CRO:
Always should maintain the Intensity/Brightness enough to visible electron beam. Otherwise either
the intensity is low or high then the life of the CRT can decreases.
NOTE:If the signal is in running movement, then should maintain the signal at constant by adjusting the
TRIGGER LEVEL control and by setting the SOURCE control at appropriate channel position.

2. FUNCTION GENERATOR :
Operational controls of the function generator :
The following table describes the working of the controls for Function Generator.
Sl.No. Name of the Control Description
1. Power ON & OFF By depressing this switch turns ON FG. To turn OFF push again and
switch release.
2. Function Selector Select decide output signal by pressing the appropriate switch on the front
panel which appears on the binding post on the front panel.
3. Frequency Range The frequency is selected by means of push button switches to select the
selector appropriate range as indicated on the front panel on the digital display.
4. Fine frequency control After selection of the frequency range selector by means of the position
switch on front panel by adjustment of the frequency can be done through
this potentiometer control.
5. Amplitude control By varying this control can get the required amplitude for the output
signal which appears at binding post.
6. Output binding post Signals selected by function switches as wells as the superimposed DC of
set voltages are available at this binding point.
7. Offset control It can controls the DC offset of the output.

8. TTL Jack A TTL square wave is available at this jack. The frequency is determined
by the range selected and this setting of the frequency. This output is
independent of the amplitude and DC offset controls.

Rules to be followed while operating the function generator( FG ):

The following rules should be followed while operating the Function generator,
1. Always should keep the DC Offset Control at OFF position, otherwise the clipping may Occurs in output
signal.

2. To get the amplitude of the signal in Volts, then take the output from the RED(Positive & BLACK terminals
of the binding post, it means by decreasing or keeping the gain at 0 or 20dB.

3. To get the amplitude of the signal in milli Volts, then take the output from the GREEN(Positive) & BLACK
(Negative) terminals of the binding post, it means by increasing or keeping the gain at 40 or 60 dB.
 APPENDIX – D ---- DATA SHEETS
PN JUNCTION DIODE :

Maximum Ratings and Electrical Characteristics (@TA = +25°C unless otherwise specified.) Single phase, half wave,

60Hz, resistive or inductive load.

For capacitive load, derate current by 20%.

Characteristic Symbol 1N4001 1N4002 1N4003 1N4004 1N4005 1N4006 1N4007 Unit
Peak Repetitive Reverse Voltage VRRM
Working Peak Reverse Voltage DC VRW 50 100 200 400 600 800 1000 V
Blocking Voltage M VR

RMS Reverse Voltage VR(RMS) 35 70 140 280 420 560 700 V

Average Rectified Output Current (Note 1) @ TA =+75C IO 1.0 A

Non-Repetitive Peak Forward Surge Current 8.3ms

Single Half Sine-Wave Superimposed on Rated Load IFSM 30 A

Forward Voltage @ IF = 1.0A VFM 1.0 V

Peak Reverse Current @TA = +25C 5.0

at Rated DC Blocking Voltage @ TA = +100C IRM 50 A

Typical Junction Capacitance (Note 2) Cj 15 8 pF

Typical Thermal Resistance Junction to Ambient RJA 100 K/W

Maximum DC Blocking Voltage Temperature TA +150 C

Operating and Storage Temperature Range TJ, TSTG -65 to +150 C

ZENER DIODE :
BJT:
UJT :
JFET :
BF245A, BF245B, BF245C N-CHANNEL SILICON FIELD-EFFECT TRANSISTOR
DATA SHEET OF MOSFET IRFZ 44N