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THE UNIVERSITY OF NEW SOUTH WALES

School of Electrical Engineering and Telecommunications
ELEC2133: Analogue Electronics
FINAL EXAMINATION
Term 2, 2022
Reading time: 10 minutes

Time allowed: 2.5 hours (including submission)

Total marks: 100

Total number of questions: 3

This exam contributes to 50% of the total assessment of this course

The exam contains three questions and has eight pages.

Part marks for all questions are indicated.

No marks will be given if workout solutions are not provided.

The candidates must attempt all the questions.

The candidates are allowed to use UNSW approved calculators.

Assumptions made in answering the questions must be stated explicitly.

All answers must be written in inks, except where they are expressly required to use pencil
for drawing, sketching, or graphical work.

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2
 ro = 250KΩ

Cgs = 4pF and Cgd = 0.2pF

VA = 200V

3
QUESTION 1 [25 marks]
Four amplifier circuits are shown in fig. 1(a)-(d). The amplifiers are biased by a current source
established by a MOSFET current mirror pair Q3 and Q4. Transistor aspect ratios (W/L) of the
MOSFETs are indicated in the figure. Details of small signal model parameters are given in the
information sheet on page 3.
5V
5V
3.3k
3.3k

Vo
Vo 8.8k C3 =20µF
8.8k C3 =20µF 1k
1k
Y
Y 0.1k C1 =10µF
0.1k C1 =10µF Q1
Q1
(W/L = 50) (W/L = 50)
X Vs X
Vs 1M 1M
0.2k
-1.6V -1.6V W
(W/L = 30) Q3 (W/L = 30) Q3
Q4 (W/L = 30) C4 (very large) Q4 (W/L = 30) C4 (very large)

-5V -5V

(a) (b)

5V
5V
3.3k
3.3k 10k
10k
C2 =20µF Z
Z Vo
C2 =20µF Vo 8.8k Q2 C3 =20µF
8.8k Q2 C3 =20µF 1k
1k 1.5k
1.5k
Y
Y 0.1k C1 =10µF
0.1k C1 =10µF Q1
Q1
(W/L = 50)
(W/L = 50)
X Vs X
Vs 1M 1M
0.2k
-1.6V -1.6V W
(W/L = 30) Q3 (W/L = 30) Q3
Q4 (W/L = 30) C4 (very large) Q4 (W/L = 30) C4 (very large)

-5V -5V

(c) (d)

Fig. 1: Amplifier Circuits

(a) Identify the configuration of each of the amplifiers in Fig. 1(a)-(d). [2 marks]
(b) Compare the amplifier circuits above in terms of gain, bandwidth, and output impedance, and
provide justification for your comparison without doing the calculations. [6 marks]
(c) Determine the current source established by the MOSFET current mirror in the amplifiers.
[3 marks]

In the followings, consider the amplifier in Fig. 1(d)

(d) Determine the DC biasing current in Q1 and Q2. [2 marks]

(e) Calculate the gm1 of Q1 and gm2, rπ2 of Q2. [3 marks]
(f) Calculate the DC voltages at nodes w, x, y and z (you may neglect the base current of Q2). Show
that transistor Q1 and Q2 are operating in the saturation and forward active regions,
respectively. [5 marks]

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(g) Comment on the possible values of resistors that may replace 3.3k and 0.2k to ensure that the
amplifier is biased appropriately. [ Note: for amplifier operation, all MOSFET transistors are
operating in the saturation regions while BJTs are operating in the forward active regions]
[4 marks]

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QUESTION 2 [25 marks]
(a) A Voltage Controlled Oscillator (VCO) based on an astable multivibrator circuit is shown in Fig.
2(b). The saturation voltages of the op-amp are +12V and 0V. The multivibrator consists of a
Schmitt trigger and an RC circuit. In the following, use R1=R2=6.8kΩ, R3=20kΩ, R= 7.5kΩ and
C=33nF.

Fig. 2(a): VCO astable multivibrator

(i) Draw the input vs output characteristic of the Schmitt trigger
[4 marks]
(ii) Determine the frequency of oscillation of the VCO as a function of V. [4 marks]

(iii) The multivibrator generates a square waveform. Modify the circuit to generate a triangular
waveform. [4 marks]

(b) The ladder type of Digital-to-Analogue converter (DAC) is shown in Fig. 2(b). The blocks labelled
Si represents a switch that connects to Vref when the bit ai=1 and ground when the bit ai=0. Calculate
the output voltage, Vo, assuming an 8-bit DAC and a binary word of (10010011), R2 = 100KΩ, R1
= 10KΩ, R = 10KΩ and Vref =6V.
[8 marks]

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 Fig. 2(b): Ladder type DAC

(c) Assume the op-amp used in the ladder type of Digital-to-Analogue converter (DAC) shown in
Fig. 2(b) has DC imperfections and shows offset error as a result.

(i) Find the expression for the offset voltage of the DAC in terms of R1, R2 and R. Assume the
input bias currents are IB+ and IB-, and the input offset voltage Vio. [3 marks]

(ii) Based on your expression in (i), what value of R would you choose to minimize the offset?
[2 marks]

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QUESTION 3 [50 marks]
The amplifier circuit in Fig. 1(d) is now modified with feedback as shown in Fig. 4(a). The output
of the amplifier is first applied to an inverting op-amplifier before it was fed back to the input. For
this question, assume that the inverting op-amp is ideal.
5V
100k
3.3k
10k V’o 10k
C2 =20µF Z -
8.8k Q2 C3 =20µF o Vo

1k +
1.5k
Y 10k
0.1k C1 =10µF Q1
C5 (very large)
(W/L = 50)
Vs X
1M
0.2k
-1.6V W
(W/L = 30) Q3
Q4 (W/L = 30) C4 (very large)

-5V
Fig. 4(a): Amplifier with feedback

(a) Identify the type of feedback topology employed in the amplifier.

[5 marks]

(b) Identify and determine the β of the feedback network. [5 marks]

(c) Draw the open loop amplifier circuit considering the loading effect of
the feedback networks. [6 marks]

(d) Calculate the mid-band open loop voltage gain of the amplifier.
[8 marks]
(e) Determine the closed-loop mid-band gain of the amplifier. [5 marks]

(f) Calculate the output resistance of the closed-loop amplifier at mid-

band. [6 marks]

(g) Calculate the fH and fL of the feedback amplifier.

[10 marks]

(h) What would have happened if the feedback amplifier were applied without the inverting amplifier
as in Fig. 4(b)? [5 marks]

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 5V
3.3k
10k
C2 =20µF Z
Vo
8.8k Q2 C3 =20µF
1.5k 1k

Y 10k
C1 =10µF Q1
(W/L = 50) C5(very large)
Vs X
1M
0.2k
-1.6V W
(W/L = 30) Q3
Q4 (W/L = 30) C4 (very large)

-5V

Fig. 4(b): Amplifier with feedback

END OF EXAMINATION