MICROCONTROLLERS

Microcontroller
• Until the development of Microcontrollers, almost all process
and control tasks were implemented using Microprocessors. As
Microprocessor need the additional peripherals to work as a
system, the overall cost of the control system was high.

• A Microcontroller is a VLSI IC that contains a CPU (Processor)

along with some other peripherals like Memory (RAM and
ROM), I/O Ports, Timers/Counters, Communication Interface,
ADC, etc.
 Microcontroller 8051 Architecture
• 8051 microcontroller is designed by Intel in 1981.
• It is an 8-bit microcontroller. It is built with 40 pins DIP (dual
inline package), 4kb of ROM storage and 128 bytes of RAM
storage, and two 16-bit timers.
• It consists of are four parallel 8-bit ports, which are
programmable as well as addressable as per the requirement.
• An on-chip crystal oscillator is integrated in the microcontroller
having crystal frequency of 12 MHz.
 Microcontroller 8051 Architecture
 CPU (Central Processing Unit):
• CPU act as a mind of any processing machine. It synchronizes
and manages all processes that are carried out in microcontroller.
User has no power to control the functioning of CPU.

• It interprets the program stored in ROM and carries out from

storage and then performs it projected duty. CPU manage the
different types of registers available in 8051 microcontroller.

 Interrupts
• Interrupts is a sub-routine call that given by the microcontroller
when some other program with high priority is request for
acquiring the system buses then interrupts occur in current
running program.

• Interrupts provide a method to postpone or delay the current

process, performs a sub-routine task and then restart the standard
program again.
 Microcontroller 8051 Architecture
 Memory
• For operation Micro-controller required a program. This program
guides the microcontroller to perform the specific tasks. This
program installed in microcontroller required some on chip
memory for the storage of the program.

• Microcontroller also required memory for storage of data and

operands for the short duration. In microcontroller 8051 there is
code or program memory of 4 KB that is it has 4 KB ROM and it
also comprise of data memory (RAM) of 128 bytes.

 Bus
• Bus is a group of wires which uses as a communication canal or
acts as means of data transfer. The different bus configuration
includes 8, 16 or more cables. Therefore, a bus can bear 8 bits, 16
bits all together.
 Microcontroller 8051 Architecture
 Types of buses in 8051 Microcontroller:
Let's see the two types of bus used in 8051 microcontroller:

• Address Bus: 8051 microcontrollers is consisting of 16 bit

address bus. It is generally be used for transferring the data from
Central Processing Unit to Memory.

 Data bus: 8051 microcontroller is consisting of 8 bits data bus. It

is generally be used for transferring the data from one peripherals
position to other peripherals.
 Oscillator
• As the microcontroller is digital circuit therefore it needs timer
for their operation. To perform timer operation inside
microcontroller it required externally connected or on-chip
oscillator.

• Microcontroller is used inside an embedded system for managing

the function of devices. Therefore, 8051 uses the two 16 bit
counters and timers. For the operation of this timers and counters
the oscillator is used inside microcontroller.
 8051 Register set
 Accumulator:
• 8051 contains 34 general purpose registers, two of these
registers are Accumulator and B register.
• They hold result of many instructions, particularly math
and logical operations of 8051 CPU
• The accumulator is most versatile of the two CPU
registers and used in many operations including addition,
subtraction, integer multiplication and division, and
Boolean bit manipulations.
• It is also used for all data transfers between the 8051 and
any external memory. (E0 to E7 H bit addressable).

 B register:
• The B register is used during multiply and divide
operations. For other instructions it can be treated as
another scratch pad register. (F0 to F7H bit address)
 8051 Register set
 Program Counter (PC):

• The 8051 contains a 16 bit program counter which holds

the address of a byte in memory.
• Program instruction bytes are fetched from locations in
memory that are addressed by PC.
• The program ROM may be on the chip at addresses
0000H to 0FFFH, external to the chip for addresses that
exceed 0FFFH.
• The PC is automatically incremented after every
instruction byte is fetched and may also be altered by
certain instructions.
 8051 Register set
 Data Pointer (DPTR):

• The DPTR registers are made of two 8 bit registers named

DPH and DPL which are used to furnish memory
addresses for internal and external code access.

• The DPTR is under the control of program instructions

and can be specified by its 16 bit name, DPTR, or by each
individual byte as DPH and DPL.

• DPTR does not have a single internal address. DPH (83H)

and DPL(82H) are each assigned with a address.
 8051 Register set
 PSW (PROGRAM STATUS WORD)
This is an 8-BIT register. The Program Status Word (PSW) contains status
bits that reflect the current CPU state.

 SP (STACK POINTER)
Stack pointer is an 8 bit register
It is only byte addressable, which means you cant access individual bits of
stack pointer.
The content of the stack pointer points to the last stored location of
system stack. To store something new in system stack, the SP must be
incremented by 1 first and then execute the “store” command
Push increments the SP and writes data.
POP reads data and then decrements the SP.
Stack is kept in the internal RAM and is restricted to 128 bytes.
Top most address of stack is 7F
 8051 Register set

 Interrupt registers

• Priority of the interrupts can be assigned using Interrupt

Priority Register (IPR).

• Interrupt Enable register (IE) is used to enable/disable

interrupt sources.
 Timer Registers
TCON (Timer Control register)

TF0/TF1 – Timer overflow

TR0/TR1 – Timer run
IT0/IT1 – Internal interrupts
IE0/IE1 – External interrupts

TMOD (Timer Mode register)

Lower four bits timer0,upper four bits timer1

C/T is set timer will count events, if
clear timer incremented for every
machine cycle
Gate is set timer will only run when
INT0/INT1 is high, if clear timer will
run regardless of INT0/INT1
 Serial registers
SCON (Serial Control)

SM0, SM1 and SM2 are used to specify the serial connection mode
there are five different modes four are
shown in the table. The fifth one is
when we make SM2=1 which is 8-bit
transfer mode. The most common
mode is mode 1

REN is set receive enable then 8051 to receive and transfer data, if clear means
receive is disabled
TB8 and RB8 is used for serial modes 2 & 3
TI transmit interrupt flag
RI receive interrupt flag
SBUFF (Serial Buffer)
SBUFF is used when we are transmitting or receiving data serially.
It contains the data which is transmitted .
It is not bit addressable
 PCON(Power Control Register)
PCON is an 8-bit register used to control the baud rate during serial
communication

SMOD-Setup double baud rate when serial port is used in modes 1,2 &3
GF1 - General purpose flag bit.
GF0 - General purpose flag bit.
PD - Power down. Activates power down operation.
IDL - Ideal mode. Activates ideal mode operation.( IDL mode is terminated
on interrupt or system reset.)
— Reserved
 We can access 8051 ports and all other registers using SFRs. They are
actually the register locations which are dedicated for each individual port
or register etc
• 8Ch is SFR for TH0 register
• 8Ah is SFR for TL0 register
• 8Dh is SFR for TH1 register
• 8Bh is SFR for TL1 register
• 88h is SFR for TCON register
• 89h is SFR for TMOD register
• 98h is SFR for SCON register
• 99h is SFR for SBUF register
• 80h is SFR for P0 (Port 0 of 8051)
• 90h is SFR for P1 (port 1 of 8051
• A0h is SFR for P2 (port 2 of 8051)
• B0h is SFR for P3 (port 3 of 8051)
• E0h is SFR for ACC (Accumulator register)
• D0h is SFR for PSW (Program status word)
• 81h is SFR for SP (Stack pointer)
• F0h is SFR for B (Extension register)
 8051 Memory Organization
• The internal data memory of 8051 is divided into two
groups. These are a set of eight registers and a scratch pad
memory.
• These eight registers are R0 to R7. The address range 00H
to 07H is used to access the registers, and the rest are
scratch pad memory.
• 8051 Provides four register bank, but only one register
bank can be used at any point in time. To select the
register bank, two bits of PSW (Program Status Word) are
used.
 8051 Memory Organization
• The following addressing can be used to select register
banks

• The concept of four register banks is very useful. For

servicing the interrupts, this feature is very good.
• The interrupt program can use one bank, and the interrupt
Service Subroutine (ISS) can access another bank for
better performance. As there are four banks, so for nested
interrupts these can be used
 8051 Memory Organization
• When all of the register banks are being used, the scratch
pad area will be 20H to 7FH. But from 20H to 2FH (16
bytes or 128 bits) can be used as bit addressable RAM.
 8051 Parallel I/O ports
• 8051 microcontrollers have 4 I/O ports each of 8-bit,
which can be configured as input or output. Hence, total
32 input/output pins allow the microcontroller to be
connected with the peripheral devices.

• Port 0 − The P0 (zero) port is characterized by two

functions −
– When the external memory is used then the lower address byte
(addresses A0-A7) is applied on it, else all bits of this port are
configured as input/output.

– When P0 port is configured as an output then other ports

consisting of pins with built-in pull-up resistor connected by its
end to 5V power supply, the pins of this port have this resistor
left out.
 8051 Parallel I/O ports
• Port 1
– P1 is a true I/O port as it doesn’t have any alternative functions as
in P0, but this port can be configured as general I/O only. It has a
built-in pull-up resistor and is completely compatible with TTL
circuits.

• Port 2
– P2 is similar to P0 when the external memory is used. Pins of this
port occupy addresses intended for the external memory chip.
This port can be used for higher address byte with addresses A8-
A15. When no memory is added then this port can be used as a
general input/output port similar to Port 1.

• Port 3
– In this port, functions are similar to other ports except that the
logic 1 must be applied to appropriate bit of the P3 register.
 8051 Interrupts
• Interrupts are the events that temporarily suspend the main
program, pass the control to the external sources and
execute their task. It then passes the control to the main
program where it had left off.

• 8051 has 5 interrupt signals, i.e. INT0, TFO, INT1, TF1, RI/TI
out of which two are internal (Timer Interrupts), two are
external and one is a serial interrupt. Each of these interrupts
has their interrupt vector address. Highest priority interrupt is
the Reset, with vector address 0x0000.
 8051 Interrupts
• Internal interrupt (Timer Interrupt)
– 8051 has two internal interrupts namely timer0 and timer1.
Whenever timer overflows, timer overflow flags (TF0/TF1)
are set. Then the microcontroller jumps to their vector
address to serve the interrupt. For this, global and timer
interrupt should be enabled.
• Serial interrupt
– 8051 has serial communication port and have related serial
interrupt flags (TI/RI). When the last bit (stop bit) of a byte
is transmitted, TI serial interrupt flag is set and when last bit
(stop bit) of receiving data byte is received, RI flag get set.
• External interrupts
– 8051 has two external interrupts INT0 and INT1 (IE0 &
IE1). 8051 can be interrupted by external interrupt by
providing level or edge on external interrupt pins PORT3.2
and PORT3.3.
 Addressing Modes of 8051
• In 8051 there are 1-byte, 2-byte instructions and very few
3-byte instructions are present. The opcodes are 8-bit long.

• The clock frequency is12MHz, so 64 instruction types are

executed in just 1 µs, and rest are just 2 µs. The
Multiplication and Division operations take 4µs to to
execute.

• In 8051 There are six types of addressing modes.

1. Immediate Addressing Mode

2. Register Addressing Mode
3. Direct Addressing Mode
4. Register Indirect Addressing Mode
5. Indexed Addressing Mode
6. Implied Addressing Mode
 Addressing Modes of 8051
• Immediate addressing mode
– In this Immediate Addressing Mode, the data is provided in the
instruction itself. The data is provided immediately after the
opcode.
– MOV A, #56H in these instruction # symbol is used for
immediate data.

• Register addressing mode

– In the register addressing mode the source or destination data
should be present in a register (R0 to R7)
– Ex. MOV A, R5

• Direct addressing mode

– This is another way of addressing an operand. Here the
address of the data (source data ) is given as operand.
– Ex. MOV A, 04H
– Here 04H is the address of register 4 of register bank#0. When
this instruction is executed, what ever data is stored in register
04H is moved to accumulator.
 Addressing Modes of 8051
• Register indirect addressing mode
– In this addressing mode, address of the data (source data to
transfer) is given in the register operand.
– Ex. MOV A, @R0
– Here the value inside R0 is considered as an address, which
holds the data to be transferred to accumulator.

• Indexed addressing mode

– In the indexed addressing mode, the source memory can only
be accessed from program memory only. The destination
operand is always the register A.
– Ex. MOVC A, @A+DPTR MOVC A, @A+PC
– where DPTR is data pointer and PC is program counter (both
are 16 bit registers). let us consider A holds 30H. And the PC
value is1125H. The contents of program memory location
1155H (30H + 1125H) are moved to register A.
 Addressing Modes of 8051

• Implied addressing mode

– In the implied addressing mode, there will be a single
operand. These types of instruction can work on specific
registers only.
– These types of instructions are also known as register specific
instruction.
– Ex. RLA
– Ex. SWAPA
– These are 1- byte instruction. The first one is used to rotate
the A register content to the Left. The second one is used to
swap the nibbles in A
 Assembler directives
Assembler directives are the statements that direct the
assembler to do something
ORG (originate)
The origin (ORG) directive is used to indicate the beginning of
the addresses
ORG 0000H
DB (Define byte)
The DB directive is the most widely used data directive in the
assembler it is used to define the 8-bit data
DB 28 decimal
DB 01101101B binary
DB “2” ASCII
DB 10H hexa
 Assembler directives

EQU (equate)
This is used to define a constant without occupying a memory
location
COUNT EQU 25
END placed at the end
DS data segment
PUBLIC declares the variables defined in specific that can be
used in the other source files
EXTERN declares the variable that are used in the present file
but are defined in some other source file
 Instruction Set of 8051

Arithmetic Instructions
Branch Instructions
Data Transfer Instructions
Logic Instructions
Bit-oriented Instructions

ARITHMETIC INSTRUCTIONS
ADD A,Rn Adds the register to the accumulator
ADD A,@Ri Adds the indirect RAM to the accumulator
ADD A,#dataAdds the immediate data to the accumulator
ADDC A,Rn Adds the register to the accumulator with a carry flag
ADDC A,@RiAdds the indirect RAM to the accumulator with a carry
flag
ADDC A,#dataAdds the immediate data to the accumulator with a
carry flag
 Instruction Set of 8051
SUBB A,Rn Subtracts the register from the accumulator with a
borrow
SUBB A,@Ri
SUBB A,#data
INC A Increments the accumulator by 1
INC Rn
INC Rx
INC @Ri Increments the indirect RAM by 1
DEC A
DEC Rn
DEC Rx
DEC @Ri Decrements the indirect RAM by 1
INC DPTR Increments the Data Pointer by 1
MUL AB Multiplies A and B
DIV AB Divides A by B
DA A Decimal adjustment of the accumulator according
to BCD code
 Instruction Set of 8051
BRANCH INSTRUCTIONS
ACALL addr11 Absolute subroutine call
LCALL addr16 Long subroutine call
RET Returns from subroutine
RETI Returns from interrupt subroutine
AJMP addr11 Absolute jump
LJMP addr16 Long jump
SJMP rel Short jump (from –128 to +127 locations
relative to the following instruction)
JC rel Jump if carry flag is set. Short jump.
JNC rel Jump if carry flag is not set. Short jump.
JB bit,rel Jump if direct bit is set. Short jump.
 Instruction Set of 8051
JBC bit,rel Jump if direct bit is set and clears bit. Short jump.
JMP @A+DPTRJump indirect relative to the DPTR
JZ rel Jump if the accumulator is zero. Short
jump.
JNZ rel Jump if the accumulator is not zero. Short jump.
CJNE A,#data,rel Compares immediate data to the
accumulator and jumps if not equal. Short jump.
CJNE Rn,#data,rel
CJNE @Ri,#data,rel
DJNZ Rn,rel Decrements register and jumps if not 0.
Short jump.
DJNZ Rx,rel Decrements direct byte and jump if not 0.
Short jump.
NOP No operation
 Instruction Set of 8051
DATA TRANSFER INSTRUCTIONS
MOV A,Rn
MOV A,@Ri
MOV A,#data
MOV Rn,A
MOV @Ri,A
MOV @Ri,#data
MOV DPTR,#data
MOVX @DPTR,A
MOVC A,@A+DPTR
MOVC A,@A+PC
MOVX A,@Ri
MOVX A,@DPTR
PUSH direct Pushes the direct byte onto the stack
POP direct Pops the direct byte from the stack
XCH A,Rn Exchanges the register with the accumulator
XCH A,direct Exchanges the direct byte with the accumulator
XCH A,@Ri Exchanges the indirect RAM with the accumulator
RETI Returns from interrupt subroutine
 Instruction Set of 8051
LOGIC INSTRUCTIONS

ANL A,Rn AND register to accumulator

ANL A,direct AND direct byte to accumulator
ANL A,@Ri AND indirect RAM to accumulator
ANL A,#data AND immediate data to accumulator
ANL direct,A AND accumulator to direct byte
ANL direct,#data AND immediate data to direct register
ORL A,Rn OR register to accumulator
ORL A,direct OR direct byte to accumulator
ORL A,@Ri OR indirect RAM to accumulator
ORL direct,A OR accumulator to direct byte
ORL direct,#data OR immediate data to direct byte
XRL A,Rn Exclusive OR register to accumulator
XRL A,direct Exclusive OR direct byte to accumulator
XRL A,@Ri Exclusive OR indirect RAM to accumulator
XRL A,#data Exclusive OR immediate data to accumulator
XRL direct,A Exclusive OR accumulator to direct byte
XORL direct,#data Exclusive OR immediate data to direct byte
 Instruction Set of 8051
CLR A Clears the accumulator
CPL A Complements the accumulator (1=0, 0=1)
SWAP A Swaps nibbles within the accumulator
RL A Rotates bits in the accumulator left
RLC A Rotates bits in the accumulator left through carry
RR ARotates bits in the accumulator right
RRC A Rotates bits in the accumulator right through carry

BIT-ORIENTED INSTRUCTIONS

CLR C Clears the carry flag

CLR bit Clears the direct bit
SETB C Sets the carry flag
SETB bit Sets the direct bit
CPL C Complements the carry flag
CPL bit Complements the direct bit
ANL C,bit AND direct bit to the carry flag
ANL C,/bit AND complements of direct bit to the carry flag
 Instruction Set of 8051
ORL C,bit OR direct bit to the carry flag
ORL C,/bit OR complements of direct bit to the carry flag
MOV C,bit Moves the direct bit to the carry flag
MOV bit,C Moves the carry flag to the direct bit
 Assembly Language programming
to Add two 8 Bit numbers
MOV R0,#20H ;set source address 20H to R0
MOV R1,#30H ;set destination address 30H to R1
MOV A,@R0 ; take the value from source to register A
MOV R5,A ; Move the value from A to R5
MOV R4,#00H ;Clear register R4 to store carry
INC R0 ; Point to the next location
MOV A,@R0 ;take the value from source to register A
ADD A,R5 ;Add R5 with A and store to register A
JNC SAVE
INC R4 ;Increment R4 to get carry
MOV B,R4 ;Get carry to register B
MOV @R1,B ;Store the carry first
INC R1 ;Increase R1 to point to the next address
SAVE:
MOV @R1,A ;Store the result
END ;Stop the program