8051 Microcontroller Block Diagram Architecture:

8051 microcontroller is designed by Intel in 1981. It is an 8-bit microcontroller. It

is built with 40 pins DIP (dual inline package), 4kb of ROM storage and 128 bytes
of RAM storage, 2 16-bit timers. It consists of four parallel 8-bit ports, which are
programmable as well as addressable as per the requirement. An on-chip crystal
oscillator is integrated in the microcontroller having crystal frequency of 12 MHz.

In the following diagram, the system bus connects all the support devices to the
CPU. The system bus consists of an 8-bit data bus, a 16-bit address bus and bus
control signals. All other devices like program memory, ports, data memory,
serial interface, interrupt control, timers, and the CPU are all interfaced together
through the system bus.
 Pins 1 to 8 − These pins are known as Port 1. This port doesnt serve any
other functions. It is internally pulled up, bi-directional I/O port.
 Pin 9 − It is a RESET pin, which is used to reset the microcontroller to its
initial values.
 Pins 10 to 17 − These pins are known as Port 3. This port serves some
functions like interrupts, timer input, control signals, serial communication
signals RxD and TxD, etc.
 Pins 18 & 19 − These pins are used for interfacing an external crystal to
get the system clock.
 Pin 20 − This pin provides the Ground to the circuit.
 Pins 21 to 28 − These pins are known as Port 2. It serves as I/O port.
Higher order address bus signals are also multiplexed using this port.
 Pin 29 − This is PSEN pin which stands for Program Store Enable. It is
used to read a signal from the external program memory.
 Pin 30 − This is EA pin which stands for External Access input. It is used
to enable/disable the external memory interfacing.
 Pin 31 − This is ALE pin which stands for Address Latch Enable. It is used
to demultiplex the address-data signal of port.
 Pins 32 to 39 − These pins are known as Port 0. It serves as I/O port.
Lower order address and data bus signals are multiplexed using this port.
 Pin 40 − This pin is used to provide power supply to the circuit.

8051 Microcontroller Block Diagram Architecture

Description of 8051 Microcontroller Architecture:

Oscillator and Clock:
Necessity of clock for microcontroller:

Clock pulses are required to synchronize the internal operation

of the microcontroller, these clock pulses are generated by the resonant
circuitry. Pins XTAL1 and XTAL2 are provided for connecting a resonant
network to form an oscillator. Typically a quartz crystal and capacitors are
employed, as shown below. The crystal frequency is the basic internal
clock frequency for the micro-controller.
Accumulator (Register A*): Address-E0H
It is an 8-bit register used for many operations
including addition, subtraction, multiplication, division,
and Boolean bit manipulations. This is also used for all
data transfers between 8051 and any external memory. It
can also be used as a general purpose register. The results
obtained from arithmetic and logical instructions are
always stored in Accumulator.
Register B*: Address-F0H
It is an 8-bit register specially used for direct
multiplication and division operation with Accumulator.
Both A and B registers are called math registers in 8051
family. It can also be used as a general-purpose storage
location with its direct address (F0H).
Data pointer (DPTR): Direct Address: Nil
It is a 16-bit register used to hold the address of
internal or external data as well as code memory. This is
the only register used to access data from 16-bit external
memory. It is under the control of programmer and can be
specified by 16-bit name. It can be used as two 8-bit
registers namely DPH (Data Pointers High) and DPL (Data
Pointer Low). DPTR does not have direct address (No
address is assigned for DPTR), but DPH and DPL are
assigned with addresses 83h and 82h respectively.
Program Status Word (PSW)*: Address-D0H
It is an 8-bit register having 5 flags including 4 math
flags and one general purpose user flag. Each flag
corresponds to a bit in status register. The bit positions
are shown in PSW table. It has two additional bits RS0 and
RS1 for register bank selection, which can be modified by
the user. The math flags are set or reset by the results of
arithmetic or logic operations.
The user flag can be set or reset by the programmer as
desired.
Program Status Word Register
Bit Flag Description
7 CY Carry flag; used in arithmetic, jump, rotate and Boolean instructions.
6 AC Auxiliary carry; used for BCD arithmetic
5 F0 User defined flag 0
4 RS1 Register bank select bit-1
3 RS0 Register bank select bit-0
7 6 5 4 3 2 1 0
CY AC F0 RS1 RS0 OV – P
D7 D6 D5 D4 D3 D2 D1 D0
Bank Select

RS1 RS0 Bank Select

0 0 Bank – 0
0 1 Bank – 1
1 0 Bank – 2
1 1 Bank – 3
2 OV Overflow flag; used in arithmetic instructions
1 – Reserved for future use
0 P Parity flag; shows parity of register A; 1=odd parity
Special Function Registers (SFR’s):
SFR’s are a group of registers used for specific
purposes in 8051 controller, mainly to configure, control
and operate. Each SFR is an 8-bit register, which uses
address locations from 80H to FFH, just above the scratch
pad area in the internal RAM. All SFR’s are discussed in
the next chapters.
SFR Description Address
A* Accumulator E0
 B* B Register F0
PC Program Counter ––
DPTR:
DPH Data Pointer Higher Byte 83
DPL Data Pointer Lower Byte 82
SP Stack Pointer 81
PSW* Program Status Word D0
P0* Port 0 80
P1* Port 1 90
P2* Port 2 A0
P3* Port 3 B0
TH0 Timer 0 Higher Byte 8C
TL0 Timer 0 Lower Byte 8A
TH1 Timer 1 Higher Byte 8D
TL1 Timer 1 Lower Byte 8B
TCON* Timer Control 88
TMOD Timer Mode Control 89
SBUF Serial Data Buffer 99
SCON* Serial Port Control 98
PCON Power Mode Control 87
IE* Interrupt Enable A8
IP* Interrupt Priority B8

The internal data memory of 8051 is divided into two groups. These are a set of eight registers
and a scratch pad memory. These eight registers are R0 toR7. The address range 00H to 07H is
used to access the registers, and the rest are scratch pad memory.
8051 Provides four register bank, but only one register bank can be used at any point in time. To
select the register bank, two bits of PSW (Program Status Word) are used.

Address Range Register Bank

00H to 07H Register Bank 0

08H to 0FH Register Bank 1

10H to 17H Register Bank 2

18H to 1FH Register Bank 3

The concept of four register banks is very useful. For servicing the interrupts, this feature is very
good. The interrupt program can use one bank, and the interrupt Service Subroutine (ISS) can
access another bank for better performance. As there are four banks, so for nested interrupts these
can be used

When all of the register banks are being used, the scratch pad area will be 20H to 7FH. But from
20H to 2FH (16 bytes or 128 bits) can be used as bit addressable RAM. By using some simple
instructions with 8-bit memory address we can check the bit addressing. For an example the
instruction CLR 6FH, using this instruction it clears the location 6FH. As we know the8-bit
address can locate 256 different locations, but here only128-bits are addressable. Another section
of bit addressable locations is 80H to FFH. The remaining locations (30H to 7EH) of the RAM
can be used to store variable data and stack.