FACULTY OF TECHNOLOGY

UNIVERSITY OF DELHI
NEW DELHI – 110007
(2024 – 2025)

COMPUTER SYSTEM ARCHITECTURE

PRACTICAL FILE

Name –> PRIYANSHI MEENA

Roll No. -> 23293916108

Class -> CSE- B

Semester –> 4

Submitted To:

Dr. Deepika
Mam
1
 PRACTICAL 1
Aim:
To develop an assembly language program for addition of two 8-bit numbers using direct addressing in 8085
Simulator.

Theory:
The Intel 8085 microprocessor is an 8-bit microprocessor that allows programmers to write and execute
assembly language programs for performing various operations. The 8085 Simulator replicates this
functionality, providing an environment to work with registers, memory locations, and instruction execution.
In direct addressing mode, the instruction contains the actual memory address of the operand, allowing direct
access to data without needing intermediate memory operations. This makes the process more efficient since
the CPU can fetch or store data directly from/to the specified address.
Execution Steps:

• Load the first number into the accumulator.

• Load the second number into register B.
• Perform the addition operation between the values in the accumulator and register B.
• Store the computed sum at memory address 9005H.
• Terminate the execution of the program.

Assembly Language Instructions:

MVI A, 10H: Load the hexadecimal number 10H to accumulator.

MVI B, 20H: Load the hexadecimal number 20H to register B.

ADD B: Add the value in register B to the value in the accumulator.

STA 9005H: Store the result at memory location 9005H.

HLT: Stop the program execution.

Program:

Memory Address Mnemonics Hex Code

8000 MVI A,10H 3E
8001 10
8002 MVI B,20H 06
8003 20
8004 ADD B 80
8005 STA 9005H 32
8006 05
8007 90
8008 HLT 76

2
RESULTS:

1.1 : Addition of two 8-bit numbers is successful.

1.2 : Hexadecimal number 10H is stored at memory address 8001H.

3
1.3 : Hexadecimal number 20H is stored at memory address 8003H.

1.4 : Sum of two 8-bit numbers is stored at memory address G005H.

4
 PRACTICAL 2
Objective:

To develop an assembly language program to perform the addition of two 8-bit numbers using indirect
addressing mode in the 8085 Simulator.

Concept:

In indirect addressing mode, instead of directly specifying the memory address of the operand, the
instruction points to a register or memory location that contains the actual address of the data. This
method requires two memory accesses—one to fetch the address and another to retrieve the data stored
at that location.

Types of Indirect Addressing:

• Register Indirect Addressing: The operand address is stored in a register pair (such as HL).

• Memory Indirect Addressing: The operand address is stored in a memory location.

Execution Steps:

1. Store the first 8-bit number D4H at memory address 8050H.

2. Store the second 8-bit number 3AH at memory address 8051H.

3. Load the memory address 8050H into the HL register pair using LXI H.

4. Move the value stored at the memory location (pointed by HL) into the accumulator using MOV A,
M.

5. Increment the HL register pair to point to the next memory address (8051H) using INX H.

6. Add the value stored at the new memory location to the accumulator using ADD M.

7. Store the sum in memory location 8060H using STA.

8. Add the content of Register B to the accumulator using ADD B.

9. Stop program execution using HLT.

Assembly Language Instructions:

• LXI H, 8050H → Load HL register pair with address 8050H.

• MOV A, M → Move the value at memory location (HL) into the accumulator.

• INX H → Increment HL to point to the next memory location (8051H).

• ADD M → Add the value at memory location (HL) to the accumulator.

• STA 8060H → Store the result at memory address 8060H.

• ADD B → Add the content of register B to the accumulator.

• HLT → Halt program execution.

5
Program Code:

Memory Address Mnemonics Hex Codes

8000 LXI H 21
8001 50
8002 80
8003 MOV A, M 7E
8004 INX H 23
8005 ADD M 86
8006 STA 32
8007 60
8008 ADD B 80
8009 HLT 76

RESULTS:

2.1 : Program successfully execute

6
2.2 : First number i.e. F2H is stored at memory address 8050H.

2.3: Second number i.e. 6EH is stored at memory address 8051H.

7
 PRACTICAL 3
Aim:
To perform subtraction while handling carry and no-carry cases in 8085 Simulator.
Theory:
This program performs subtraction between two values stored in memory locations 9050H and 9051H.

• It first initializes register C to zero and loads the value at 9050H into register B.
• It loads the value at 9051H into the accumulator and subtracts register B from it.
• If there is no carry (indicating the result is non-negative), the program jumps to address 9010H.
• If the subtraction results in a negative value, the accumulator’s complement is taken, and it is
incremented to obtain the two’s complement (absolute value).
• The register C is also incremented, likely serving as a counter.
• Finally, the program halts execution with the HLT instruction.

Instructions:

• MVI C, 0E: Loads immediate value 0E (14 in decimal) into register C.

• 00: No operation; filler byte.
• LDA G050H: Loads the content from memory address 9050H into the accumulator (A).
• MOV B, A: Moves the value in accumulator (A) to register B.
• LDA G051H: Loads the content from memory address 9051H into the accumulator (A).
• SUB B: Subtracts the value in register B from the accumulator (A).
• JNC D2: Jumps to label D2 if no carry occurs after subtraction.
• CMA: Complements (inverts) the contents of the accumulator (A).
• INR A: Increments the value in the accumulator (A) by 1.
• INR C: Increments register C by 1.
• STA G052: Stores the value in the accumulator (A) to memory address 9052H.
• MOV A, C: Moves the value in register C to the accumulator (A).
• STA G053: Stores the value in the accumulator (A) to memory address 9053H.
• HLT: Halts the program.

Program:
Memory Address Command Op Code
G000 MVI C 0E
G001 00
G002 LDA 9050H 3A
G003 50
G004 90
G005 MOV B, A 47
G006 LDA 9051H 3A
G007 51
G008 90
G00G SUB B 90
G00A JNC D2
G00B 10
8
 G00C 90
G00D CMA 2F
G00E INR A 3C
G00F INR C 0C
G010(LOOP) STA 9052 32
G011 52
G012 90
G013 MOV A, C 79
G014 STA 9053 32
G015 53
G016 90
G017 HLT 76

RESULTS:

3.2: Difference is 60.

9
 PRACTICAL 4
Aim:
To perform multiplication using repetitive addition in 8085 Simulator.
Theory:
This program multiplies two 8-bit numbers stored at memory locations 8150H and 8151H using repeated
addition. Since multiplication is essentially repeated addition, the program adds the multiplicand (stored
in register B) to the accumulator (A) as many times as the multiplier (stored in register C) specifies. The
result, which can be up to 16 bits, is stored at 8060H (lower byte) and 8061H (higher byte).
Instructions:
MVI D, 00 → Initialize register D to 00H (used to store the higher byte of the result).

MVI A, 00 → Initialize register A to 00H (accumulator, where the result is stored).

LXI H, 8150 → Load register pair HL with memory address 8150H (starting address of operands).
MOV B, M → Move the value at memory location 8150H to register B (multiplicand).

INX H → Increment HL to point to 8151H (next memory location).

MOV C, M → Move the value at memory location 8151H to register C (multiplier).

ADD B → Add the value in B to accumulator A (perform repeated addition).

JNC NEXT → Jump to NEXT if no carry (check if addition overflows beyond 8 bits).
INR D → If carry occurs, increment register D (to store the higher byte of result).

NEXT: DCR C → Decrement C (loop counter – represents the number of times B is added).
JNZ LOOP → Jump to LOOP if C ≠ 0, continuing repeated addition.
STA 8152 → Store the lower byte of the result (A) at memory location 8152H.
MOV A, D → Move the higher byte of the result (D) into accumulator A.
STA 8153 → Store the higher byte of the result (D) at memory location 8153H.
HLT → Halt execution

Program:

10
11
4.2 : First hexadecimal number is stored at memory address 8050.

4.3 : Second hexadecimal number is stored at 8051.

4.4 : Output is stored at memory address 8060.

12
 PRACTICAL 5
Aim:
To perform division operation for two numbers in 8085 Simulator.
Theory:
Division in 8085 simulator can be implemented through repeated subtraction, where the divisor is
continuously subtracted from the dividend until the result becomes less than the divisor.
The number of successful subtractions gives the quotient, and the final remainder is stored separately.
Memory Organization:

• Dividend stored at memory location 8051

• Divisor stored at memory location 8050
• Remainder stored at memory location 8060
• Quotient stored at memory location 8061
Instructions:
LXI H, 8050 ; Load address 8050 into HL pair
LXI H, 8050 ; Load address 8050 into HL pair
INX H ; Increment HL pair (now points to 8051)

MOV A, M ; Move content of memory (8051) to accumulator

MVI C, 00 ; Move immediate 00 to register C
CMP B: Compare B with accumulator
JC 8011: Jump if carry to address 8011
SUB B: Subtract B from accumulator
INR C: Increment register C
JMP 8008: Jump to address 8008

STA 8060: Store accumulator content at 8060

MOV A, C: Move content of register C to Accumulator
STA 8061: Store accumulator content at 8061
HLT: Halt

Program:

Memory Address Mnemonics Op Code

8000 LXI H,8050 21
8001 50
8002 80
8003 MOV B,M 46
8004 INX H 23
8005 MOV A,M 7E
8006 C,00 0E

13
 8007 00
8008(LOOP) CMP B B8
800G JC NEXT DA
800A 11
800B 80
800C SUB B 90
800D INR C 0C
800E JMP LOOP C3
800F 08
8010 80
8011(NEXT) STA 8060 32
8012 60
8013 80
8014 MOV A,C 79
8015 STA 8061 32
8016 61
8017 80
8018 HLT 76

RESULTS:

5.1 : Program successfully executed

14
5.2 : Remainder is 01 stored at memory address 8060

5.3 : Quotient is 07 stored at memory address 8061.

15
 PRACTICAL 6
Aim:
To count the number of 1s and 0s stored at memory location in 8085 Simulator.
Theory:
This program counts the 0s and 1s in a byte stored at memory location 8050H. It uses the Rotate Right
through Carry (RRC) instruction to examine each bit, incrementing separate counters in registers C and D.
After eight rotations (controlled by register B), the program stores the final counts at memory locations
8060H and 8061H.

The program demonstrates fundamental concepts in low-level programming:

• Bit manipulation through rotation

• Use of the carry flag for conditional branching
• Loop construction with counter and conditional jumps
• Efficient register usage.

Instructions:
LDA H,8050: Load the contents of memory location 8050H into accumulator

MVI B,08H: Move immediate value 08H (8 in decimal) to register B (acts as counter)

MVI C,00H: Initialize register C to 00H (will count number of 0s)

MVI D,00H: Initialize register D to 00H (will count number of 1s)

LOOP: RRC → Rotate accumulator right through carry

JNC ZERO: If carry flag is 0, jump to ZERO

JC ONE: If carry flag is 1, jump to ONE

ZERO: INR C→ Increment register C (counting 0s)

JMP END: Jump to END

ONE: INR D→ Increment register D (counting 1s)

JMP END: Jump to END

END: DCR B→ Decrement counter in register B

JNZ LOOP: If B is not zero, jump back to LOOP

MOV A,C: Move count of 0s from register C to accumulator

STA 9005: Store count of 0s at memory location 9005H

MOV A,D: Move count of 1s from register D to accumulator

STA 9006: Store count of 1s at memory location 9006H

HLT: Halt the program

• 15 is stored at the memory address 8050. 15 in binary is 00010101. It has 5 zeroes and 3 ones.

16
Program:

Memory Addresses Mnemonics Op Code

8000 LDA 8050 3A
8001 50
8002 80
8003 MVI B,08 06
8004 08
8005 MVI C,00 0E
8006 00
8007 MVI D,00 16
8008 00
800G (LOOP) RRC 0F
800A JNC ZERO D2
800B 10
800C 80
800D JC ONE DA
800E 14
800F 80
8010 (ZERO) INR C 0C
8011 JMP END C3
8012 18
8013 80
8014 (ONE) INR D 14
8015 JMP END C3
8016 18
8017 80
8018 (END) DCR B 05
801G JNZ LOOP C2
801A 09
801B 80
801C MOV A,C 79
801D STA 9005 32
801E 60
801F 80
8020 MOV A,D 7A
8021 STA 9006 32
8022 61
8023 80
8024 76

17
RESULTS:

6.1 : Program successfully executed.

6.2 : Hexadecimal number 15 is stored at memory address 8050.

18
6.3 : Number of zeroes are 5, stored at memory address 8060.

6.4 : Number of ones are 3, stored at memory address 8061.

19