[https://nvbugs/5485102][fix] Correctly set stride for piecewise outp… #7442
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PR_Github #17207 [ run ] triggered by Bot |
📝 WalkthroughWalkthroughAdds stride support to TensorWrapper and its CUDA array interface, updates the CUDA tensor weak-ref creation to pass strides, augments in-place argument mapping for a specific TRTLMM op, and unwaives several Llama3.1 8B Instruct tests. Changes
Sequence Diagram(s)Estimated code review effort🎯 3 (Moderate) | ⏱️ ~25 minutes Possibly related PRs
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⚠️ Outside diff range comments (3)
tensorrt_llm/_torch/compilation/utils.py (1)
1-1: Add required SPDX/NVIDIA header.Per repo guidelines, prepend the copyright header.
+ # SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + # SPDX-License-Identifier: Apache-2.0tensorrt_llm/_utils.py (1)
927-939: Validate and normalize strides in ctor.Guard against length mismatches and normalize to tuple[int].
self.dtype = dtype self.shape = shape - self.strides = strides + if strides is not None: + if len(strides) != len(self.shape): + raise ValueError( + f"strides length {len(strides)} doesn't match shape length {len(self.shape)}") + self.strides = tuple(int(s) for s in strides) + else: + self.strides = Nonetensorrt_llm/_torch/utils.py (1)
1-1: Add required SPDX/NVIDIA header.Please prepend the header to comply with project policy.
+ # SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + # SPDX-License-Identifier: Apache-2.0
🧹 Nitpick comments (1)
tensorrt_llm/_utils.py (1)
972-985: Avoid repeated tensor construction to get element size; compute once.Minor perf/readability win in cuda_array_interface.
- def __cuda_array_interface__(self): - return { + def __cuda_array_interface__(self): + elem_size = torch.tensor((), dtype=self.dtype).element_size() + return { "shape": self.shape, "typestr": torch_dtype_to_np_typestr(self.dtype), "data": (self.data_ptr() if self.numel() > 0 else 0, False), - "strides": [ - i * torch.tensor([], dtype=self.dtype).element_size() - for i in self.strides - ] if self.strides is not None else None, + "strides": None if self.strides is None else [i * elem_size for i in self.strides], "version": 3, }
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📒 Files selected for processing (4)
tensorrt_llm/_torch/compilation/utils.py(1 hunks)tensorrt_llm/_torch/utils.py(1 hunks)tensorrt_llm/_utils.py(2 hunks)tests/integration/test_lists/waives.txt(0 hunks)
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- tests/integration/test_lists/waives.txt
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🧬 Code graph analysis (3)
tensorrt_llm/_torch/compilation/utils.py (1)
tensorrt_llm/_torch/custom_ops/flashinfer_custom_ops.py (1)
flashinfer_apply_rope_with_cos_sin_cache_inplace(40-55)
tensorrt_llm/_torch/utils.py (1)
tensorrt_llm/_utils.py (6)
TensorWrapper(922-989)data_ptr(940-941)dtype(944-945)dtype(952-962)shape(948-949)shape(965-966)
tensorrt_llm/_utils.py (2)
tensorrt_llm/runtime/generation.py (3)
dtype(818-819)dtype(1221-1222)shape(806-807)tensorrt_llm/_torch/utils.py (1)
shape(104-105)
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🔇 Additional comments (2)
tensorrt_llm/_torch/compilation/utils.py (1)
71-76: In-place arg map for flashinfer_apply_rope… looks correct; please confirm mutation semantics.Indices 1→"query" and 2→"key" match the op’s signature (positions, query, key, head_size, cos_sin_cache, is_neox). Verify both tensors are indeed mutated in-place by the kernel; if only one is mutated, narrow the map to avoid over-constraining alias analysis.
tensorrt_llm/_torch/utils.py (1)
83-85: LGTM: passing x.stride() fixes non-contiguous CUDA views.This aligns TensorWrapper with PyTorch’s element-wise strides; cuda_array_interface will now receive byte strides via TensorWrapper.
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…ut tensor Signed-off-by: Jin Li <59594262+liji-nv@users.noreply.github.com>
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NVIDIA#7442) Signed-off-by: Jin Li <59594262+liji-nv@users.noreply.github.com>
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