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[TRTLLM-6286] [perf] Add NoSmem epilogue schedule and dynamic cluster shape for sm10x group gemm #7757
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[TRTLLM-6286] [perf] Add NoSmem epilogue schedule and dynamic cluster shape for sm10x group gemm #7757
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Signed-off-by: Xiwen Yu <13230610+VALLIS-NERIA@users.noreply.github.com>
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@djns99 I'm not quite sure how the gtests are compiled. Can you give some hints about covering both sm100f and sm103 kernels? |
📝 WalkthroughWalkthroughUpdated CUTLASS submodule to a newer commit. Added a compile-time guard and revised logging for the Arch==103 MoE GEMM path. Removed runtime file-patching logic from the kernel generation Python script. Changes
Sequence Diagram(s)sequenceDiagram
autonumber
actor Dev as Developer/Build
participant CPP as MoE GEMM (C++)
participant Macro as Compile-time Macro
participant Log as Logger
Dev->>CPP: Build with/without Blackwell macro
Note over Macro,CPP: Guard Arch==103 path behind<br/>COMPILE_BLACKWELL_SM103_TMA_GROUPED_GEMMS
alt Macro enabled (Blackwell support compiled)
CPP->>CPP: Enable Arch==103 code path
else Macro not enabled
CPP->>Log: Emit instruction to compile with 103-real
end
sequenceDiagram
autonumber
actor User as Dev/CI
participant Py as generate_kernels.py
participant Lib as cutlass_library
User->>Py: Run kernel generation
Py->>Lib: Import cutlass_library (no runtime patching)
Py->>User: Generate kernels as configured
Note over Py: Removed file editing of heuristics_provider.py
Estimated code review effort🎯 2 (Simple) | ⏱️ ~10 minutes Pre-merge checks and finishing touches❌ Failed checks (2 warnings)
✅ Passed checks (1 passed)
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Actionable comments posted: 1
🧹 Nitpick comments (3)
3rdparty/cutlass (2)
1-1: Prefer tracking a release tag (or document the exact CUTLASS version).For reproducibility, consider referencing a tagged release (or add a note in RELEASE_NOTES/DEPS.md mapping this SHA → “CUTLASS 4.2”).
1-1: Compliance and toolchain checklist for SM103.
- Update third_party notices/SBOM if required by policy.
- Ensure CI uses a CUDA toolkit/NVCC that supports sm_103 and that build flags include 103-real where needed.
- Add/keep a focused perf/regression test that exercises SM103 grouped GEMM.
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_template_dispatch_tma_ws.h (1)
156-156: Optional: annotate #endif with macro nameAdd the macro name to ease scanning large guard stacks.
-#endif +#endif // !COMPILE_BLACKWELL_SM103_TMA_GROUPED_GEMMS
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3rdparty/cutlass(1 hunks)cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_template_dispatch_tma_ws.h(1 hunks)cpp/tensorrt_llm/kernels/cutlass_kernels/python/generate_kernels.py(0 hunks)
💤 Files with no reviewable changes (1)
- cpp/tensorrt_llm/kernels/cutlass_kernels/python/generate_kernels.py
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🧠 Learnings (3)
📓 Common learnings
Learnt from: djns99
PR: NVIDIA/TensorRT-LLM#7104
File: cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp:399-417
Timestamp: 2025-08-21T21:48:35.135Z
Learning: CUTLASS extensions in TensorRT-LLM (located under cpp/tensorrt_llm/cutlass_extensions/) are designed to integrate with and extend functionality in the external CUTLASS repository. When analyzing these extensions, their consumers and functionality wiring may exist in the CUTLASS codebase rather than within TensorRT-LLM itself.
📚 Learning: 2025-08-19T03:35:20.866Z
Learnt from: djns99
PR: NVIDIA/TensorRT-LLM#6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4616-4626
Timestamp: 2025-08-19T03:35:20.866Z
Learning: In the MOE profiler TMA workspace preparation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu), the overlapping of TMA WS regions for NONE and FINALIZE variants is deliberate design to save memory space, as confirmed by djns99. The comment "reuse the same pointers to save space" reflects this intentional behavior.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_template_dispatch_tma_ws.h
📚 Learning: 2025-08-21T02:39:12.009Z
Learnt from: djns99
PR: NVIDIA/TensorRT-LLM#7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1475-1480
Timestamp: 2025-08-21T02:39:12.009Z
Learning: The min latency mode functionality in TensorRT-LLM MOE kernels (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu) is deprecated and no longer being maintained/updated, as confirmed by djns99. Bug reports and optimization suggestions for the computeStridesTmaWarpSpecializedLowLatencyKernel and related min latency code paths should be deprioritized.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_template_dispatch_tma_ws.h
🧬 Code graph analysis (1)
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_template_dispatch_tma_ws.h (2)
cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/gemm_configs.h (12)
if(308-311)if(312-315)if(316-319)if(320-323)if(324-327)if(328-331)if(332-335)if(336-339)if(340-343)if(488-495)if(496-499)ClusterShape(267-430)cpp/include/tensorrt_llm/kernels/archCondition.h (1)
arch(72-111)
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🔇 Additional comments (2)
3rdparty/cutlass (1)
1-1: CUTLASS submodule bump — LGTM; verify SHA -> tag and SM103 end-to-end
Local git describe returned 61973a9 and submodule status shows -57e3cfb...; no annotated tag present locally. Verify with:
git -C 3rdparty/cutlass fetch --tags && git -C 3rdparty/cutlass describe --tags --contains 61973a9 || git -C 3rdparty/cutlass tag --contains 61973a9
Confirm it maps to CUTLASS v4.2 (or move the submodule to the annotated tag).SM103 wiring present but needs build verification:
- CMake adds COMPILE_BLACKWELL_SM103_TMA_GROUPED_GEMMS (cpp/tensorrt_llm/kernels/cutlass_kernels/CMakeLists.txt:95).
- Code falls back and instructs recompilation with "103-real" (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_template_dispatch_tma_ws.h:150 and cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/launchers/moe_gemm_tma_ws_launcher.inl:145).
- Generator imports cutlass_library (cpp/tensorrt_llm/kernels/cutlass_kernels/python/generate_kernels.py:6) — no runtime patching.
Confirm build_wheel.py accepts/maps "103-real" into the CMAKE arch list (check build_wheel.py or run: rg -n "103-real|CMAKE_CUDA_ARCHITECTURES" -S) so grouped SM103 GEMMs are produced and compiled end-to-end.cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_template_dispatch_tma_ws.h (1)
149-151: Warning text change LGTMMessage clearly communicates SM103 best‑performance guidance and is single-shot via call_once. No action needed.
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_template_dispatch_tma_ws.h
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Running the tests on SM103 should be sufficient with these changes. The new logic in the selectTacticsForArch() ensures we run tests for both pathways |
Signed-off-by: Xiwen Yu <13230610+VALLIS-NERIA@users.noreply.github.com>
Signed-off-by: Xiwen Yu <13230610+VALLIS-NERIA@users.noreply.github.com>
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Signed-off-by: Daniel Stokes <dastokes@nvidia.com> Various updates and tweaks Signed-off-by: djns99 <40156487+djns99@users.noreply.github.com> Rebase fixes Signed-off-by: djns99 <40156487+djns99@users.noreply.github.com> Fix rebase issues Signed-off-by: djns99 <40156487+djns99@users.noreply.github.com> Fix incorrect compilation of SM80 kernels Signed-off-by: djns99 <40156487+djns99@users.noreply.github.com> Correctly test SM103 and SM100 test configs on GB300 Signed-off-by: djns99 <40156487+djns99@users.noreply.github.com> Signed-off-by: Xiwen Yu <13230610+VALLIS-NERIA@users.noreply.github.com>
Signed-off-by: Xiwen Yu <13230610+VALLIS-NERIA@users.noreply.github.com>
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… shape for sm10x group gemm (NVIDIA#7757) Signed-off-by: Xiwen Yu <13230610+VALLIS-NERIA@users.noreply.github.com> Signed-off-by: djns99 <40156487+djns99@users.noreply.github.com> Co-authored-by: djns99 <40156487+djns99@users.noreply.github.com>
… shape for sm10x group gemm (NVIDIA#7757) Signed-off-by: Xiwen Yu <13230610+VALLIS-NERIA@users.noreply.github.com> Signed-off-by: djns99 <40156487+djns99@users.noreply.github.com> Co-authored-by: djns99 <40156487+djns99@users.noreply.github.com>
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