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[TRTLLM-6898][feat] Add swapab, tileN64, cga sync support for cute dsl nvfp4 gemm by limin2021 · Pull Request #7764 · NVIDIA/TensorRT-LLM · GitHub
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@limin2021 limin2021 commented Sep 16, 2025

Summary by CodeRabbit

  • New Features

    • Added optional A/B swap in FP4 GEMM/linear, including correct output layout handling.
    • Expanded supported kernel shapes (including 64-wide N) for broader hardware coverage.
    • Introduced improved multi-CTA pipeline orchestration to enhance throughput and stability.
  • Performance

    • Broadened tactic search and selection; refined synchronization for more consistent launches.
  • Documentation

    • Clarified pointer utilities with updated docstrings.
  • Tests

    • Added FP4 GEMM performance benchmark with warmup and cold-cache options.
    • Consolidated padding utility usage from a shared helper.

Description

[TRTLLM-6898][feat] Add swapab, tileN64, cga sync support for cute dsl nvfp4 gemm

previous MR: #7632

Test Coverage

op UT:
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model UT:
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Perf

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  • PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.

  • Test cases are provided for new code paths (see test instructions)

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  • CODEOWNERS updated if ownership changes

  • Documentation updated as needed

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  • Please check this after reviewing the above items as appropriate for this PR.

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Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
@limin2021 limin2021 requested review from a team as code owners September 16, 2025 09:21
@limin2021 limin2021 changed the title add optimizations. [TRTLLM-6898][feat] Add swapab, tileN64, cga sync support for cute dsl nvfp4 gemm Sep 16, 2025
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📝 Walkthrough

Walkthrough

Introduces AB-swap awareness in tactic generation, kernel caching, and launch for NVFP4 GEMM; adds Blackwell-specific pipeline abstractions (TMA↔UMMA, UMMA↔Async); extends GEMM kernel to support 64-wide N tilers and exposes swap_ab in kernel entry points; updates docstrings; augments tests with a performance benchmark and centralizes pad_up.

Changes

Cohort / File(s) Summary of Changes
AB-swap tactics and launch path
tensorrt_llm/_torch/custom_ops/torch_custom_ops.py
Expands tactic enumeration to include swap_ab; validates via can_implement with sf_vec_size and AB-order; extends cache key; updates forward/launch to swap operands and dimensions when swap_ab is True; permutes output back post-launch if swapped.
Blackwell pipeline abstractions
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/custom_pipeline.py
Adds pipeline_init_wait; introduces PipelineTmaUmma and PipelineUmmaAsync with cluster-aware masks, leader CTA logic, and cta_group handling; defines create/commit/acquire/release/tail methods; integrates multicast and 2-CTA semantics.
Dense GEMM kernel: 64-wide tiler and swap_ab API
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py
Imports new pipelines; enables aligned cluster_arrive; allows N tiler = 64/128/256; adjusts SFB tiling to mma_tiler_sfb; adds 64-wide path with slice_n, pointer shifts, and accumulation via tCtSFB_mma; exposes swap_ab in kernel and wrapper call; conditionally chooses C layout based on swap_ab.
Docs only
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/utils.py
Rewrites docstrings for _Pointer and make_ptr to Google-style; no behavior changes.
Tests and benchmarking
tests/unittest/_torch/thop/parallel/test_fp4_linear.py
Replaces local pad_up with tensorrt_llm.math_utils.pad_up; adds nvfp4_gemm_perf_test with optional cold L2 workspace, warmup/iterations, reference check, and NVTX annotations; removes local pad_up.

Sequence Diagram(s)

sequenceDiagram
  autonumber
  participant Caller
  participant TorchOp as Torch Custom Op
  participant Tactics as Tactic Generator
  participant Cache as Kernel Cache
  participant Kernel as Compiled GEMM

  Caller->>TorchOp: cute_dsl_nvfp4_gemm_blackwell(A,B,SF_A,SF_B, swap_ab?)
  TorchOp->>Tactics: enumerate(mma_tiler_mn × cluster_shape_mn × swap_ab)
  Tactics-->>TorchOp: valid tactics (incl. swap_ab)
  TorchOp->>Cache: lookup(key: mma, cluster, swap_ab, ...)

  alt cache miss
    TorchOp->>Kernel: compile with params (incl. swap_ab)
    Kernel-->>Cache: store compiled kernel
  end

  opt swap_ab == True
    Note over TorchOp: swap A/B pointers, M/N dims, SF dims
  end

  TorchOp->>Kernel: launch(A*,B*,SF_A*,SF_B*, M,N,SF_M,SF_N)
  Kernel-->>TorchOp: C_out
  opt swap_ab == True
    TorchOp->>TorchOp: permute C_out to original orientation
  end
  TorchOp-->>Caller: C_out
Loading
sequenceDiagram
  autonumber
  participant TMA as TMA Producer
  participant UMMA as UMMA Consumer
  participant Barrier as Pipeline Sync
  Note over TMA,UMMA: PipelineTmaUmma (multi-CTA optional)

  rect rgba(230,245,255,0.5)
  Note over Barrier: pipeline_init_wait
  end

  par Stage loop
    TMA->>Barrier: producer_acquire (wait empty, signal full if leader)
    UMMA->>Barrier: consumer_release (signal empty after consume)
  end
Loading
sequenceDiagram
  autonumber
  participant UMMA as UMMA Producer
  participant Async as AsyncThread Consumer
  participant Barrier as Pipeline Sync
  Note over UMMA,Async: PipelineUmmaAsync (2-CTA optional)

  UMMA->>Barrier: producer_commit (signal full with mask)
  Async-->>UMMA: consumes buffers (peer CTA if configured)
  UMMA->>UMMA: producer_tail (advance to last useful, acquire if leader)
Loading

Estimated code review effort

🎯 4 (Complex) | ⏱️ ~75 minutes

Possibly related PRs

Suggested reviewers

  • liji-nv
  • yuxianq
  • Kefeng-Duan

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Description Check ⚠️ Warning The PR description is incomplete: it mainly contains the repository PR template and a single-line summary ("[TRTLLM-6898][feat] Add swapab, tileN64, cga sync support for cute dsl nvfp4 gemm") while leaving key sections (detailed change summary, explicit list of modified files and public API changes, concrete test coverage, and performance results) blank or marked TODO. Required information that reviewers and CI rely on—tests that exercise new code paths, how to run them, perf numbers or benchmark instructions, and an updated PR checklist/CODEOWNERS—are missing, so the description does not meet the repository template expectations. Because these omissions materially reduce reviewer ability to validate the change, the check fails. Please update the PR description to follow the repository template by providing a concise but complete summary of functional changes and rationale, a clear list of modified files and any public API/user-visible changes, explicit test coverage (which tests were added/modified and exact commands to run them), performance/benchmark results or instructions, and a completed PR checklist including CODEOWNERS and documentation updates; also reference the previous MR and ensure the PR title follows the required "[TICKET][type] Summary" format.
✅ Passed checks (1 passed)
Check name Status Explanation
Title Check ✅ Passed The PR title "[TRTLLM-6898][feat] Add swapab, tileN64, cga sync support for cute dsl nvfp4 gemm" is concise, follows the repository ticket/type format, and accurately summarizes the primary changes in the diff (swap_ab handling, 64-wide N tiler support, and cluster/CTA synchronization additions present across the modified files), so a reviewer can understand the main scope at a glance.
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Actionable comments posted: 2

🧹 Nitpick comments (11)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/utils.py (1)

160-172: Fix example import mismatch in docstring

The example imports Float32 directly but later uses cutlass.Float32. Make them consistent to avoid confusing users.

Apply this docstring-only tweak:

-        from cutlass import Float32
+        import cutlass
...
-        y = make_ptr(cutlass.Float32, ptr_address)
+        y = make_ptr(cutlass.Float32, ptr_address)
tests/unittest/_torch/thop/parallel/test_fp4_linear.py (4)

316-317: Remove f-string without placeholders

Plain string is sufficient.

-        print(f"PASSED")
+        print("PASSED")

336-346: Rename unused loop variable

Avoid B007 warning: variable is unused.

-        for i in range(iterations):
+        for _ in range(iterations):

349-350: Remove f-string without placeholders

Same as above.

-        print(f"PASSED")
+        print("PASSED")

368-377: Rename unused loop variable

Mirror earlier nit.

-            for i in range(iterations):
+            for _ in range(iterations):
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/custom_pipeline.py (4)

21-26: Unused parameter in helper

cta_layout_vmnk isn’t used; rename to _cta_layout_vmnk to silence linters or use it.

-def pipeline_init_wait(cta_layout_vmnk: Optional[cute.Layout] = None):
+def pipeline_init_wait(_cta_layout_vmnk: Optional[cute.Layout] = None):

121-125: Prefer TypeError for invalid type

Invalid-typed argument should raise TypeError.

-        if not isinstance(barrier_storage, cute.Pointer):
-            raise ValueError(
+        if not isinstance(barrier_storage, cute.Pointer):
+            raise TypeError(
                 f"Expected barrier_storage to be a cute.Pointer, but got {type(barrier_storage)}"
             )

248-252: Prefer TypeError for invalid type

Same as above in PipelineUmmaAsync.create.

-        if not isinstance(barrier_storage, cute.Pointer):
-            raise ValueError(
+        if not isinstance(barrier_storage, cute.Pointer):
+            raise TypeError(
                 f"Expected barrier_storage to be a cute.Pointer, but got {type(barrier_storage)}"
             )

316-320: Rename unused loop variable

Minor lint fix.

-            for i in range(self.num_stages - 1):
+            for _ in range(self.num_stages - 1):
                 state.advance()
tensorrt_llm/_torch/custom_ops/torch_custom_ops.py (1)

1202-1206: Avoid creating-and-permuting C for swap_ab

Allocate C directly in (n, m) when swap_ab=True to avoid a non-contiguous view and extra permute pre-launch.

-        c_tensor = torch.empty(*(m, n), dtype=self.output_dtype, device="cuda")
-
-        if swap_ab:
-            c_tensor = c_tensor.permute(1, 0)
+        if swap_ab:
+            c_tensor = torch.empty(*(n, m), dtype=self.output_dtype, device="cuda")
+        else:
+            c_tensor = torch.empty(*(m, n), dtype=self.output_dtype, device="cuda")
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py (1)

1758-1759: Style: membership test

Use “not in” per Ruff E713.

-        if not mma_tiler_mn[1] in [64, 128, 256]:
+        if mma_tiler_mn[1] not in [64, 128, 256]:
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📒 Files selected for processing (5)
  • tensorrt_llm/_torch/custom_ops/torch_custom_ops.py (4 hunks)
  • tensorrt_llm/_torch/cute_dsl_kernels/blackwell/custom_pipeline.py (1 hunks)
  • tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py (11 hunks)
  • tensorrt_llm/_torch/cute_dsl_kernels/blackwell/utils.py (2 hunks)
  • tests/unittest/_torch/thop/parallel/test_fp4_linear.py (2 hunks)
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  • tests/unittest/_torch/thop/parallel/test_fp4_linear.py
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  • tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py
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  • tensorrt_llm/_torch/custom_ops/torch_custom_ops.py
  • tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py
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tensorrt_llm/_torch/cute_dsl_kernels/blackwell/custom_pipeline.py (1)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/utils.py (1)
  • align (125-126)
tests/unittest/_torch/thop/parallel/test_fp4_linear.py (2)
tensorrt_llm/_torch/custom_ops/torch_custom_ops.py (12)
  • _ (272-325)
  • _ (401-409)
  • _ (487-497)
  • _ (666-693)
  • _ (726-736)
  • _ (810-820)
  • _ (910-926)
  • _ (1006-1014)
  • _ (1047-1058)
  • _ (1347-1361)
  • cute_dsl_nvfp4_gemm_blackwell (1318-1343)
  • nvfp4_gemm (458-483)
tensorrt_llm/_torch/autotuner.py (1)
  • autotune (204-215)
tensorrt_llm/_torch/custom_ops/torch_custom_ops.py (1)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py (2)
  • Sm100BlockScaledPersistentDenseGemmKernel (65-1877)
  • can_implement (1821-1877)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py (1)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/custom_pipeline.py (4)
  • PipelineTmaUmma (34-193)
  • PipelineUmmaAsync (197-320)
  • create (94-165)
  • create (227-291)
🪛 Ruff (0.12.2)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/custom_pipeline.py

21-21: Unused function argument: cta_layout_vmnk

(ARG001)


122-124: Prefer TypeError exception for invalid type

(TRY004)


122-124: Avoid specifying long messages outside the exception class

(TRY003)


249-251: Prefer TypeError exception for invalid type

(TRY004)


249-251: Avoid specifying long messages outside the exception class

(TRY003)


316-316: Loop control variable i not used within loop body

Rename unused i to _i

(B007)

tests/unittest/_torch/thop/parallel/test_fp4_linear.py

316-316: f-string without any placeholders

Remove extraneous f prefix

(F541)


336-336: Loop control variable i not used within loop body

Rename unused i to _i

(B007)


349-349: f-string without any placeholders

Remove extraneous f prefix

(F541)


368-368: Loop control variable i not used within loop body

Rename unused i to _i

(B007)

tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py

1758-1758: Test for membership should be not in

Convert to not in

(E713)

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🔇 Additional comments (11)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/utils.py (1)

56-72: Docstring rewrite LGTM

Thanks for switching to concise Google-style docstrings; no behavior change.

tensorrt_llm/_torch/cute_dsl_kernels/blackwell/custom_pipeline.py (1)

1-10: License header deviates from repo guideline

Repo guideline says prepend NVIDIA Apache-2.0 header to .py files; this file uses LicenseRef-NvidiaProprietary (EULA). If intentional due to Cutlass DSL license, please confirm with legal/owners and document the exception.

tensorrt_llm/_torch/custom_ops/torch_custom_ops.py (2)

1257-1286: Include swap_ab in compile-time specialization (good), ensure consistent launch

CACHE_KEY includes swap_ab and compile passes swap_ab as Constexpr — good. After fixing C allocation above, the rest of the launch path remains consistent.

Please run a quick sanity on both swap_ab=False/True to confirm output shape (m, n) and equality to the reference within tolerance.


1293-1311: Post-launch transpose back to (m, n) LGTM

With the allocation fix above, this becomes an inexpensive view.

tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py (7)

61-63: Direct import of custom pipelines LGTM

Switching to the new PipelineTmaUmma/PipelineUmmaAsync is clear and keeps dependencies explicit.


625-633: AB pipeline creation LGTM

Correct producer/consumer groups and tx_count wiring.


641-647: ACC pipeline creation LGTM

Producer/consumer groups and layout propagation look right.


660-661: Use aligned cluster arrive

Passing aligned=True is appropriate for post-init synchronization.


715-718: Use mma_tiler_sfb for SFB tiling

Good catch; aligns SFB copy path with its widened tiler.


856-862: 64-wide N handling in SFB slice

Halving the N index for the 64 path makes sense for SFB tiling; comment is clear.


1031-1042: SFB tmem pointer offset for 64-wide N

Offset-by-2 columns per odd tile is reasonable; please verify with a targeted unit to ensure no off-by-one across tile boundaries.

Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
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PR_Github #18775 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #14074 completed with status: 'FAILURE'

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PR_Github #18799 [ run ] triggered by Bot

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PR_Github #18793 [ run ] completed with state ABORTED
LLM/main/L0_MergeRequest_PR #14088 (Blue Ocean) completed with status: ABORTED

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PR_Github #18799 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #14093 completed with status: 'FAILURE'

Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
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PR_Github #18909 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #14175 completed with status: 'FAILURE'

…-dsl-nvfp4-linear-step-2

Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
…-dsl-nvfp4-linear-step-2

Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
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/bot run

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PR_Github #19136 [ run ] triggered by Bot

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PR_Github #19136 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #14360 completed with status: 'SUCCESS'

@Superjomn Superjomn merged commit d921fc3 into NVIDIA:main Sep 18, 2025
13 checks passed
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Sep 19, 2025
…l nvfp4 gemm (NVIDIA#7764)

Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
Wong4j pushed a commit to Wong4j/TensorRT-LLM that referenced this pull request Sep 20, 2025
…l nvfp4 gemm (NVIDIA#7764)

Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
MrGeva pushed a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request Sep 21, 2025
…l nvfp4 gemm (NVIDIA#7764)

Signed-off-by: Mindy Li <11663212+limin2021@users.noreply.github.com>
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6 participants