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[None][feat] Add fmha_v2 kernel for head_dim=80 and sm=100 to support VLM by Wanli-Jiang · Pull Request #8392 · NVIDIA/TensorRT-LLM · GitHub
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@Wanli-Jiang Wanli-Jiang commented Oct 15, 2025

Summary by CodeRabbit

  • New Features

    • Expanded attention kernel support to include additional SigLip/CLIP configurations on supported modern GPUs.
  • Bug Fixes

    • Ensures the optimized attention path is used only for power-of-two head sizes, with automatic fallback to a stable implementation for other sizes to maintain reliability.

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📝 Walkthrough

Walkthrough

Adds a new condition in fmha_v2 setup to include SigLip/Clip kernel specs for SM100 with specific dtypes and head sizes. Updates FmhaDispatcher to enable TRTLLM-GEN only when on SM100 and head size is a power of two; otherwise, it falls back to FMHA v2.

Changes

Cohort / File(s) Summary
Kernel spec selection (setup)
cpp/kernels/fmha_v2/setup.py
Introduces an additional disjoint clause to include SigLip/Clip/SigLip configurations in the public kernel list for sm=100 when dtype ∈ {fp16,bf16,fp16_fp32,e4m3,e4m3_fp32}, head_size=80, head_size_v=0, no Sage block sizes, version=2, cross_mha=False, flash_attention=True, and input_layout≠SEPARATE_Q_K_V.
Runtime dispatcher selection
cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp
Tightens TRTLLM-GEN selection: mUseTllmGen now requires SM100 family AND headSize being a power of two; non-power-of-two sizes route to FusedMHARunnerV2. No API changes.

Sequence Diagram(s)

sequenceDiagram
  autonumber
  participant Build as Setup Script
  participant KGen as KernelSpec Generator
  participant Pub as PublicKernelList

  Note over Build,KGen: Kernel spec publication (build-time)

  Build->>KGen: Enumerate kernel spec candidates
  alt SM=100 and dtype in {fp16,bf16,fp16_fp32,e4m3,e4m3_fp32}\nand head_size=80 and head_size_v=0\nand ver=2 and !cross_mha and flash_attention\nand input_layout != SEPARATE_Q_K_V
    KGen-->>Pub: Include SigLip/Clip/SigLip kspecs
  else Other existing conditions
    KGen-->>Pub: Include previously defined kspecs
  end
Loading
sequenceDiagram
  autonumber
  participant Caller
  participant Disp as FmhaDispatcher
  participant Gen as TllmGenFMHARunner
  participant V2 as FusedMHARunnerV2

  Caller->>Disp: Construct(headSize, sm, ...)
  alt SM100 family AND headSize is power-of-two
    Note right of Disp: mUseTllmGen = true
    Disp->>Gen: Initialize TRTLLM-GEN path
  else Otherwise
    Note right of Disp: mUseTllmGen = false
    Disp->>V2: Initialize FMHA v2 path
  end
Loading

Estimated code review effort

🎯 2 (Simple) | ⏱️ ~10 minutes

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✅ Passed checks (1 passed)
Check name Status Explanation
Title Check ✅ Passed The title succinctly follows the repository’s template and clearly summarizes the primary change of adding an fmha_v2 kernel for head_dim=80 and sm=100 to support VLM.
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Actionable comments posted: 1

🧹 Nitpick comments (1)
cpp/kernels/fmha_v2/setup.py (1)

6382-6391: Use boolean truthiness instead of == True/False (ruff E712).

Minor cleanup; no behavior change.

-                  or  (kspec.sm           == 100
+                  or  (kspec.sm           == 100
                   and kspec.dtype         in ['fp16', 'bf16', 'fp16_fp32', 'e4m3', 'e4m3_fp32']
                   and kspec.head_size     == 80
                   and kspec.head_size_v   == 0
                   and kspec.sage_block_sizes is None
                   and kspec.version       == 2
-                  and kspec.cross_mha     == False
-                  and kspec.flash_attention == True
+                  and not kspec.cross_mha
+                  and kspec.flash_attention
                   and kspec.input_layout != InputLayout.SEPARATE_Q_K_V)

Also, do we need to include sm == 103 (SM100 family) here like other places treat 100/103 equivalently? If required, mirror this clause for sm == 103.

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Reviewing files that changed from the base of the PR and between 1a1c9a2 and 0e44f70.

📒 Files selected for processing (2)
  • cpp/kernels/fmha_v2/setup.py (1 hunks)
  • cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp (1 hunks)
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🧬 Code graph analysis (1)
cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp (2)
tests/unittest/utils/util.py (1)
  • isSM100Family (78-80)
cpp/include/tensorrt_llm/common/cudaUtils.h (1)
  • isSM100Family (318-322)
🪛 Ruff (0.14.0)
cpp/kernels/fmha_v2/setup.py

6389-6389: Avoid equality comparisons to False; use not kspec.cross_mha: for false checks

Replace with not kspec.cross_mha

(E712)


6390-6390: Avoid equality comparisons to True; use kspec.flash_attention: for truth checks

Replace with kspec.flash_attention

(E712)

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  • GitHub Check: Pre-commit Check

@Wanli-Jiang Wanli-Jiang force-pushed the user/williamj/support-sm100-vit-head80-kernel branch from 0e44f70 to d62b796 Compare October 15, 2025 09:38
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PR_Github #21464 [ run ] triggered by Bot

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PR_Github #21464 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #16205 completed with status: 'FAILURE'

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PR_Github #21508 [ run ] triggered by Bot

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PR_Github #21508 [ run ] completed with state FAILURE
/LLM/main/L0_MergeRequest_PR pipeline #16237 completed with status: 'FAILURE'

@Wanli-Jiang Wanli-Jiang force-pushed the user/williamj/support-sm100-vit-head80-kernel branch from d62b796 to 1ad05bf Compare October 16, 2025 11:54
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PR_Github #21574 [ run ] completed with state FAILURE
/LLM/main/L0_MergeRequest_PR pipeline #16283 completed with status: 'FAILURE'

… VLM

Signed-off-by: Wanli Jiang <35160485+Wanli-Jiang@users.noreply.github.com>
@Wanli-Jiang Wanli-Jiang force-pushed the user/williamj/support-sm100-vit-head80-kernel branch from 1ad05bf to a032092 Compare October 17, 2025 07:12
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PR_Github #21677 [ run ] triggered by Bot

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PR_Github #21677 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #16335 completed with status: 'SUCCESS'

@Wanli-Jiang Wanli-Jiang merged commit 56f697b into NVIDIA:main Oct 17, 2025
5 checks passed
govind-ramnarayan pushed a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request Oct 21, 2025
… VLM (NVIDIA#8392)

Signed-off-by: Wanli Jiang <35160485+Wanli-Jiang@users.noreply.github.com>
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