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Edit `CUDAQ_GLOBAL_INDEX_BITS` doc by 1tnguyen · Pull Request #3005 · NVIDIA/cuda-quantum · GitHub
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@1tnguyen 1tnguyen commented Jun 6, 2025

Description

Edit the documentation for CUDAQ_GLOBAL_INDEX_BITS to improve clarity.

Signed-off-by: Thien Nguyen <thiennguyen@nvidia.com>
@1tnguyen 1tnguyen added the documentation Improvements or additions to documentation label Jun 6, 2025
@1tnguyen 1tnguyen requested review from mitchdz and sacpis June 6, 2025 01:38
github-actions bot pushed a commit that referenced this pull request Jun 6, 2025
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CUDA Quantum Docs Bot: A preview of the documentation can be found here.

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Please correct me if I'm wrong but my understanding is that this variable applies to the communication network between all MPI processes regardless of whether they are intra-node or inter-node. For example, the given list would also apply to 4 nodes and 8 GPUs/node, with NVLinks between the GPUs. The current formulation makes the impression it only applies to the network between nodes and the that the network inside a node is not relevant. Here is a suggestion that reflects my understanding:

Specify the network structure (faster to slower). For example, assuming a 32 MPI processes simulation, whereby the network topology is divided into 4 groups of 8 processes, which have faster communication network between them. In this case, the CUDAQ_GLOBAL_INDEX_BITS environment variable can be set to 3,2. The first 3 (log2(8)) represents 8 processes with fast communication within the group and the second 2 represents the 4 groups (8 processes each) in those total 32 processes. The sum of all elements in this list is 5, corresponding to the total number of MPI processes (2^5 = 32). Default is an empty list (no customization based on network structure of the cluster).

Edit the docstring for CUDAQ_GLOBAL_INDEX_BITS

Signed-off-by: Thien Nguyen <thiennguyen@nvidia.com>
@1tnguyen
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Please correct me if I'm wrong but my understanding is that this variable applies to the communication network between all MPI processes regardless of whether they are intra-node or inter-node. For example, the given list would also apply to 4 nodes and 8 GPUs/node, with NVLinks between the GPUs. The current formulation makes the impression it only applies to the network between nodes and the that the network inside a node is not relevant. Here is a suggestion that reflects my understanding:

Specify the network structure (faster to slower). For example, assuming a 32 MPI processes simulation, whereby the network topology is divided into 4 groups of 8 processes, which have faster communication network between them. In this case, the CUDAQ_GLOBAL_INDEX_BITS environment variable can be set to 3,2. The first 3 (log2(8)) represents 8 processes with fast communication within the group and the second 2 represents the 4 groups (8 processes each) in those total 32 processes. The sum of all elements in this list is 5, corresponding to the total number of MPI processes (2^5 = 32). Default is an empty list (no customization based on network structure of the cluster).

That makes sense. I've incorporated your suggestions in 26e3801

@1tnguyen 1tnguyen enabled auto-merge (squash) June 10, 2025 03:53
github-actions bot pushed a commit that referenced this pull request Jun 10, 2025
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CUDA Quantum Docs Bot: A preview of the documentation can be found here.

@1tnguyen 1tnguyen merged commit 8136209 into NVIDIA:main Jun 10, 2025
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github-actions bot pushed a commit that referenced this pull request Jun 10, 2025
annagrin pushed a commit to annagrin/cuda-quantum that referenced this pull request Jun 17, 2025
* Edit CUDAQ_GLOBAL_INDEX_BITS doc for clarity

Signed-off-by: Thien Nguyen <thiennguyen@nvidia.com>

* Address code review comment

Edit the docstring for CUDAQ_GLOBAL_INDEX_BITS

Signed-off-by: Thien Nguyen <thiennguyen@nvidia.com>

---------

Signed-off-by: Thien Nguyen <thiennguyen@nvidia.com>
Signed-off-by: Anna Gringauze <agringauze@nvidia.com>
@bettinaheim bettinaheim added this to the release 0.12.0 milestone Jul 22, 2025
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