INTRODUCTION
The Role and Place of Modern Mixed AnalogDigital
Chips
Very Large Scale Integration (VLSI) Technologies
Over 1 million transistors
From 70s Digital Computer Era had begun
Analog Signal Processing reduced but not disappeared
The need to interface the computer to the analog world
The need for analogenhances digital performance
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THE NEED TO INTERFACE THE COMPUTER TO
THE ANALOG WORLD
Computers work in the real word
Automobile
Radio, computerized engine control, safety, navigation
aids, etc.
Cellular telephony
Transmission and reception of both analog and digital
signals
A/D and D/A converters
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THE NEED TO INTERFACE THE COMPUTER TO
THE ANALOG WORLD
PrePost Conversion signal condition
Amplification, filtering for antialiasing or smoothing,
sampling, holding, multiplexing etc.
Direct signal processing without A/D conversion
Medium SNR systems, high speed, low power
Interface with sensors
Receiving antennas, transmission lines,
Drive for attuators
Transmitting antennas, transmission lines
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THE NEED TO INTERFACE THE COMPUTER TO
THE ANALOG WORLD
MAD circuits have been realized in metaloxide
semiconductor (MOS) technology
Precision ratio capacitor arrays
Internally compensated MOS operational amplifiers
High performances A/D converters
High performances SwitchedCapacitor filters
Continuous time filters
PCM encodersdecoders
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THE NEED FOR ANALOG-ENHANCED DIGITAL
PERFORMANCE
Analog circuits make possible the high performance of
digital systems
Hard disk drive
Digital communication links
High speed digital circuits are analog in nature
Clock recovery circuits
PLL
Charge pumps
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ADVANTAGE OF MIXING ANALOG AND DIGITAL
CIRCUITS ON THE SAME CHIP
The size of the system is reduced
The speed of the operation can be increased
The power dissipation is decreased
The design flexibility is increased > high # of channels
The reliability is increased
The system cost is reduced
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APPLICATIONS OF MAD CHIPS
Telecommunications
Consumer electronics
Computer and related equipment
Multimedia
Automotive systems
Biomedical instrumentation
Robotics
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PROBLEMS IN THE DESIGN OF MAD CIRCUITS
Analog circuits are critical to design
Analog voltages are small signals (V) near digital
circuits (V)
On chip interferences
Analog circuits are not amenable to standardization
For analog circuits design automation is not possible
Testing
Mixed circuit designers are not easy to find
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MECHANISM AND EFFECT OF NOISE COUPLING
VLSI MAD chips consist of several subsystems which
must be kept from interfering with each other
Sharing of common substrate
Sharing of common connections to the external word
Parasitic coupling from inductance and resistance of
power supply and ground wires
Coupling from substrate
Coupling from protection diodes
Coupling from parasitic cap. of adjacent elements
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MECHANISM AND EFFECT OF NOISE COUPLING
Voltages and currents switching cause noise
This noise will increase as:
Magnitude of switching events increase
Number of switching events increase
Frequency of switching events increase
Differential ECL
ECL
TTL
CMOS
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TECHNIQUES FOR NOISE REDUCTION
Design system solution
Shielding
Packaging
Chip floorplanning
Chip wiring
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SYSTEM SOLUTIONS
Even pure CMOS logic design are being limited by crosstalk and
inductive switching noise problems
Adding any circuitry with less noise margin than CMOS circuits
is very difficult
Separate ICs mounted in hybrid packages or MultiChip
Module (MCM)
Correct timing of signals
Comparators and sampling circuits do not compare or
sample when large digital driver switch
Use fully differential circuits when possible
Use of special logic circuits
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LAYOUT SOLUTIONS
Stop thinking of power supply lines and grounds as
perfect conductors
Avoid common power supply or ground buses
Use of bypass capacitors inside and outside
Pay attention to the resonant frequency
Also analog circuits require different power supply
VDDDR1, VDDDR2, GNDDR1, GNDDR2, (PAD RING)
VDDDC1, VDDDC2, GNDDC1, GNDDC2, (CORE)
VDDA1, VDDA2,.. GNDA1, GNDA2,.. VSUB1, VSUB2,..
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LAYOUT SOLUTIONS
Assign bonding pads wisely
The package bonding diagram should be anticipated
Use several pads in parallel for power supply and ground
Make power supply lines and ground wide
Lines as wide as 100m
Use of less resistive metal layer (Metal2)
Use of star VDD
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SUBSTRATE COUPLING
Consider substrate coupling carefully and guard
against it
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SHIELDS
Shield all sensitive circuits, devices and
interconnections lines
oxide
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metal-2 (digital)
metal-1 (shield)
poly (analog)
well (shield)
Use of metal-1 layer as digital inteferences shield
Use of well as substrate shield
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LAYOUT SOLUTIONS
Avoid proximities of circuits, devices or interconnection
lines that can interfere with each other
analog
digital
a)
analog
digital
b)
analog
digital
c)
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LAYOUT OF SC CIRCUITS
In+ In Out In+ In Out In+ In Out
VDD
VDD
Bias Cell
VB2
VB1
Op-Amp1
VSS
Op-Amp2
Comp
VSS
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LAYOUT OF SC CIRCUITS
Phases
Switches
Protection
Protection
Ring
Capacitor
Array
Bias cell
and
Op-Amps
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LAYOUT OF SC CIRCUITS
Analog Bus
Digital Bus
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Bus fasi
Bus fasi
Interruttori
Condensatori
Bus segnali analogici
Bus fasi
Interruttori
Condensatori
Operazionale
Bus fasi
Bus segnali analogici
Bus fasi
Bus segnali analogici
Condensatori
Interruttori
Bus fasi
Bus fasi
Operazionale
Bus segnali analogici
Bus segnali analogici
Condensatori
Interruttori
Bus fasi
FLOORPLAN SC CIRCUITS
Bus segnali analogici
Bus fasi
Comparatore
Bus fasi
Convertitori D/A
Generatore di fasi
Sezione Analogica
Sezione Digitale
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MICROCHIP
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BONDING 1
Pin
R1
Pad
Id
Digital
Section
Ia
R2
Analog
Section
Bad performance
dv
Current in digital section i = C -----dt
di
Voltage across the inductance v = L ----dt
Resonance frequency LC can equal the clock frequency
Transistor level simulation!!!
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BONDING 2
L1
Pad
Digital
R1
Id
Digital
Section
Pin
R2
Ia
Analog
Section
C
L2
Pad
Analog
Improved connection
Addition of bypass capacitor to avoid resonance
frequency
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BONDING 3
Pin
Digital
L1
Pad
Digital
R1
Id
Digital
Section
C
L3
L2
Pin
Analog
R2
Ia
Analog
Section
Pad
Analog
Best solution
Cost
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FLOORPLAN
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GUARD RINGS
VDDM
To "clean"
mixed
ground
GNDM
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p+ guard ring
n-well guard ring
p+ guard ring
VDD
GND
VDD
GND
GND
VDD
Mixed
Circuit being
"guarded"
n-well guard ring
p+ guard ring
Analog
Circuit being
"guarded"
To "clean"
DC
To "clean"
analog
ground
VDDA
GNDA
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MAD EXAMPLE 1
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MAD EXAMPLE 2
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