COMPUTER
ARCHITECTURE AND
OPERATING SYSTEMS
(CS31702)
Syllabus
• Architecture:
– Basic organization,
– fetch-decode-execute cycle,
– data path and control path,
– instruction set architecture,
– I/O subsystems, interrupts, memory hierarchy, overview of
pipelined architecture.
• Operating systems:
– An overview,
– process management,
– user and supervisor modes,
– process synchronization, semaphores,
– memory management, virtual memory,
– file systems, I/O systems.
Books
Computer Architecture:
• David A. Patterson and John L. Hennessy, Computer
Organization and Design: The Hardware/Software Interface,
Elsevier.
• Carl Hamachar, Zvonco Vranesic and Safwat Zaky,
Computer Organization, McGraw-Hill.
• John P. Hayes, Computer Architecture and Organization,
McGraw-Hill.
Operating System:
• Avi Silberschatz, Peter Galvin, Greg Gagne, Operating
System Concepts, Wiley Asia Student Edition.
• William Stallings, Operating Systems: Internals and Design
Principles, Prentice Hall of India.
COMPUTER ORGANIZATION AND DESIGN
5
Edition
th
The Hardware/Software Interface
Chapter 1
Computer Abstractions and
Technology
§1.1 Introduction
The Computer Revolution
Progress in computer technology
Underpinned by Moore’s Law – 2x integration
density every 18 months
Makes novel applications feasible
Computers in automobiles
Cell phones
Human genome project
World Wide Web
Search Engines
Computers are pervasive
Chapter 1 — Computer Abstractions and Technology — 5
Classes of Computers
Personal computers
General purpose, variety of software
Subject to cost/performance tradeoff
Server computers
Network based
High capacity, performance, reliability
Range from small servers to building sized
Chapter 1 — Computer Abstractions and Technology — 6
Classes of Computers
Supercomputers
High-end scientific and engineering
calculations
Highest capability but represent a small
fraction of the overall computer market
Embedded computers
Hidden as components of systems
Stringent power/performance/cost constraints
Chapter 1 — Computer Abstractions and Technology — 7
The PostPC Era
Chapter 1 — Computer Abstractions and Technology — 8
The PostPC Era
Personal Mobile Device (PMD)
Battery operated
Connects to the Internet
Hundreds of dollars
Smart phones, tablets, electronic glasses
Cloud computing
Warehouse Scale Computers (WSC)
Software as a Service (SaaS)
Portion of software run on a PMD and a
portion run in the Cloud
Amazon and Google
Chapter 1 — Computer Abstractions and Technology — 9
What You Will Learn
How programs are translated into the
machine language
And how the hardware executes them
The hardware/software interface
What determines program performance
And how it can be improved
How hardware designers improve
performance
What is parallel processing
Chapter 1 — Computer Abstractions and Technology — 10
What Affects Performance?
Algorithm
Determines number of operations executed
Programming language, compiler, architecture
Determine number of machine instructions executed
per operation
Processor and memory system
Determine how fast instructions are executed
I/O system (including OS)
Determines how fast I/O operations are executed
Chapter 1 — Computer Abstractions and Technology — 11
§1.2 Eight Great Ideas in Computer Architecture
Eight Great Ideas
Design for Moore’s Law
Use abstraction to simplify design
Make the common case fast
Performance via parallelism
Performance via pipelining
Performance via prediction
Hierarchy of memories
Dependability via redundancy
Chapter 1 — Computer Abstractions and Technology — 12
§1.3 Below Your Program
Below Your Program
Application software
Written in high-level language
System software
Compiler: translates HLL code to
machine code
Operating System: service code
Handling input/output
Managing memory and storage
Scheduling tasks & sharing resources
Hardware
Processor, memory, I/O controllers
Chapter 1 — Computer Abstractions and Technology — 13
Levels of Program Code
High-level language
Level of abstraction closer
to problem domain
Provides for productivity
and portability
Assembly language
Textual representation of
instructions
Hardware representation
Binary digits (bits)
Encoded instructions and
data
Chapter 1 — Computer Abstractions and Technology — 14
§1.4 Under the Covers
Components of a Computer
The BIG Picture
Same components for
all kinds of computer
Desktop, server,
embedded
Input/output includes
User-interface devices
Display, keyboard, mouse
Storage devices
Hard disk, CD/DVD, flash
Network adapters
For communicating with
other computers
Chapter 1 — Computer Abstractions and Technology — 15
Opening the Box
Capacitive multitouch LCD screen
3.8 V, 25 Watt-hour battery
Computer board
Chapter 1 — Computer Abstractions and Technology — 16
Inside the Processor (CPU)
Datapath: performs operations on data
Control: sequences datapath, memory, ...
Cache memory
Small fast SRAM memory for immediate
access to data
Chapter 1 — Computer Abstractions and Technology — 17
CPU Clocking
Operation of digital hardware governed by a
constant-rate clock
Clock period
Clock (cycles)
Data transfer
and computation
Update state
Clock period: duration of a clock cycle
e.g., 250ps = 0.25ns = 250×10–12s
Clock frequency (rate): cycles per second
e.g., 4.0GHz = 4000MHz = 4.0×109Hz
Chapter 1 — Computer Abstractions and Technology — 18
CPU Time
CPU Time CPU Clock CyclesClock Cycle Time
CPU Clock Cycles
Clock Rate
Performance improved by
Reducing number of clock cycles
Increasing clock rate
Hardware designer must often trade off clock
rate against cycle count
Chapter 1 — Computer Abstractions and Technology — 19
CPU Time Example
Computer A: 2GHz clock, 10s CPU time
Designing Computer B
Aim for 6s CPU time
Can do faster clock, but causes 1.2 × clock cycles
How fast must Computer B clock be?
Clock CyclesB 1.2 Clock CyclesA
Clock RateB
CPU Time B 6s
Clock CyclesA CPU Time A Clock Rate A
10s 2GHz 20 10 9
1.2 20 10 9 24 109
Clock RateB 4GHz
6s 6s
Chapter 1 — Computer Abstractions and Technology — 20
Instruction Count and CPI
Clock Cycles Instructio n Count Cycles per Instructio n
CPU Time Instructio n Count CPI Clock Cycle Time
Instructio n Count CPI
Clock Rate
Instruction Count for a program
Determined by program, ISA and compiler
Average cycles per instruction
Determined by CPU hardware
If different instructions have different CPI
Average CPI affected by instruction mix
Chapter 1 — Computer Abstractions and Technology — 21
CPI Example
Computer A: Cycle Time = 250ps, CPI = 2.0
Computer B: Cycle Time = 500ps, CPI = 1.2
Same ISA
Which is faster, and by how much?
CPU Time Instructio n Count CPI Cycle Time
A A A
I 2.0 250ps I 500ps A is faster…
CPU Time Instructio n Count CPI Cycle Time
B B B
I 1.2 500ps I 600ps
CPU Time
B I 600ps 1.2
…by this much
CPU Time I 500ps
A
Chapter 1 — Computer Abstractions and Technology — 22
CPI in More Detail
If different instruction classes take different
numbers of cycles
n
Clock Cycles (CPIi Instructio n Counti )
i 1
Weighted average CPI
n
Clock Cycles Instructio n Counti
CPI CPIi
Instructio n Count i1 Instructio n Count
Relative frequency
Chapter 1 — Computer Abstractions and Technology — 23
CPI Example
Alternative compiled code sequences using
instructions in classes A, B, C
Class A B C
CPI for class 1 2 3
IC in sequence 1 2 1 2
IC in sequence 2 4 1 1
Sequence 1: IC = 5 Sequence 2: IC = 6
Clock Cycles Clock Cycles
= 2×1 + 1×2 + 2×3 = 4×1 + 1×2 + 1×3
= 10 =9
Avg. CPI = 10/5 = 2.0 Avg. CPI = 9/6 = 1.5
Chapter 1 — Computer Abstractions and Technology — 24
Performance Summary
The BIG Picture
Instructio ns Clock cycles Seconds
CPU Time
Program Instructio n Clock cycle
Performance depends on
Algorithm: affects IC, possibly CPI
Programming language: affects IC, CPI
Compiler: affects IC, CPI
Instruction set architecture: affects IC, CPI, Tc
Chapter 1 — Computer Abstractions and Technology — 25
Response Time and Throughput
Response time
How long it takes to do a task
Throughput
Total work done per unit time
e.g., tasks/transactions/… per hour
How are response time and throughput affected
by
Replacing the processor with a faster version?
Adding more processors?
We’ll study their estimation now
Chapter 1 — Computer Abstractions and Technology — 26
§1.7 The Power Wall
Power Trends
In CMOS IC technology
Power Capacitive load Voltage 2 Frequency
×30 5V → 1V ×1000
Chapter 1 — Computer Abstractions and Technology — 27
Reducing Power
Suppose a new CPU has
85% of capacitive load of old CPU
15% voltage and 15% frequency reduction
Pnew Cold 0.85 (Vold 0.85) 2 Fold 0.85 4
2
0.85 0.52
Pold Cold Vold Fold
The power wall
We can’t reduce voltage further
We can’t remove more heat
How else can we improve performance?
Chapter 1 — Computer Abstractions and Technology — 28
Multiprocessors
Multicore microprocessors
More than one processor per chip
Clock frequency limited
Requires explicitly parallel programming
Compare with instruction level parallelism
Hardware executes multiple instructions at once
Hidden from the programmer
Hard to do
Programming for performance
Load balancing
Optimizing communication and synchronization
Chapter 1 — Computer Abstractions and Technology — 29
§1.9 Concluding Remarks
Concluding Remarks
Cost/performance is improving
Due to underlying technology development
Hierarchical layers of abstraction
In both hardware and software
Instruction set architecture
The hardware/software interface
Execution time: the best performance
measure
Power is a limiting factor
Use parallelism to improve performance
Chapter 1 — Computer Abstractions and Technology — 30