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8085 Programable Peripheral Interface | PDF | Input/Output | Electronic Design
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8085 Programable Peripheral Interface

The Intel 82C55A is a programmable I/O device with 24 I/O pins that can be programmed individually. It has 3 major operating modes and interfaces with the CPU via an 8-bit data bus buffer and read/write control logic. The device has 3 ports (A, B, C) that can each be configured as input or output ports in the different operating modes, including basic I/O, strobed I/O, and bidirectional bus modes.

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Shiva Chauhan
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0% found this document useful (0 votes)
171 views16 pages

8085 Programable Peripheral Interface

The Intel 82C55A is a programmable I/O device with 24 I/O pins that can be programmed individually. It has 3 major operating modes and interfaces with the CPU via an 8-bit data bus buffer and read/write control logic. The device has 3 ports (A, B, C) that can each be configured as input or output ports in the different operating modes, including basic I/O, strobed I/O, and bidirectional bus modes.

Uploaded by

Shiva Chauhan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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8255 Programmable Peripheral Interface

Description
 The Intel 82C55A is a general purpose programmable I/O
device which may be used with many different
microprocessors.

 There are 24 I/O pins which may be individually


programmed in 2 groups of 12 and used in 3 major modes of
operation.

 The high performance and industry standard configuration


of the 82C55A make it compatible with the 8086.

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8255 Internal Architecture

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 Data Bus Buffer
This three-state bi-directional 8-bit buffer is used to
interface the 82C55A to the system data bus. Data is
transmitted or received by the buffer upon execution
of input or output instructions by the CPU. Control
words and status information are also transferred
through the data bus buffer.

 Read/Write and Control Logic


The function of this block is to manage all of the
internal and external transfers of both Data and
Control or Status words. It accepts inputs from the
CPU Address and Control busses accepts inputs from
the CPU Address and Control busses and in turn,
issues commands to both of the Control Groups.

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 (A0 and A1) Port Select 0 and Port Select 1 :
These input signals, in conjunction with the RD
and WR inputs, control the selection of one of the
three ports or the control word register.

 (CS) Chip Select : A “low” on this input pin


enables the communication between the 82C55A
and the CPU.

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 (RD) Read : A “low” on this input pin enables
82C55A to send the data or status information to
the CPU on the data bus. In essence, it allows the
CPU to “read from” the 82C55A.

 (WR) Write : A “low” on this input pin enables


the CPU to write data or control words into the
82C55A.

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 (RESET) Reset : A “high” on this input
initializes the control register to 9Bh and all ports
(A, B, C) are set to the input mode. “Bus hold”
devices internal to the 82C55A will hold the I/O
port inputs to a logic “1” state with a maximum
hold current of 400mA.

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8255 Pin Diagram

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Working Modes Of 8255
 Mode Selection
There are three basic modes of operation than can be
selected by the system software:
• Mode 0 - Basic Input/Output
• Mode 1 - Strobed Input/Output
• Mode 2 - Bi-directional Bus

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• When the reset input goes “high”, all ports will be set to
the input mode with all 24 port lines held at a logic “one”
level by internal bus hold devices.
• After the reset is removed, the 82C55A can remain in the
input mode with no additional initialization required
• During the execution of the system program, any of the
other modes may be selected using a single output
instruction. This allows a single 82C55A to service a
variety of peripheral devices with a simple software
maintenance routine.
• Any port programmed as an output port is initialized to all
zeros when the control word is written.

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 The modes for Port A and Port B can be separately
defined, while Port C is divided into two portions as
required by the Port A and Port B definitions.

 For instance: Group B can be programmed in Mode


0 to monitor simple switch closings or display
computational results, Group A could be
programmed in Mode 1 to monitor a keyboard or tape
reader on an interrupt-driven basis.

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Control Word for 8255 (I/O Mode)

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BSR Mode For 8255
 Single Bit Set/Reset Feature

• Any of the eight bits of Port C can be Set or


Reset using a single Output instruction. This
feature reduces software requirements in control-
based applications. operation just as if they were
output ports.

• When Port C is being used as status/control for


Port A or B, these bits can be set or reset by
using the Bit Set/Reset.

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Operation Of Different Modes

 Operating Modes

• Mode 0 (Basic Input/Output) : This functional configuration


provides simple input and output operations for each of the three
ports. No handshaking is required, data is simply written to or read
from a specific port.
• Mode 0 Basic Functional Definitions:
  Two 8-bit ports and two 4-bit ports
  Any Port can be input or output
  Outputs are latched
  Input are not latched
  16 different Input/Output configurations possible

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 Mode 1 - (Strobed Input/Output) : This functional configuration
provides a means for transferring I/O data to or from a specified port
in conjunction with strobes or “hand shaking” signals. In mode 1, port
A and port B use the lines on port C to generate or accept these
“hand shaking” signals.

Mode 1 Basic Function Definitions:


(i) Two Groups (Group A and Group B)
(ii) Each group contains one 8-bit port and one 4-bit control/data
port
(iii) The 8-bit data port can be either input or output. Both inputs
and outputs are latched.
(iv) The 4-bit port is used for control and status of the 8-bit port.

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 Mode 2 Basic Functional Definitions :
(i) Used in Group A only
(ii) One 8-bit, bi-directional bus Port (Port A)
and a 5-bit control Por t (Por t C)
(iii) Both inputs and outputs are latched
(iv)The 5-bit control port (Port C) is used for
control and status for the 8-bit, bi-directional bus
port (Por t A)

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