1. Which one of the following offers CPUs as integrated memory or peripheral interfaces?
Microcontroller
Microprocessor
Embedded system
Memory system
Answer: a
2. Which of the following offers external chips for memory and peripheral interface
circuits?
Microcontroller
Microprocessor
Peripheral system
Embedded system
Answer: b
3. How many bits does an MC6800 family have?
16
32
4
8
Answer: d
4. Which of the following is a 4-bit architecture?
MC6800
8086
80386
National COP series
Answer: d
5. What is CISC?
Computing instruction set complex
Complex instruction set computing
Complimentary instruction set computing
Complex instruction set complementary
Answer: b
6. How is the protection and security for an embedded system made?
OTP
IPR
Memory disk security
Security chips
Answer: b
7. Which of the following possesses a CISC architecture?
MC68020
ARC
Atmel AVR
Blackfin
Answer: a
8. Which of the following is a RISC architecture?
80286
MIPS
Zilog Z80
80386
Answer: b
9. Which one of the following is board based system?
Data bus
Address bus
VME bus
DMA bus
Answer: c
10. VME bus stands for
Versa module Europa bus
Versa module embedded bus
Vertical module embedded bus
Vertical module Europa bus
Answer: a
11. Name a volatile memory
RAM
EPROM
ROM
EEPROM
Answer: a
12. Name a nonvolatile memory.
ROM
RAM
SRAM
DRAM
Answer: a
13. The initial routine is often referred to as
Initial program
Bootstrap program
Final program
Initial embedded program
Answer: b
14. What kind of socket does an external EPROM to plugged in for prototyping?
Piggyback
Single socket
Multi-socket
Piggyback reset socket
Answer: a
15. Which one of the following is UV erasable?
Flash memory
SRAM
EPROM
DRAM
Answer: c
16. What kind of memory does an OTP have?
SRAM
RAM
EPROM
DRAM
Answer: c
17. Which type of memory is suitable for low volume production of embedded systems?
ROM
Volatile
Non-volatile
RAM
Answer: c
18. What type of memory is suitable for high volume production?
RAM
ROM
EPROM
EEPROM
Answer: b
19. How the input terminals are associated with external environments?
Actuators
Sensors
Inputs
Outputs
Answer: b
20. Which of the following can transfer multiple bits of data simultaneously?
serial port
sequential port
concurrent unit
parallel port
Answer: d
21. Which of the following are interfaced as the outputs to the parallel ports?
keyboards
switches
LEDs
knobs
Answer: c
22. How many registers are there to control the parallel port in the basic form?
1
3
2
5
Answer: c
23. Which of the following is also known as tri-state?
output port
input port
parallel port
output-input port
Answer: a
24. Which of the following registers offers high impedance?
data register
data direction register
individual control bit
data register and data direction register
Answer: c
25. Which of the following can be used as a chip select?
multifunction I/O port
parallel port
DMA port
memory port
Answer: a
26. Which of the following is necessary for the parallel input-output port?
inductor
pull-up resistor
push-up resistor
capacitor
Answer: b
27. Which of the following can be described as general-purpose?
multifunction I/O port
input port
DMA port
output port
Answer: a
28. Which bit size determines the slowest frequency?
counter size
pre-scalar value
counter
timer
Answer: b
29. Which bit size determines the maximum value of the counter-derived period?
counter size
pre-scalar value
bit size
byte size
Answer: a
30. Which of the following is mode 0 in 8253?
interrupt on start count
interrupt for wait statement
interrupt on terminal count
no interrupt
Answer: c
31. Which determines the mode 1 in the Intel 8253?
interrupt on terminal count
programmable one-shot
rate generator
square wave rate generator
Answer: b
32. Which mode of 8253 can provide pulse width modulation?
programmable one-shot
square wave rate generator
software triggered strobe
hardware triggered strobe
Answer: a
33.Which of the following is the mode 3 in the Intel timer 8253?
rate generator
hardware triggered strobe
square wave rate generator
software triggered strobe
Answer: a
34. Which of the following determines the rate generation?
divide by N
multiply by N
addition by N
subtraction by N
Answer: a
35. Which mode of the Intel 8253 timer can generate a square wave?
mode 1
mode 2
mode 3
mode 4
Answer: d
36. Which mode of the Intel timer 8253 provides a software watchdog timer?
rate generator
hardware triggered strobe
square wave rate generator
software triggered strobe
Answer: d
37. Which timer architecture can provide a higher resolution than Intel 8253?
Intel 8253
Intel 8254
8051 timer
MC68230
Answer: d
38. Which of the following is the pin efficient method of communicating between other
devices?
serial port
parallel port
peripheral port
memory port
Answer: a
39. Which of the following depends the number of bits that are transferred?
wait statement
ready statement
time
counter
Answer: c
40. Which of the following is the most commonly used buffer in the serial porting?
LIFO
FIFO
FILO
LILO
Answer: b
41. What does SPI stand for?
serial parallel interface
serial peripheral interface
sequential peripheral interface
sequential port interface
Answer: b
42. Which allows the full duplex synchronous communication between the master and the
slave?
SPI
serial port
I2C
parallel port
Answer: a
43. Which of the following processor uses SPI for interfacing?
8086
8253
8254
MC68HC11
Answer: d
44. What happens when 8 bits are transferred in the SPI?
wait statement
ready statement
interrupt
remains unchanged
Answer: c
45. How much time period is necessary for the slave to receive the interrupt and transfer
the data?
4 clock time period
8 clock time period
16 clock time period
24 clock time period
Answer: b
46. Which company developed I2C?
Intel
Motorola
Phillips
IBM
Answer: c
47. Which are the two lines used in the IIC?
SDA and SPDR
SPDR and SCL
SDA and SCL
SCL and status line
Answer: c
48. Which pin provides the reference clock for the transfer of data?
SDA
SCL
SPDR
Interrupt pin
Answer: b
49. Which of the following are the three hardware signals?
START, STOP, ACKNOWLEDGE
STOP, TERMINATE, END
START, SCL, SDA
STOP, SCL, SDA
Answer: a
50. Which of the following are handshake signals?
START
STOP
ACKNOWLEDGE
START and STOP
Answer: c
51. A packet is also referred to as
postcard
telegram
letter
data
Answer: b
52. Which of the following byte performs the slave selection?
first byte
second byte
terminal byte
eighth byte
Answer: a
53.Which is an efficient method for the EEPROM?
combined format
auto-incrementing counter
register set
single format
Answer: a
54. Which ports are used in the multi-master system to avoid errors?
unidirectional port
bidirectional port
multi directional port
tri directional port
Answer: b
55. Which of the following can be used for long distance communication?
I2C
Parallel port
SPI
RS232
Answer: d
56. Which of the following have an asynchronous data transmission?
SPI
RS232
Parallel port
I2C
Answer: b
57. The RS232 is also known as
UART
SPI
Physical interface
Electrical interface
Answer: d
58. Which of the following is not a serial protocol?
SPI
I2C
Serial port
RS232
Answer: d
59. Which of the following is a meet-in-the-middle approach?
peripheral based design
platform based design
memory based design
processor design
Answer: b
60. Which of the task are not periodic?
periodic task
unpredictable task
aperiodic task
job
Answer: c
61. Which of the following schedulers take decisions at run-time?
preemptive scheduler
non preemptive scheduler
dynamic scheduler
static scheduler
Answer: c
62. Which scheduling algorithm can be used in mixed software/hardware systems?
simple algorithm
complex algorithm
uniprocessor algorithm
multiprocessor algorithm
Answer: b
63. The spiral model was originally proposed by
IBM
Barry Boehm
Pressman
Royce
Answer: b
64. The spiral model has two dimensions namely _____________ and ____________
diagonal, angular
radial, perpendicular
radial, angular
diagonal, perpendicular
Answer: c
65. Selection of a model is based on
Requirements
Development team & Users
Project type and associated risk
All of the mentioned
Answer: d
66. Which two models doesn’t allow defining requirements early in the cycle?
Waterfall & RAD
Prototyping & Spiral
Prototyping & RAD
Waterfall & Spiral
Answer: b
67. Which of the following life cycle model can be chosen if the development team has less
experience on similar projects?
Spiral
Waterfall
RAD
Iterative Enhancement Model
Answer: a
68. A Watchdog Timer can act as an interval timer?
true
false
can’t be said
depends on the conditions
Answer: a
69. Which out of the following is the main function of a Watchdog timer?
control the compare mode
control the capture mode
protection from failures to the system
all of the mentioned
Answer: c
70. Which of the following are used to test the software?
data entity
data entry
data table
data book
Answer: c
71. Which of the following provides a low-level method of debugging software?
high-level simulator
low-level simulator
onboard debugger
CPU simulator
Answer: c
72. The core data structure of device driver model is
k object
k file
k module
none of the mentioned
Answer: a
73. Each device in the device driver model is represented by a _____ object.
driver
device
node
none of the mentioned
Answer: b
74. In 8257 (DMA), each of the four channels has
a pair of two 8-bit registers
a pair of two 16-bit registers
one 16-bit register
one 8-bit register
Answer: b
75. The pin that disables all the DMA channels by clearing the mode registers is
MARK
CLEAR
RESET
READY
Answer: c
76. The pin that is used to write data to the addressed memory location, during DMA write
operation is
MEMR (active low)
AEN
MEMW (active low)
IOW (active low)
Answer: c
77. The 8257 is able to accomplish the operation of
verifying DMA operation
write operation
read operation
all of the mentioned
Answer: d
78. The bus is available when the DMA controller receives the signal
HRQ
HLDA
DACK
All of the mentioned
Answer: b
79. The operation that can be performed on the status register is
write operation
read operation
read and write operations
none of the mentioned
Answer: b
80. Which of these register’s contents is used for auto-initialization (internally)?
current word register
current address register
base address register
command register
Answer: c
81. Which of the following is correct about WDTCTL?
it is a 16 bit register
it is guided against accidental writes that require a password
a reset will occur if a value with an incorrect password is written to WDTCTL
all of the mentioned
Answer: d
82. WDTIFG flag gets cleared if
if is interrupt had occurred
if the interrupt is serviced
if there can be no interrupt
all of the mentioned
Answer: b
83. It retains its content when power is removed. What type of memory is this?
Volatile memory
Nonvolatile memory
RAM
SRAM
Answer: b
84. The problem of priority inversion can be solved by ____________
priority inheritance protocol
priority inversion protocol
both priority inheritance and inversion protocol
none of the mentioned
Answer: a
85. Time duration required for scheduling dispatcher to stop one process and start another
is known as ____________
process latency
dispatch latency
execution latency
interrupt latency
Answer: b
86. Which one of the following is a real time operating system?
RT Linux
Vx Works
Windows CE
All of the mentioned
Answer: d
87. Which of the following is more quickly accessed?
RAM
Cache memory
DRAM
SRAM
Answer: b
88. What does DMA stand for?
Direct Memory Access
Direct Main Access
Data Main Access
Data Memory Address
Answer: a
89. Which memory storage is widely used in PCs and Embedded Systems?
SRAM
DRAM
Flash memory
EEPROM
Answer: b
90. Which of the following is the main factor which determines the memory capacity?
number of transistors
number of capacitors
size of the transistor
size of the capacitor
Answer: a
