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WEEK 2 – THE MEMORY SYSTEM AND INSTRUCTION SET ARCHITECTURE
For this week’s material, you will be introduced to the memory system and different instruction set
architectures for CPU’s.
The following will be covered this week:
A. The Memory System
o RAM, ROM, DMA, Memory Hierarchy, Cache Memory
o Performance considerations
o Virtual Memory
o Memory management requirements
o Secondary storage
B. Instruction Set Architecture
o Memory location and addresses
o Memory operation
o Instructions and instruction sequencing
o Addressing modes
o Assembly language
o Stack, subroutines and additional instructions
o CISC instruction and RISC & CISC Styles
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THE MEMORY SYSTEM
The main memory of the computer system is a set of storage locations and their associated addresses.
Data transfer between memory units is done using words known as bits (i.e. 8, 16, 32, 64 bits…etc.)
and bytes (1 byte equals 8 bits).
The organisation of main memory
The table below is a summary of the main memory units ranging from the smallest unit of a bit to
some of the larger units, sizes which are typically not seen on consumer level computers.
UNIT ABBRIEVIATION QUANTITY
Bit Bit 1 Bit 0, 1
Nibble Nibble 1 Nibble 4 Bit
Byte Byte 1 Byte 8 Bits
Kilobyte KB 1 KB 1024 Bytes
Megabyte MB 1 MB 1024 Megabytes
Gigabyte GB 1 GB 1024 Gigabytes
Terabyte TB 1 TB 1024 Terabytes
Petabyte PB 1 PB 1024 Petabytes
Exabyte EB 1 EB 1024 Exabytes
Zettabyte ZB 1 ZB 1024 Zettabytes
Yottabyte YB 1 YB 1024 Yottabyte
Memory units
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RAM, ROM, DMA, MEMORY HIERARCHY, CACHE M EMORY
Types of Random Access Memory
Random Access Memory (RAM)
o The majority of a computer’s maim memory is RAM
o Volatile memory where data or stored programs are lost if the computer is shut down
Static Random Access Memory (SRAM)
o Memory is kept while the system is on and does not require refreshing
Dynamic Random Access Memory (DRAM)
o In order to keep data stored in memory, the memory cells need periodic refreshing due
to the use of capacitors that require recharging
Types of Read-Only Memory
Read-Only Memory (ROM)
o Data and programs that are written into memory but cannot be modified
o Non-volatile memory, data/stored programs are not lost if the computer is shut down
Programmable Read-Only Memory (PROM)
o Memory that is initially blank but data and programs can only be written on it once
o After the data or programs are written, PROM functions like regular RAM
Erasable Programmable Read-Only Memory (EPROM)
o Similar to PROM but with the ability to programed by the user
o Memory can be erased and reprogramed with the EPROM being removed from the
system then reinstalled
Electrically Erasable Programmable Read-Only Memory (EEPROM)
o Similar to PROM but memory can be erased and reprogrammed without physically
removing it
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Direct Memory Access (DMA)
Direct Memory access is a data transfer mechanism that can bypass the CPU for the data
transfer operations
DMA reduces the need for the CPU to carry out these data transfer operations
DMA primarily is used for transfer between memory and the input/output hardware
The Memory Hierarchy
The memory hierarchy describes the cost-speed benefits of memory as illustrated in the diagram be-
low. The bottom of the pyramid contains the memory types that have the largest capacity, slow speeds
and are the most cost-effective, while at the top contains the memory types with the smallest capacity,
fastest speeds and are the least cost-effective.
Simplified Memory Hierarchy (Leng, n.d.)
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Cache Memory
Cache memory is the second fastest and smallest form of memory behind the central processing unit’s
registers as indicated in the memory hierarchy diagram on the previous page. The cache is located
between the central processing unit and the main memory of the system. The role of cache memory
is to keep a copy of part of the systems main memory for the central processing unit to access at any
given time.
Main types of cache
Primary cache (Level 1 or L1 cache)
o Small and fast memory embedded on the CPU
Secondary cache (Level 2 or L2 cache)
o Small and slower memory that can be embedded on the CPU or on a separate
chip
Level 3 cache (L3 cache)
o Small and slower ‘specialised’ memory used to improve the performance of
L1 and L2 caches
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PERFORMANCE CONSIDER ATIONS AND VIRTUAL MEMORY
In order for programs to run efficiently on the operating system there is a need to manage the use of
secondary memory within the computer system. Virtual memory provides the system the ability to
use secondary memory ‘virtually’ as if it were main memory. Through a system of demand paging
and segmentation, the operating system can temporarily move data and programs back and forth be-
tween secondary and main memory. This process is known as multiprogramming allows the user to
perform multiple tasks or run several applications simultaneously. A drawback of virtual memory is
that it does not offer the same benefits as secondary memory and can reduce system performance and
stability. The following section will describe in more depth the processes involved and the perfor-
mance considerations.
Virtual Memory
MEMORY MANAGEMENT REQUIREMENTS
As computers have become smaller, more complex and require more space and memory for data and
running applications, the operating system needs to have a process of effectively managing memory
on a system. This process should be able to prevent associated performance bottlenecks of available
memory. There are a variety of techniques that the operating systems can use to address this issues in
the form of either monoprogramming or multiprogramming.
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Monoprogramming vs. Multiprogramming
Monoprogramming is a memory management technique that was primarily used in the early ages of
computers where only single tasks at a time were required to be executed by the computer. With this
technique, the majority of the available memory needed to run a program is used by that program.
While the program is being executed, all of it is stored in memory and must complete its tasks prior
to that space being used by a new program. Monoprogramming is a form of memory management is
not suitable for the current standards of computers. Modern computers require flexible multitasking
for users and the ability to handle of a large set of processes and programs at the same time, something
that multiprogramming provides.
Types of multiprogramming
Partitioning
o Memory is split up into partitions of different sizes
o Each partition contains one program
Paging
o Memory is split into ‘frames’ of equal sizes
o Programs are split into ‘pages’ of equal sizes
o Pages are loaded into the memory of a frame
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Demand paging
o Program is split into pages
o Pages are able to load to memory in succession
o Once the page is executed, the next page can follow the same process
Demand segmentation
o Program is spit into segments with the programs main functionality
o Segments are able to load into memory
o Once the segment is executed another module can follow the same process
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The table below summarizes the different memory management techniques that were previously de-
scribed.
Summary of memory management techniques
SECONDARY STORAGE
As opposed to primary storage, secondary storage is non-volatile storage for programs and data that
need to be preserved when the computer is shut down. The main categories of secondary storage for
modern computers are magnetic storage, optical storage, flash-based storage and network-based stor-
age.
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Magnetic storage
Magnetic disk
o Data is stored to, written to and read from the magnetized surface of the disk
Magnetic tape
o Data is stored to, written to and read from the magnetized surface of the tape reel
Examples of magnetic storage devices are;
Magnetic drum (an early storage medium)
Tape reel
Floppy disks
Zip drives
Hard disk drives (HDD).
Magnetic storage devices are prone to forms of physical damage including damage to moving parts
after being dropped and environmental damage such as heat or water.
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Optical storage
CD – Compact Disk (with a storage capacity between 650 and 700 megabytes)
o CD-ROM – Compact Disk Read-Only Memory
o CD-R – Compact Disk Recordable
o CD-RW – Compact Disk Rewritable
DVD – Digital Versatile Disk (with a storage capacity of 4.7 gigabytes (single-layer) and
8.5 gigabytes (dual layer)
o DVD-ROM – Digital Versatile Disk Read-Only Memory
o DVD-R – Digital Versatile Disk Recordable
o DVD-RW – Digital Versatile Disk Rewritable
Blu-Ray – (with a varied storage capacity dependent on disk standard, but typically 25 giga-
bytes (single-layer) and 50 gigabytes (dual) layer)
o BD-R – Blu-ray Recordable Disk
o BD-R DL – Blu-ray Recordable Disk Dual Layer
o BD-RE – Blu-ray Rewritable Disk
o UHD-BD – Ultra High Definition Blu-ray
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Flash storage
Examples of flash storage devices are flash drives such as Universal Serial Bus (USB) flash drives,
Secure Digital (SD), Secure Digital High Capacity (SDHC) and Secure Digital Extended Capacity
(SDXC) memory cards, Solid State Drives (SSD), Solid State Hybrid Drives (SSHD) and Non-vola-
tile Memory Express (NVMe) storage attached to a peripheral component interconnect express (PCIe)
bus on the motherboard.
Network based storage
Network attached storage (NAS)
o Network attached storage (NAS) is a form of storage that is attached to a computer
via network cable or through the wireless connection of a router or an access point.
NAS devices are storage hardware (HDD, SSD…etc.) with networking capabilities
and can be configured to provide access to data over a local network and the internet.
Cloud storage
Cloud storage is simply additional storage that can be rented at a fee or provided free as a
service over the internet. This means that the infrastructure that houses the hardware stor-
age devices is located elsewhere and the user has to connect to the online service to access
their data. Typically, cloud storage makes use of physical hardware including HDDs and
SSDs all connected to a server rack with shared or dedicated hardware.
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INSTRUCTION SET ARCHITECTURE
MEMORY LOCATION AND ADDRESSES AND MEMORY OPERATION
INSTRUCTIONS AND INS TRUCTION SEQUENCING
The key components of the instruction sequencing are contained within the CPU, the Main Memory
and the Input/Output Module. The steps for the process and the definitions for each of the listed
components will be explained on the next page
Main Memory
CPU Instruction
Instruction
PC MAR
Instruction
MBR ………………………
IR
Data
I/O AR
Execution Data
Unit I/O BR
Data
………………………
I/O Module
……………
Buffers….
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Key components
PC – Program Counter
o Stores the address value of the next instruction
MAR – Memory Address Register
o Stores the value of the address (location of the address value in memory for data
storage and transfer)
MBR – Memory Buffer Register
o Used to transfer data from the CPU to main memory
o Used to transfer data from main memory to the CPU
IR – Instruction Register
o Used for storing the instruction
I/O AR – Input/Output Address Register
o Data transfer for I/O
I/O BR – Input/Output Buffer Register
o Data transfer for I/O
Execution Unit
o Execution or processing of instruction(s)
The instruction execution sequence
Step 1 – Instruction fetch
o Program counter has the address value of the instruction
o The address value of the instruction will be transferred to the memory address
register
o Address location of the instruction identified in the main memory
o Instruction is then transferred to the memory buffer register
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o Memory buffer register then transfers the instruction to the instruction register
Step 2 – Instruction decode
o Fetched instruction is decoded and split up into two the operand and the opera-
tion
Step 3 – Operand fetch
o Identify memory location and address of the operand
o Address sent to memory address register
o Memory location identified and sent to the main memory
o Data then transferred to the memory buffer register
o Data then transferred to the execution unit
Step 4 – Execution
o Data and operation both transferred to the execution unit
o Instruction is then executed
o Output of the execution needs to be stored in memory
Step 5 – Operand store
o Address location needs to be identified through the memory address register
o The operand is stored in main memory
ADDRESSING MODES
Main addressing modes
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Types of addressing modes
Addressing modes for code
Absolute
PC-relative
Register-indirect
Addressing modes for data
Register
Base plus offset
Immediate
Implicit
Other addressing modes
Absolute, indexed absolute
Base plus index
Base plus index offset
Scaled
Register indirect
Register autoincrement indirect
Memory indirect
PC-relative
ASSEMBLY LANGUAGE
An assembly language also known as ASM, is a low-level programming language for a type of pro-
cessor. The ASM is designed to meet the requirements of a particular instruction set architecture,
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therefore there are a variety of assembler languages that exist. The assembler is the executable pro-
gram that carries out the task of converting the assembly program into machine. The code that is
written is in a human-readable format and as a low-level language, each instruction is precise and
handles only one machine instruction. This makes it ideal for the programmer as they have full control
over the functions of the computer. In addition, due to the level of abstraction in assembly language,
there is an increased compatibility of assembly programs between different processors (Sarangi,
2015).
Assembly language vs. machine code
STACK, SUBROUTINES AND ADDITIONAL INSTRUCTIONS
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CISC INSTRUCTION AND RISC & CISC STYLES
Complex Instruction Set Computer (CISC) vs Reduced Instruction Set Computer (RISC)
CISC based architecture describes that the central processing unit should be able to execute a large
set of complex machine instructions regardless of whether all of them are useful or relevant. This
approach to architecture design claims that a design as such would be able flexible enough to handle
on-going increases in complexity. RISC based architecture describes that the central processing unit
should be able to execute a small set of machine instructions. This approach to architecture design
claims that the CPU will run efficiently, faster and will be relatively cheap to produce (Brookshear &
Brylow, 2015).
General principles for CISC and RISC based computer architecture designs
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REFERENCES
Abd-El-Barr, M., & El-Rewini, H. (2005). Fundamentals of Computer Organization and Architecture
(Wiley Series on Parallel and Distributed Computing) (1st ed.). Wiley.
Brookshear, J. G., & Brylow, D. (2015). Computer Science: An Overview (12th Edition). Pearson
Education.
Sarangi, S. R. (2015). Computer Organisation and Architecture. McGraw-Hill Education.
Stair, R., & Reynolds, G. (2017). Fundamentals of Information Systems (9th ed.). Cengage Learning.
Stallings, W. (2019). Computer Organization and Architecture (11th ed.). Pearson.
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